Date   

[tianocore-docs][SecurityAdvisory][Patch] Add Gitbook Action and sync with template

Michael D Kinney
 

Cc: Jian J Wang <jian.j.wang@...>
Cc: Laurie Jarlstrom <laurie.jarlstrom@...>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@...>
---
.bookignore | 3 +
.github/workflows/gitbook-action.yml | 39 +++++++++++++
.gitignore | 16 ++++++
README.md | 81 +++++++++++----------------
SUMMARY.md | 1 +
_layouts/ebook/pdf_header.html | 1 -
assets/Tianocore_logo2.png | Bin 7360 -> 0 bytes
book.json | 16 +++---
styles/epub.css | 8 +++
styles/mobi.css | 8 +++
styles/pdf.css | 8 +++
styles/website.css | 8 +++
12 files changed, 132 insertions(+), 57 deletions(-)
create mode 100644 .bookignore
create mode 100644 .github/workflows/gitbook-action.yml
create mode 100644 .gitignore
delete mode 100644 assets/Tianocore_logo2.png

diff --git a/.bookignore b/.bookignore
new file mode 100644
index 0000000..ed716f0
--- /dev/null
+++ b/.bookignore
@@ -0,0 +1,3 @@
+/.github
+.gitignore
+.bookignore
diff --git a/.github/workflows/gitbook-action.yml b/.github/workflows/gitbook-action.yml
new file mode 100644
index 0000000..917b0d7
--- /dev/null
+++ b/.github/workflows/gitbook-action.yml
@@ -0,0 +1,39 @@
+name: 'Gitbook Action Build'
+on:
+ push:
+ branches:
+ - master
+ - release/*
+ workflow_dispatch:
+
+jobs:
+ build:
+ runs-on: ubuntu-latest
+ steps:
+ - name: Checkout action
+ uses: actions/checkout@v2
+ - name: Get Branch
+ run: |
+ raw=$(git branch -r --contains ${{ github.ref }})
+ branch=${raw/ origin\/}
+ pubdir=${branch/master/draft}
+ pubdir=${pubdir////-}
+ echo "ON_PUSH_BRANCH_NAME=$branch" >> $GITHUB_ENV
+ echo "ON_PUSH_PUBDIR=$pubdir" >> $GITHUB_ENV
+ - name: Gitbook Action
+ uses: zanderzhao/gitbook-action@....4
+ with:
+ token: ${{secrets.GITBOOK_ACTION_PERSONAL_TOKEN}}
+ source_branch: ${{env.ON_PUSH_BRANCH_NAME}}
+ publish_branch: gh-pages
+ publish_dir: ${{env.ON_PUSH_PUBDIR}}
+ publish_remove_last_build: true
+ gitbook_pdf: true
+ gitbook_pdf_dir: /
+ gitbook_pdf_name: ${{ github.event.repository.name }}-${{env.ON_PUSH_PUBDIR}}
+ gitbook_epub: true
+ gitbook_epub_dir: /
+ gitbook_epub_name: ${{ github.event.repository.name }}-${{env.ON_PUSH_PUBDIR}}
+ gitbook_mobi: true
+ gitbook_mobi_dir: /
+ gitbook_mobi_name: ${{ github.event.repository.name }}-${{env.ON_PUSH_PUBDIR}}
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..e9c50d9
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,16 @@
+# Node rules:
+## Grunt intermediate storage (http://gruntjs.com/creating-plugins#storing-task-files)
+.grunt
+
+## Dependency directory
+## Commenting this out is preferred by some people, see
+## https://docs.npmjs.com/misc/faq#should-i-check-my-node_modules-folder-into-git
+/node_modules
+
+# Book build output
+/_book
+
+# eBook build output
+/book.epub
+/book.mobi
+/book.pdf
\ No newline at end of file
diff --git a/README.md b/README.md
index 3b4b8f7..826ec88 100644
--- a/README.md
+++ b/README.md
@@ -27,65 +27,26 @@
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-->
-<img src="media/TianocoreTitlePageLogo.jpg" width="300" />

-# Security Advisory {#security-advisory}
+<img src="media/TianocoreTitlePageLogo.jpg" width="300" />

-<!---
### {{ book.title }}
--->
-
-## Tianocore Security Advisory Briefings

+{% if book.draft %}
+** DRAFT FOR REVIEW **
+{% else %}
** {{ book.version }} **
+{% endif %}

-**Date:** ** {{ gitbook.time|date('MM/DD/YYYY hh:mm:ss') }} **
+** {{ gitbook.time|date('MM/DD/YYYY hh:mm:ss') }} **

+{% if book.udkrelease %}
+** {{ book.udkrelease }} **
+{% endif %}

This document will list briefings on each security issue found and give a description, a recommendation on a solution, an acknowledgment that the solution is validated and references.


-### Revision History
-
-| Revision | Revision History | Date |
-| ---------- | ------------------ | --------------- |
-| .002.0 | Initial release.<BR> Logs 1 - 19 | Jan 9, 2015 |
-| | | |
-| .003.0 | Logs for 20-26 | Nov 29, 2016 |
-| | | |
-| .003.1 | Logs for 21-26 <BR>- Fix more for DHCP issue, feedback from Phoenix.<BR>- Fix Smm Variable GetInfo function issue, discovered by release test.<BR>- Fix GIT hash info, which incorrect stated before. logs 21, 22, 23, 24, 25, 26 | Dec 19, 2016|
-| | | |
-| .004.0 | Log 27 - Update<BR>Update Gitbook Template | Jan 11, 2018 |
-| .005.0 | Log 28 Update |July 10, 2018 |
-| .006.0 | Log 29 Update | Sept 19, 2018 |
-| .007.0 | Log 30 & 31 Update | Oct 12, 2018 |
-| .008.0 | Log 32-40 Update | Mar 21, 2019 |
-| .009.0 | Log 41 Update | May 10, 2019 |
-| | | |
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-### Process
-_(short form)_
-
-1. Security Bugs reported through: [How to report a Security Issue](https://github.com/tianocore/tianocore.github.io/wiki/Reporting-Security-Issues)
-2. The issue is evaluated
-3. Determine if a Security issue
-4. Determine Module
-5. Fix and Validate issue
-6. If Security, Update Security Advisory (This Document)
-
### Acknowledgements

Redistribution and use in source (original document form) and 'compiled'
@@ -115,7 +76,31 @@ ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Copyright (c) 2017-2019, Intel Corporation. All rights reserved.


+### Process
+_(short form)_

+1. Security Bugs reported through: [How to report a Security Issue](https://github.com/tianocore/tianocore.github.io/wiki/Reporting-Security-Issues)
+2. The issue is evaluated
+3. Determine if a Security issue
+4. Determine Module
+5. Fix and Validate issue
+6. If Security, Update Security Advisory (This Document)

+### Revision History

+| Revision | Revision History | Date |
+| ---------- | ------------------ | --------------- |
+| .002.0 | Initial release.<BR> Logs 1 - 19 | Jan 9, 2015 |
+| | | |
+| .003.0 | Logs for 20-26 | Nov 29, 2016 |
+| | | |
+| .003.1 | Logs for 21-26 <BR>- Fix more for DHCP issue, feedback from Phoenix.<BR>- Fix Smm Variable GetInfo function issue, discovered by release test.<BR>- Fix GIT hash info, which incorrect stated before. logs 21, 22, 23, 24, 25, 26 | Dec 19, 2016|
+| | | |
+| .004.0 | Log 27 - Update<BR>Update Gitbook Template | Jan 11, 2018 |
+| .005.0 | Log 28 Update |July 10, 2018 |
+| .006.0 | Log 29 Update | Sept 19, 2018 |
+| .007.0 | Log 30 & 31 Update | Oct 12, 2018 |
+| .008.0 | Log 32-40 Update | Mar 21, 2019 |
+| .009.0 | Log 41 Update | May 10, 2019 |
+| | | |

diff --git a/SUMMARY.md b/SUMMARY.md
index d866c55..da944a8 100644
--- a/SUMMARY.md
+++ b/SUMMARY.md
@@ -27,6 +27,7 @@
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-->
+
# Summary

* [Security Advisory](README.md)
diff --git a/_layouts/ebook/pdf_header.html b/_layouts/ebook/pdf_header.html
index 98ea842..05c7450 100644
--- a/_layouts/ebook/pdf_header.html
+++ b/_layouts/ebook/pdf_header.html
@@ -8,7 +8,6 @@
{% else %}
<div style="position:absolute;text-align:left">{{ book.title }}</div>
{% endif %}
- <br>
<div style="text-align:right">{{ page.title }}</div>
</p>
</div>
diff --git a/assets/Tianocore_logo2.png b/assets/Tianocore_logo2.png
deleted file mode 100644
index 0ba21dc7a651ee64ee3449415aabb667022276b8..0000000000000000000000000000000000000000
GIT binary patch
literal 0
HcmV?d00001

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diff --git a/book.json b/book.json
index fb1d404..4b0289a 100644
--- a/book.json
+++ b/book.json
@@ -1,9 +1,9 @@
{
-"variables" : {
-"title" : "Security Advisory",
-"version" : "Version: .009.0"
- },
-
-"plugins": ["puml"],
-"pluginsConfig": {}
-}
\ No newline at end of file
+ "variables" : {
+ "draft" : "yes",
+ "title" : "Security Advisory",
+ "version" : "Version: .009.0"
+ },
+ "plugins": ["puml-aleung"],
+ "pluginsConfig": {}
+}
diff --git a/styles/epub.css b/styles/epub.css
index be6b609..72075bb 100644
--- a/styles/epub.css
+++ b/styles/epub.css
@@ -1,3 +1,11 @@
+p {
+ font-family: sans, sans-serif, Arial;
+}
+
+body {
+ font-family: sans, sans-serif, Arial;
+}
+
h1 {
color: #0860A8;
font-weight: normal;
diff --git a/styles/mobi.css b/styles/mobi.css
index db1ca60..522c35c 100644
--- a/styles/mobi.css
+++ b/styles/mobi.css
@@ -1,3 +1,11 @@
+p {
+ font-family: sans, sans-serif, Arial;
+}
+
+body {
+ font-family: sans, sans-serif, Arial;
+}
+
h1 {
color: #0860A8;
font-weight: bold;
diff --git a/styles/pdf.css b/styles/pdf.css
index be6b609..72075bb 100644
--- a/styles/pdf.css
+++ b/styles/pdf.css
@@ -1,3 +1,11 @@
+p {
+ font-family: sans, sans-serif, Arial;
+}
+
+body {
+ font-family: sans, sans-serif, Arial;
+}
+
h1 {
color: #0860A8;
font-weight: normal;
diff --git a/styles/website.css b/styles/website.css
index be6b609..72075bb 100644
--- a/styles/website.css
+++ b/styles/website.css
@@ -1,3 +1,11 @@
+p {
+ font-family: sans, sans-serif, Arial;
+}
+
+body {
+ font-family: sans, sans-serif, Arial;
+}
+
h1 {
color: #0860A8;
font-weight: normal;
--
2.29.2.windows.2


[tianocore-docs][ATBB-Memory_Protection_in_UEFI_BIOS][Patch 2/2] Update to match template and enable GitBook action

Michael D Kinney
 

* Add layout directory to match template
* Update CSS styles to match template
* Add GitBook Action

Cc: Jiewen Yao <jiewen.yao@...>
Cc: Vincent Zimmer <vincent.zimmer@...>
Cc: Laurie Jarlstrom <laurie.jarlstrom@...>
Cc: Kevin Shaw <kevin.w.shaw@...>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@...>
---
.bookignore | 3 +
.github/workflows/gitbook-action.yml | 39 +++++
.gitignore | 10 +-
_layouts/ebook/page.html | 42 +++++
_layouts/ebook/pdf_footer.html | 17 ++
_layouts/ebook/pdf_header.html | 14 ++
_layouts/ebook/summary.html | 98 ++++++++++++
_layouts/layout.html | 27 ++++
_layouts/website/footer.html | 17 ++
_layouts/website/header.html | 31 ++++
_layouts/website/languages.html | 19 +++
_layouts/website/layout.html | 28 ++++
_layouts/website/page.html | 86 +++++++++++
_layouts/website/summary.html | 61 ++++++++
styles/epub.css | 221 ++------------------------
styles/mobi.css | 50 ++++++
styles/pdf.css | 221 +++-----------------------
styles/website.css | 223 +++------------------------
18 files changed, 591 insertions(+), 616 deletions(-)
create mode 100644 .bookignore
create mode 100644 .github/workflows/gitbook-action.yml
create mode 100644 _layouts/ebook/page.html
create mode 100644 _layouts/ebook/pdf_footer.html
create mode 100644 _layouts/ebook/pdf_header.html
create mode 100644 _layouts/ebook/summary.html
create mode 100644 _layouts/layout.html
create mode 100644 _layouts/website/footer.html
create mode 100644 _layouts/website/header.html
create mode 100644 _layouts/website/languages.html
create mode 100644 _layouts/website/layout.html
create mode 100644 _layouts/website/page.html
create mode 100644 _layouts/website/summary.html
create mode 100644 styles/mobi.css

diff --git a/.bookignore b/.bookignore
new file mode 100644
index 0000000..ed716f0
--- /dev/null
+++ b/.bookignore
@@ -0,0 +1,3 @@
+/.github
+.gitignore
+.bookignore
diff --git a/.github/workflows/gitbook-action.yml b/.github/workflows/gitbook-action.yml
new file mode 100644
index 0000000..917b0d7
--- /dev/null
+++ b/.github/workflows/gitbook-action.yml
@@ -0,0 +1,39 @@
+name: 'Gitbook Action Build'
+on:
+ push:
+ branches:
+ - master
+ - release/*
+ workflow_dispatch:
+
+jobs:
+ build:
+ runs-on: ubuntu-latest
+ steps:
+ - name: Checkout action
+ uses: actions/checkout@v2
+ - name: Get Branch
+ run: |
+ raw=$(git branch -r --contains ${{ github.ref }})
+ branch=${raw/ origin\/}
+ pubdir=${branch/master/draft}
+ pubdir=${pubdir////-}
+ echo "ON_PUSH_BRANCH_NAME=$branch" >> $GITHUB_ENV
+ echo "ON_PUSH_PUBDIR=$pubdir" >> $GITHUB_ENV
+ - name: Gitbook Action
+ uses: zanderzhao/gitbook-action@....4
+ with:
+ token: ${{secrets.GITBOOK_ACTION_PERSONAL_TOKEN}}
+ source_branch: ${{env.ON_PUSH_BRANCH_NAME}}
+ publish_branch: gh-pages
+ publish_dir: ${{env.ON_PUSH_PUBDIR}}
+ publish_remove_last_build: true
+ gitbook_pdf: true
+ gitbook_pdf_dir: /
+ gitbook_pdf_name: ${{ github.event.repository.name }}-${{env.ON_PUSH_PUBDIR}}
+ gitbook_epub: true
+ gitbook_epub_dir: /
+ gitbook_epub_name: ${{ github.event.repository.name }}-${{env.ON_PUSH_PUBDIR}}
+ gitbook_mobi: true
+ gitbook_mobi_dir: /
+ gitbook_mobi_name: ${{ github.event.repository.name }}-${{env.ON_PUSH_PUBDIR}}
diff --git a/.gitignore b/.gitignore
index 1a366fb..e9c50d9 100644
--- a/.gitignore
+++ b/.gitignore
@@ -5,12 +5,12 @@
## Dependency directory
## Commenting this out is preferred by some people, see
## https://docs.npmjs.com/misc/faq#should-i-check-my-node_modules-folder-into-git
-node_modules
+/node_modules

# Book build output
-_book
+/_book

# eBook build output
-*.epub
-*.mobi
-*.pdf
\ No newline at end of file
+/book.epub
+/book.mobi
+/book.pdf
\ No newline at end of file
diff --git a/_layouts/ebook/page.html b/_layouts/ebook/page.html
new file mode 100644
index 0000000..9dec3b5
--- /dev/null
+++ b/_layouts/ebook/page.html
@@ -0,0 +1,42 @@
+{% extends "layout.html" %}
+
+{% block title %}{{ page.title }}{% endblock %}
+{% block description %}{{ page.description }}{% endblock %}
+
+{% block style %}
+ {### Include theme css before plugins css ###}
+ {% if not fileExists(config.styles.print) %}
+ {% if options.format %}
+ <link rel="stylesheet" href="{{ (options.format + ".css")|resolveAsset }}">
+ {% else %}
+ <link rel="stylesheet" href="{{ "ebook.css"|resolveAsset }}">
+ {% endif %}
+ {% endif %}
+
+ {{ super() }}
+
+ {### Custom stylesheets for the book ###}
+
+ {% for type, style in config.styles %}
+ {% if fileExists(style) and (type == "ebook" or type == "print" or type == options.format) %}
+ <link rel="stylesheet" href="{{ style|resolveFile }}">
+ {% endif %}
+ {% endfor %}
+{% endblock %}
+
+{% block body %}
+<div class="page">
+ {% block page %}
+ <h1 class="book-chapter book-chapter-{{ page.depth }}">{{ page.title }}</h1>
+ {% if options.format == "mobi" %}
+ <div>
+ {{ page.content|safe }}
+ </div>
+ {% else %}
+ <div class="section">
+ {{ page.content|safe }}
+ </div>
+ {% endif %}
+ {% endblock %}
+</div>
+{% endblock %}
diff --git a/_layouts/ebook/pdf_footer.html b/_layouts/ebook/pdf_footer.html
new file mode 100644
index 0000000..709fa57
--- /dev/null
+++ b/_layouts/ebook/pdf_footer.html
@@ -0,0 +1,17 @@
+{% extends "./page.html" %}
+
+{% block body %}
+<div class="pdf-footer">
+ {% if book.draft %}
+ <p>
+ <div style="position:absolute;text-align:left">DRAFT FOR REVIEW [{{ gitbook.time|date('MM/DD/YYYY hh:mm:ss') }}]</div>
+ <div style="text-align:right">{{ page.num }}</div>
+ </p>
+ {% else %}
+ <p>
+ <div style="position:absolute;text-align:left">{{ book.version }}</div>
+ <div style="text-align:right">{{ page.num }}</div>
+ </p>
+ {% endif %}
+</div>
+{% endblock %}
diff --git a/_layouts/ebook/pdf_header.html b/_layouts/ebook/pdf_header.html
new file mode 100644
index 0000000..05c7450
--- /dev/null
+++ b/_layouts/ebook/pdf_header.html
@@ -0,0 +1,14 @@
+{% extends "./page.html" %}
+
+{% block body %}
+<div class="pdf-header">
+ <p>
+ {% if book.draft %}
+ <div style="position:absolute;text-align:left">{{ book.title }}[DRAFT]</div>
+ {% else %}
+ <div style="position:absolute;text-align:left">{{ book.title }}</div>
+ {% endif %}
+ <div style="text-align:right">{{ page.title }}</div>
+ </p>
+</div>
+{% endblock %}
diff --git a/_layouts/ebook/summary.html b/_layouts/ebook/summary.html
new file mode 100644
index 0000000..946e8cb
--- /dev/null
+++ b/_layouts/ebook/summary.html
@@ -0,0 +1,98 @@
+{% extends "./page.html" %}
+
+{% block title %}{{ "SUMMARY"|t }}{% endblock %}
+
+{% macro articles(_articles) %}
+ {% for article in _articles %}
+ {% if options.format == "mobi" %}
+ <blockquote>
+ {% else %}
+ <li>
+ {% endif %}
+ <span class="inner">
+ {% if article.path or article.url %}
+ {% if article.path %}
+ <a href="{{ article.path|contentURL }}{{ article.anchor }}">{{ article.title }}</a>
+ {% else %}
+ <a target="_blank" href="{{ article.url }}">{{ article.title }}</a>
+ {% endif %}
+ {% else %}
+ <span>{{ article.title }}</span>
+ {% endif %}
+ {% if 0 %}
+ <span class="page">{{ article.level }}</span>
+ {% endif %}
+ </span>
+ {% if article.articles.length > 0 %}
+ {% if options.format == "mobi" %}
+ <blockquote>
+ {{ articles(article.articles) }}
+ </blockquote>
+ {% else %}
+ <ol>
+ {{ articles(article.articles) }}
+ </ol>
+ {% endif %}
+ {% endif %}
+ {% if options.format == "mobi" %}
+ </blockquote>
+ {% else %}
+ </li>
+ {% endif %}
+ {% endfor %}
+{% endmacro %}
+
+{% block page %}
+{% if options.format == "mobi" %}
+<div>
+{% else %}
+<div class="section toc">
+{% endif %}
+ <h1>{{ "SUMMARY"|t }}</h1>
+ {% if options.format == "mobi" %}
+ <blockquote>
+ {% else %}
+ <ol>
+ {% endif %}
+ {% for part in summary.parts %}
+ {% if part.title %}
+ {% if options.format == "mobi" %}
+ <blockquote>
+ <span>{{ part.title }}</span>
+ </blockquote>
+ {% else %}
+ <li class="part-title">
+ <span>{{ part.title }}</span>
+ </li>
+ {% endif %}
+ {% endif %}
+ {{ articles(part.articles) }}
+
+ {% if not loop.last and not options.format == "mobi" %}
+ <li class="divider"></li>
+ {% endif %}
+ {% endfor %}
+
+ {% if glossary.path %}
+ {% if options.format == "mobi" %}
+ <blockquote>
+ <span class="inner">
+ <a href="{{ ('/' + glossary.path)|contentURL }}">{{ "GLOSSARY"|t }}</a>
+ </span>
+ </blockquote>
+ {% else %}
+ <li>
+ <span class="inner">
+ <a href="{{ ('/' + glossary.path)|contentURL }}">{{ "GLOSSARY"|t }}</a>
+ </span>
+ </li>
+ {% endif %}
+ {% endif %}
+ {% if options.format == "mobi" %}
+ </blockquote>
+ {% else %}
+ </ol>
+ {% endif %}
+</div>
+{% endblock %}
+
diff --git a/_layouts/layout.html b/_layouts/layout.html
new file mode 100644
index 0000000..884574c
--- /dev/null
+++ b/_layouts/layout.html
@@ -0,0 +1,27 @@
+<!DOCTYPE HTML>
+<html lang="{{ config.language }}" {% if page.dir == "rtl" %}dir="rtl"{% endif %}>
+ <head>
+ <meta charset="UTF-8">
+ <meta content="text/html; charset=utf-8" http-equiv="Content-Type">
+ <title>{% block title %}{{ config.title|d("GitBook", true) }}{% endblock %}</title>
+ <meta http-equiv="X-UA-Compatible" content="IE=edge" />
+ <meta name="description" content="{% block description %}{% endblock %}">
+ <meta name="generator" content="GitBook {{ gitbook.version }}">
+ {% if config.author %}<meta name="author" content="{{ config.author }}">{% endif %}
+ {% if config.isbn %}<meta name="identifier" content="{{ config.isbn }}" scheme="ISBN">{% endif %}
+ {% block style %}
+ {% for resource in plugins.resources.css %}
+ {% if resource.url %}
+ <link rel="stylesheet" href="{{ resource.url }}">
+ {% else %}
+ <link rel="stylesheet" href="{{ resource.path|resolveAsset }}">
+ {% endif %}
+ {% endfor %}
+ {% endblock %}
+ {% block head %}{% endblock %}
+ </head>
+ <body>
+ {% block body %}{% endblock %}
+ {% block javascript %}{% endblock %}
+ </body>
+</html>
diff --git a/_layouts/website/footer.html b/_layouts/website/footer.html
new file mode 100644
index 0000000..c37da01
--- /dev/null
+++ b/_layouts/website/footer.html
@@ -0,0 +1,17 @@
+{% block book_footer %}
+<div>
+ <hr>
+ {% if book.draft %}
+ <h2>
+ <div style="position:absolute;text-align:left">{{ book.title }}</div>
+ <div style="position:absolute;width:100%;text-align:center">DRAFT [{{ gitbook.time|date('MM/DD/YYYY hh:mm:ss') }}]</div>
+ <div style="text-align:right">{{ book.version }}</div>
+ </h2>
+ {% else %}
+ <h2>
+ <div style="position:absolute;text-align:left">{{ book.title }}</div>
+ <div style="text-align:right">{{ book.version }}</div>
+ </h2>
+ {% endif %}
+</div>
+{% endblock %}
diff --git a/_layouts/website/header.html b/_layouts/website/header.html
new file mode 100644
index 0000000..2e5971c
--- /dev/null
+++ b/_layouts/website/header.html
@@ -0,0 +1,31 @@
+{% block book_header %}
+<div class="book-header" role="navigation">
+ {% if glossary.path %}
+ <a href="{{ ('/' + glossary.path)|resolveFile }}" class="btn pull-left" aria-label="{{ "GLOSSARY_OPEN"|t }}"><i class="fa fa-sort-alpha-asc"></i></a>
+ {% endif %}
+
+ <!-- Title -->
+ <h1>
+ <i class="fa fa-circle-o-notch fa-spin"></i>
+ <a href="{{ "/"|resolveFile }}" >{{ page.title }}</a>
+ </h1>
+</div>
+<div>
+ <!--
+ <img style="float:left; align:middle; height:2em" src="media/TianocoreTitlePageLogo.jpg"/>
+ -->
+ {% if book.draft %}
+ <h2>
+ <div style="position:absolute;text-align:left">{{ book.title }}</div>
+ <div style="position:absolute;width:100%;text-align:center">DRAFT [{{ gitbook.time|date('MM/DD/YYYY hh:mm:ss') }}]</div>
+ <div style="text-align:right">{{ book.version }}</div>
+ </h2>
+ {% else %}
+ <h2>
+ <div style="position:absolute;text-align:left">{{ book.title }}</div>
+ <div style="text-align:right">{{ book.version }}</div>
+ </h2>
+ {% endif %}
+ <hr>
+</div>
+{% endblock %}
diff --git a/_layouts/website/languages.html b/_layouts/website/languages.html
new file mode 100644
index 0000000..a9d43be
--- /dev/null
+++ b/_layouts/website/languages.html
@@ -0,0 +1,19 @@
+{% extends "./layout.html" %}
+
+{% block title %}{{ "LANGS_CHOOSE"|t }} · {{ super() }}{% endblock %}
+
+{% block body %}
+<div class="book-langs-index" role="navigation">
+ <div class="inner">
+ <h3>{{ "LANGS_CHOOSE"|t }}</h3>
+
+ <ul class="languages">
+ {% for lang in languages.list %}
+ <li>
+ <a href="{{ (lang.id + "/README.md")|contentURL }}">{{ lang.title }}</a>
+ </li>
+ {% endfor %}
+ </ul>
+ </div>
+</div>
+{% endblock %}
diff --git a/_layouts/website/layout.html b/_layouts/website/layout.html
new file mode 100644
index 0000000..5fa7fe8
--- /dev/null
+++ b/_layouts/website/layout.html
@@ -0,0 +1,28 @@
+{% extends "layout.html" %}
+
+{% block head %}
+ {{ super() }}
+ <meta name="HandheldFriendly" content="true"/>
+ <meta name="viewport" content="width=device-width, initial-scale=1, user-scalable=no">
+ <meta name="apple-mobile-web-app-capable" content="yes">
+ <meta name="apple-mobile-web-app-status-bar-style" content="black">
+ <link rel="apple-touch-icon-precomposed" sizes="152x152" href="{{ "images/apple-touch-icon-precomposed-152.png"|resolveAsset }}">
+ <link rel="shortcut icon" href="{{ "images/favicon.ico"|resolveAsset }}" type="image/x-icon">
+{% endblock %}
+
+{% block style %}
+ {### Include theme css before plugins css ###}
+ <link rel="stylesheet" href="{{ "style.css"|resolveAsset }}">
+
+ {{ super() }}
+
+ {### Custom stylesheets for the book ###}
+
+ {% for type, style in config.styles %}
+ {% if fileExists(style) and type == "website" %}
+ <link rel="stylesheet" href="{{ style|resolveFile }}">
+ {% endif %}
+ {% endfor %}
+{% endblock %}
+
+{% block body %}{% endblock %}
diff --git a/_layouts/website/page.html b/_layouts/website/page.html
new file mode 100644
index 0000000..d78a348
--- /dev/null
+++ b/_layouts/website/page.html
@@ -0,0 +1,86 @@
+{% extends "./layout.html" %}
+
+{% block title %}{{ page.title }} · {{ super() }}{% endblock %}
+
+{% block description %}{{ page.description }}{% endblock %}
+
+{% block head %}
+ {{ super() }}
+ {% if page.next and page.next.path %}
+ <link rel="next" href="{{ page.next.path|resolveFile }}" />
+ {% endif %}
+ {% if page.previous and page.previous.path %}
+ <link rel="prev" href="{{ page.previous.path|resolveFile }}" />
+ {% endif %}
+{% endblock %}
+
+{% block javascript %}
+ <script src="{{ "gitbook.js"|resolveAsset }}"></script>
+ <script src="{{ "theme.js"|resolveAsset }}"></script>
+ {% for resource in plugins.resources.js %}
+ {% if resource.url %}
+ <script src="{{ resource.url }}"></script>
+ {% else %}
+ <script src="{{ resource.path|resolveAsset }}"></script>
+ {% endif %}
+ {% endfor %}
+{% endblock %}
+
+{% block body %}
+<div class="book">
+ <div class="book-summary">
+ {% block book_sidebar %}
+ {% block search_input %}{% endblock %}
+ {% block book_summary %}
+ <nav role="navigation">
+ {% include "website/summary.html" %}
+ </nav>
+ {% endblock %}
+ {% endblock %}
+ </div>
+
+ <div class="book-body">
+ {% block book_body %}
+ <div class="body-inner">
+ {% block book_inner %}
+ {% include "website/header.html" %}
+
+ <div class="page-wrapper" tabindex="-1" role="main">
+ <div class="page-inner">
+ {% block search_results %}
+ <section class="normal markdown-section">
+ {% block page %}
+ {{ page.content|safe }}
+ {% endblock %}
+ </section>
+ {% endblock %}
+ </div>
+ </div>
+
+ {% include "website/footer.html" %}
+ {% endblock %}
+ </div>
+
+ {% block book_navigation %}
+ {% if page.previous and page.previous.path %}
+ <a href="{{ page.previous.path|resolveFile }}{{ page.previous.anchor }}" class="navigation navigation-prev {% if not (page.next and page.next.path) %}navigation-unique{% endif %}" aria-label="Previous page: {{ page.previous.title }}">
+ <i class="fa fa-angle-left"></i>
+ </a>
+ {% endif %}
+ {% if page.next and page.next.path %}
+ <a href="{{ page.next.path|resolveFile }}{{ page.next.anchor }}" class="navigation navigation-next {% if not (page.previous and page.previous.path) %}navigation-unique{% endif %}" aria-label="Next page: {{ page.next.title }}">
+ <i class="fa fa-angle-right"></i>
+ </a>
+ {% endif %}
+ {% endblock %}
+ {% endblock %}
+ </div>
+
+ <script>
+ var gitbook = gitbook || [];
+ gitbook.push(function() {
+ gitbook.page.hasChanged({{ template.getJSContext()|dump|safe }});
+ });
+ </script>
+</div>
+{% endblock %}
diff --git a/_layouts/website/summary.html b/_layouts/website/summary.html
new file mode 100644
index 0000000..e43c954
--- /dev/null
+++ b/_layouts/website/summary.html
@@ -0,0 +1,61 @@
+{% macro articles(_articles) %}
+ {% for article in _articles %}
+ <li class="chapter {% if article.path == file.path and not article.anchor %}active{% endif %}" data-level="{{ article.level }}" {% if article.path %}data-path="{{ article.path|resolveFile }}"{% endif %}>
+ {% if article.path and getPageByPath(article.path) %}
+ <a href="{{ article.path|resolveFile }}{{ article.anchor }}">
+ {% elif article.url %}
+ <a target="_blank" href="{{ article.url }}">
+ {% else %}
+ <span>
+ {% endif %}
+ {% if article.level != "0" and config.pluginsConfig['theme-default'].showLevel %}
+ <b>{{ article.level }}.</b>
+ {% endif %}
+ {{ article.title }}
+ {% if article.path or article.url %}
+ </a>
+ {% else %}
+ </span>
+ {% endif %}
+
+ {% if article.articles.length > 0 %}
+ <ul class="articles">
+ {{ articles(article.articles, file, config) }}
+ </ul>
+ {% endif %}
+ </li>
+ {% endfor %}
+{% endmacro %}
+
+<ul class="summary">
+ {% set _divider = false %}
+ {% if config.links.sidebar %}
+ {% for linkTitle, link in config.links.sidebar %}
+ {% set _divider = true %}
+ <li>
+ <a href="{{ link }}" target="_blank" class="custom-link">{{ linkTitle }}</a>
+ </li>
+ {% endfor %}
+ {% endif %}
+
+ {% if _divider %}
+ <li class="divider"></li>
+ {% endif %}
+
+ {% for part in summary.parts %}
+ {% if part.title %}
+ <li class="header">{{ part.title }}</li>
+ {% elif not loop.first %}
+ <li class="divider"></li>
+ {% endif %}
+ {{ articles(part.articles, file, config) }}
+ {% endfor %}
+
+ <li class="divider"></li>
+
+ <li>
+ <a href="https://www.gitbook.com" target="blank" class="gitbook-link">
+ {{ "GITBOOK_LINK"|t }}
+ </a>
+ </li>
+</ul>
diff --git a/styles/epub.css b/styles/epub.css
index b9729f1..56f8394 100644
--- a/styles/epub.css
+++ b/styles/epub.css
@@ -1,235 +1,48 @@
-/* CSS for pdf */
-
-body {
- background: #f1f1f1;
- border-top: 10px solid #999999;
- font-size: 12pt;
-}
-
-#mainbody {
- margin-left: auto;
- margin-right: auto;
- width: 60em;
-}
-
-#topbar {
- top: 0;
- left: 0;
- bottom: 0;
- width: 60em;
- background: url("../images/header-bg.jpg") no-repeat;
- border-top: 10px solid #ff6600;
- margin-top: -10px;
- float: left;
-}
-
-#topbar.front-page {
- height: 13em;
-}
-
-#topbar #logo {
- position: relative;
- top: 85px;
- left: 20px;
-}
-
-#topbar #small-logo {
- position: relative;
- left: 20px;
- padding: 0.1em 0 0.1em 0;
- height: 3em;
-}
-
-#sidebar {
- float: left;
- z-index: 1;
- top: 0;
- left: 0;
- bottom: 0;
- padding: 2em 0.5em 0 0.5em;
- width: 9em;
-}
-
-div.main-page.content {
- float: left;
- width: 35em;
-}
-
-div.main-page.news {
- float: right;
- width: 20em;
-}
-
-div.main-page.news h2 {
- border-top: 10px solid #365f91;
- border-bottom: 1px solid #333333;
- color: #333333;
- padding: 0.5em;
- margin: 0;
-}
-
-div.main-page.news ul {
- margin: 0;
- list-style: none;
- list-style-image: none;
-}
-
-div.main-page.news ul li {
- border-bottom: 1px solid #333333;
- padding: 0.5em;
- color: #777777;
-}
-
-div.main-page.news ul li a {
- font-weight: bold;
-}
-
-div.news-page.news-item {
- border-top: 1px solid #777777;
- width: 100%;
- padding: 0;
- margin: 0;
-}
-
-#content {
- margin: 0px;
- padding: 2em 1em;
- font-family: Helvetica;
- color: #40494d;
- background-color: #fff;
- width: 100%;
- max-width: 60em;
- display: block;
- float: left;
-}
-
-#content #buttons a {
- background: #ff6600;
- color: #333333;
- font-family: "Helvetica";
- text-transform: uppercase;
- font-size: 15px;
- display: inline-block;
- padding: 8px 25px;
- margin: 10px 20px 10px 0;
-}
-
-#footer {
- background: #999999;
- margin-bottom: 60px;
- width: 100%;
- float: left;
- padding: 0.5em 1em;
-}
-#footer #footer-inner {
- height: 2em;
- background: url("../images/footer-icon.svg") no-repeat right center;
-}
-#footer #footer-inner a {
- color: white;
- font-size: 14px;
-}
-@media (min-width: 0em) and (max-width: 63.9375em) {
- #footer #footer-inner {
- padding: 10px 20px;
- background-position: right 20px center;
- }
-}
-@media (min-width: 64em) {
- #page-wrapper #page #footer-inner {
- -sgs-span-settings: ("span": 3, "location": 2, "grid": 20px 630px 20px 310px 20px, "gutter": 0.25, "style": "opposite", "start row": false, "end row": false, "fixed gutter": true, "split gutter": false, "gutter property": "padding", "options": (("both": null)));
- width: 96%;
- float: left;
- margin-right: -100%;
- margin-left: 2%;
- clear: none;
- padding-right: 0.25;
- }
-}
-@media (min-width: 0em) and (max-width: 63.9375em) {
- #page-wrapper #page #footer-inner {
- -sgs-span-settings: ("span": 1, "location": 1, "grid": 1, "gutter": 0.25, "style": "opposite", "start row": true, "end row": true, "fixed gutter": false, "split gutter": false, "gutter property": "margin", "options": ((null: null)));
- width: 100%;
- float: right;
- margin-left: 0;
- margin-right: 0;
- clear: none;
- }
-}
-
-ul {
- font-family: sans-serif;
- list-style-type: square;
- padding: 0 0 0 0;
- margin: 0.3em 0 0 1.5em;
-}
-
-.site-menu {
- color: #a0a0a0;
-}
-
-a.site-menu:hover {
- color: #4048c0;
-}
-
-a {
- color: #0860A8;
- text-decoration: none;
-}
-
-a:hover {
- color: #0860A8;
- text-decoration: underline;
+p {
+ font-family: sans, sans-serif, Arial;
}

-p {
- margin: .4em 0 .5em 0;
- line-height: 1.5em;
+body {
+ font-family: sans, sans-serif, Arial;
}

h1 {
color: #0860A8;
- font-family: "Helvetica";
font-weight: normal;
font-size: 190%;
text-transform: uppercase;
- margin-top: 0;
- margin-bottom: 0;
}

h2 {
color: #0860A8;
- font-family: "Helvetica";
font-size: 130%
}

h3 {
color: #0860A8;
font-weight: bold;
- font-size: 90%
+ font-size: 100%
}

h4 {
color: #0860A8;
- font-weight: bold;
font-size: 90%
}

-.t_projects th {
- background-color: #DBEBFF;
+h5 {
+ color: #0860A8;
+ font-weight: bold;
+ font-size: 90%;
}

-.t_projects table, th, td {
- border: 1px solid #ccc;
- font-size: 80%;
+h6 {
+ font-weight: bold;
+ font-size: 90%;
+ text-align: center;
}

-.section.toc {
- display: none;
+img {
+ max-width: 100%;
+ height: auto;
}
-
-/* TODO: Consider css for
- *
- * .posts .site .header .title .meta .footer .contact .rss .post
- */
-
\ No newline at end of file
+
diff --git a/styles/mobi.css b/styles/mobi.css
new file mode 100644
index 0000000..efa36c5
--- /dev/null
+++ b/styles/mobi.css
@@ -0,0 +1,50 @@
+p {
+ font-family: sans, sans-serif, Arial;
+}
+
+body {
+ font-family: sans, sans-serif, Arial;
+}
+
+h1 {
+ color: #0860A8;
+ font-weight: bold;
+ font-size: 170%;
+ text-transform: uppercase;
+}
+
+h2 {
+ color: #0860A8;
+ font-weight: bold;
+ font-size: 160%
+}
+
+h3 {
+ color: #0860A8;
+ font-weight: bold;
+ font-size: 150%
+}
+
+h4 {
+ color: #0860A8;
+ font-weight: bold;
+ font-size: 140%
+}
+
+h5 {
+ color: #0860A8;
+ font-weight: bold;
+ font-size: 130%;
+}
+
+h6 {
+ font-weight: bold;
+ font-size: 100%;
+ text-align: center;
+}
+
+img {
+ max-width: 100%;
+ height: auto;
+}
+
diff --git a/styles/pdf.css b/styles/pdf.css
index 56f3448..56f8394 100644
--- a/styles/pdf.css
+++ b/styles/pdf.css
@@ -1,233 +1,48 @@
-/* CSS for pdf */
-
-body {
- background: #f1f1f1;
- border-top: 10px solid #999999;
- font-size: 12pt;
-}
-
-#mainbody {
- margin-left: auto;
- margin-right: auto;
- width: 60em;
-}
-
-#topbar {
- top: 0;
- left: 0;
- bottom: 0;
- width: 60em;
- background: url("../images/header-bg.jpg") no-repeat;
- border-top: 10px solid #ff6600;
- margin-top: -10px;
- float: left;
-}
-
-#topbar.front-page {
- height: 13em;
-}
-
-#topbar #logo {
- position: relative;
- top: 85px;
- left: 20px;
-}
-
-#topbar #small-logo {
- position: relative;
- left: 20px;
- padding: 0.1em 0 0.1em 0;
- height: 3em;
-}
-
-#sidebar {
- float: left;
- z-index: 1;
- top: 0;
- left: 0;
- bottom: 0;
- padding: 2em 0.5em 0 0.5em;
- width: 9em;
-}
-
-div.main-page.content {
- float: left;
- width: 35em;
-}
-
-div.main-page.news {
- float: right;
- width: 20em;
-}
-
-div.main-page.news h2 {
- border-top: 10px solid #365f91;
- border-bottom: 1px solid #333333;
- color: #333333;
- padding: 0.5em;
- margin: 0;
-}
-
-div.main-page.news ul {
- margin: 0;
- list-style: none;
- list-style-image: none;
-}
-
-div.main-page.news ul li {
- border-bottom: 1px solid #333333;
- padding: 0.5em;
- color: #777777;
-}
-
-div.main-page.news ul li a {
- font-weight: bold;
-}
-
-div.news-page.news-item {
- border-top: 1px solid #777777;
- width: 100%;
- padding: 0;
- margin: 0;
-}
-
-#content {
- margin: 0px;
- padding: 2em 1em;
- font-family: Helvetica;
- color: #40494d;
- background-color: #fff;
- width: 100%;
- max-width: 60em;
- display: block;
- float: left;
-}
-
-#content #buttons a {
- background: #ff6600;
- color: #333333;
- font-family: "Helvetica";
- text-transform: uppercase;
- font-size: 15px;
- display: inline-block;
- padding: 8px 25px;
- margin: 10px 20px 10px 0;
-}
-
-#footer {
- background: #999999;
- margin-bottom: 60px;
- width: 100%;
- float: left;
- padding: 0.5em 1em;
-}
-#footer #footer-inner {
- height: 2em;
- background: url("../images/footer-icon.svg") no-repeat right center;
-}
-#footer #footer-inner a {
- color: white;
- font-size: 14px;
-}
-@media (min-width: 0em) and (max-width: 63.9375em) {
- #footer #footer-inner {
- padding: 10px 20px;
- background-position: right 20px center;
- }
-}
-@media (min-width: 64em) {
- #page-wrapper #page #footer-inner {
- -sgs-span-settings: ("span": 3, "location": 2, "grid": 20px 630px 20px 310px 20px, "gutter": 0.25, "style": "opposite", "start row": false, "end row": false, "fixed gutter": true, "split gutter": false, "gutter property": "padding", "options": (("both": null)));
- width: 96%;
- float: left;
- margin-right: -100%;
- margin-left: 2%;
- clear: none;
- padding-right: 0.25;
- }
-}
-@media (min-width: 0em) and (max-width: 63.9375em) {
- #page-wrapper #page #footer-inner {
- -sgs-span-settings: ("span": 1, "location": 1, "grid": 1, "gutter": 0.25, "style": "opposite", "start row": true, "end row": true, "fixed gutter": false, "split gutter": false, "gutter property": "margin", "options": ((null: null)));
- width: 100%;
- float: right;
- margin-left: 0;
- margin-right: 0;
- clear: none;
- }
-}
-
-ul {
- font-family: sans-serif;
- list-style-type: square;
- padding: 0 0 0 0;
- margin: 0.3em 0 0 1.5em;
-}
-
-.site-menu {
- color: #a0a0a0;
-}
-
-a.site-menu:hover {
- color: #4048c0;
-}
-
-a {
- color: #0860A8;
- text-decoration: none;
-}
-
-a:hover {
- color: #0860A8;
- text-decoration: underline;
+p {
+ font-family: sans, sans-serif, Arial;
}

-p {
- margin: .4em 0 .5em 0;
- line-height: 1.5em;
+body {
+ font-family: sans, sans-serif, Arial;
}

h1 {
color: #0860A8;
- font-family: "Helvetica";
font-weight: normal;
font-size: 190%;
text-transform: uppercase;
- margin-top: 0;
- margin-bottom: 0;
}

h2 {
color: #0860A8;
- font-family: "Helvetica";
font-size: 130%
}

h3 {
color: #0860A8;
font-weight: bold;
- font-size: 90%
+ font-size: 100%
}

h4 {
color: #0860A8;
- font-weight: bold;
font-size: 90%
}

-
-.t_projects th {
- background-color: #DBEBFF;
+h5 {
+ color: #0860A8;
+ font-weight: bold;
+ font-size: 90%;
}

-.t_projects table, th, td {
- border: 1px solid #ccc;
- font-size: 80%;
+h6 {
+ font-weight: bold;
+ font-size: 90%;
+ text-align: center;
}

-
-/* TODO: Consider css for
- *
- * .posts .site .header .title .meta .footer .contact .rss .post
- */
-
\ No newline at end of file
+img {
+ max-width: 100%;
+ height: auto;
+}
+
diff --git a/styles/website.css b/styles/website.css
index a0df36a..56f8394 100644
--- a/styles/website.css
+++ b/styles/website.css
@@ -1,233 +1,48 @@
-/* CSS for website */
-/* CSS for website */
-
-body {
- background: #f1f1f1;
- border-top: 10px solid #999999;
- font-size: 12pt;
-}
-
-#mainbody {
- margin-left: auto;
- margin-right: auto;
- width: 60em;
-}
-
-#topbar {
- top: 0;
- left: 0;
- bottom: 0;
- width: 60em;
- background: url("../images/header-bg.jpg") no-repeat;
- border-top: 10px solid #ff6600;
- margin-top: -10px;
- float: left;
-}
-
-#topbar.front-page {
- height: 13em;
-}
-
-#topbar #logo {
- position: relative;
- top: 85px;
- left: 20px;
-}
-
-#topbar #small-logo {
- position: relative;
- left: 20px;
- padding: 0.1em 0 0.1em 0;
- height: 3em;
-}
-
-#sidebar {
- float: left;
- z-index: 1;
- top: 0;
- left: 0;
- bottom: 0;
- padding: 2em 0.5em 0 0.5em;
- width: 9em;
-}
-
-div.main-page.content {
- float: left;
- width: 35em;
-}
-
-div.main-page.news {
- float: right;
- width: 20em;
-}
-
-div.main-page.news h2 {
- border-top: 10px solid #365f91;
- border-bottom: 1px solid #333333;
- color: #333333;
- padding: 0.5em;
- margin: 0;
-}
-
-div.main-page.news ul {
- margin: 0;
- list-style: none;
- list-style-image: none;
-}
-
-div.main-page.news ul li {
- border-bottom: 1px solid #333333;
- padding: 0.5em;
- color: #777777;
-}
-
-div.main-page.news ul li a {
- font-weight: bold;
-}
-
-div.news-page.news-item {
- border-top: 1px solid #777777;
- width: 100%;
- padding: 0;
- margin: 0;
-}
-
-#content {
- margin: 0px;
- padding: 2em 1em;
- font-family: Helvetica;
- color: #40494d;
- background-color: #fff;
- width: 100%;
- max-width: 60em;
- display: block;
- float: left;
-}
-
-#content #buttons a {
- background: #ff6600;
- color: #333333;
- font-family: "Helvetica";
- text-transform: uppercase;
- font-size: 15px;
- display: inline-block;
- padding: 8px 25px;
- margin: 10px 20px 10px 0;
-}
-
-#footer {
- background: #999999;
- margin-bottom: 60px;
- width: 100%;
- float: left;
- padding: 0.5em 1em;
-}
-#footer #footer-inner {
- height: 2em;
- background: url("../images/footer-icon.svg") no-repeat right center;
-}
-#footer #footer-inner a {
- color: white;
- font-size: 14px;
-}
-@media (min-width: 0em) and (max-width: 63.9375em) {
- #footer #footer-inner {
- padding: 10px 20px;
- background-position: right 20px center;
- }
-}
-@media (min-width: 64em) {
- #page-wrapper #page #footer-inner {
- -sgs-span-settings: ("span": 3, "location": 2, "grid": 20px 630px 20px 310px 20px, "gutter": 0.25, "style": "opposite", "start row": false, "end row": false, "fixed gutter": true, "split gutter": false, "gutter property": "padding", "options": (("both": null)));
- width: 96%;
- float: left;
- margin-right: -100%;
- margin-left: 2%;
- clear: none;
- padding-right: 0.25;
- }
-}
-@media (min-width: 0em) and (max-width: 63.9375em) {
- #page-wrapper #page #footer-inner {
- -sgs-span-settings: ("span": 1, "location": 1, "grid": 1, "gutter": 0.25, "style": "opposite", "start row": true, "end row": true, "fixed gutter": false, "split gutter": false, "gutter property": "margin", "options": ((null: null)));
- width: 100%;
- float: right;
- margin-left: 0;
- margin-right: 0;
- clear: none;
- }
-}
-
-ul {
- font-family: sans-serif;
- list-style-type: square;
- padding: 0 0 0 0;
- margin: 0.3em 0 0 1.5em;
-}
-
-.site-menu {
- color: #a0a0a0;
-}
-
-a.site-menu:hover {
- color: #4048c0;
-}
-
-a {
- color: #0860A8;
- text-decoration: none;
-}
-
-a:hover {
- color: #0860A8;
- text-decoration: underline;
+p {
+ font-family: sans, sans-serif, Arial;
}

-p {
- margin: .4em 0 .5em 0;
- line-height: 1.5em;
+body {
+ font-family: sans, sans-serif, Arial;
}

h1 {
color: #0860A8;
- font-family: "Helvetica";
font-weight: normal;
font-size: 190%;
text-transform: uppercase;
- margin-top: 0;
- margin-bottom: 0;
}

h2 {
color: #0860A8;
- font-family: "Helvetica";
font-size: 130%
}

h3 {
color: #0860A8;
font-weight: bold;
- font-size: 90%
+ font-size: 100%
}
+
h4 {
color: #0860A8;
- font-weight: bold;
font-size: 90%
}

-
-.t_projects th {
- background-color: #DBEBFF;
+h5 {
+ color: #0860A8;
+ font-weight: bold;
+ font-size: 90%;
}

-.t_projects table, th, td {
- border: 1px solid #ccc;
- font-size: 80%;
+h6 {
+ font-weight: bold;
+ font-size: 90%;
+ text-align: center;
}

-
-/* TODO: Consider css for
- *
- * .posts .site .header .title .meta .footer .contact .rss .post
- */
-
+img {
+ max-width: 100%;
+ height: auto;
+}
+
--
2.29.2.windows.2


[tianocore-docs][ATBB-Memory_Protection_in_UEFI_BIOS][Patch 1/2] Clean up format and layout to match template

Michael D Kinney
 

* Move figures from assets directory to media directory
* Remove non ASCII characters
* Add Figure to TOC
* Add missing file headers

Cc: Jiewen Yao <jiewen.yao@...>
Cc: Vincent Zimmer <vincent.zimmer@...>
Cc: Laurie Jarlstrom <laurie.jarlstrom@...>
Cc: Kevin Shaw <kevin.w.shaw@...>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@...>
---
README.md | 36 ++---
SUMMARY.md | 38 +++++
assets/Tianocore_logo2.png | Bin 7360 -> 0 bytes
authors.md | 31 ++++
book.json | 9 ++
cover.jpg | Bin 0 -> 211343 bytes
executive-summary.md | 31 ++++
glossary.md | 68 ++++++---
.../Fig1- SMRAM memory protection.jpg | Bin
.../Fig2 - Mapping of Protection in SMM.jpg | Bin
...g3 - Page table enforced memory layout.jpg | Bin
.../Fig4 - UEFI memory protection.jpg | Bin
media/TianocoreTitlePageLogo.jpg | Bin 0 -> 44499 bytes
memory-protection-in-SMM.md | 134 ++++++++++--------
memory-protection-in-uefi.md | 104 +++++++++-----
references.md | 50 +++++--
16 files changed, 359 insertions(+), 142 deletions(-)
delete mode 100644 assets/Tianocore_logo2.png
create mode 100644 book.json
create mode 100644 cover.jpg
rename {assets => media}/Fig1- SMRAM memory protection.jpg (100%)
rename {assets => media}/Fig2 - Mapping of Protection in SMM.jpg (100%)
rename {assets => media}/Fig3 - Page table enforced memory layout.jpg (100%)
rename {assets => media}/Fig4 - UEFI memory protection.jpg (100%)
create mode 100644 media/TianocoreTitlePageLogo.jpg

diff --git a/README.md b/README.md
index 6bc2a7b..f470c6e 100644
--- a/README.md
+++ b/README.md
@@ -29,30 +29,29 @@

-->

-![](/assets/Tianocore_logo2.png)
+<img src="media/TianocoreTitlePageLogo.jpg" width="300" />

-#####White Paper
+### {{ book.title }}

+{% if book.draft %}
+** DRAFT FOR REVIEW **
+{% else %}
+** {{ book.version }} **
+{% endif %}

-# A Tour Beyond BIOS - Memory Protection in UEFI BIOS
+** {{ gitbook.time|date('MM/DD/YYYY hh:mm:ss') }} **

+{% if book.udkrelease %}
+** {{ book.udkrelease }} **
+{% endif %}

-
- _Jiewen Yao_,
+ _Jiewen Yao_,
_Intel Corporation_

-
-
-
-
- _Vincent J. Zimmer _,
+ _Vincent J. Zimmer _,
_Intel Corporation_

-
-
-##### March 2017
-
-## Acknowledgements
+### Acknowledgements

Redistribution and use in source (original document form) and 'compiled'
forms (converted to PDF, epub, HTML and other formats) with or without
@@ -78,7 +77,12 @@ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF
ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

-Copyright &#169; 2007-2017, Intel Corporation. All rights reserved.
+Copyright (c) 2007-2017, Intel Corporation. All rights reserved.
+
+### Revision History

+| Revision | Revision History | Date |
+| ---------- | ------------------ | ----------- |
+| 1.0 | Initial release. | March 2017 |


diff --git a/SUMMARY.md b/SUMMARY.md
index dcce47b..b0250f0 100644
--- a/SUMMARY.md
+++ b/SUMMARY.md
@@ -1,3 +1,34 @@
+<!--- @file
+ Summary
+
+ Copyright (c) 2008-2017, Intel Corporation. All rights reserved.<BR>
+
+ Redistribution and use in source (original document form) and 'compiled'
+ forms (converted to PDF, epub, HTML and other formats) with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code (original document form) must retain the
+ above copyright notice, this list of conditions and the following
+ disclaimer as the first lines of this file unmodified.
+
+ 2) Redistributions in compiled form (transformed to other DTDs, converted to
+ PDF, epub, HTML and other formats) must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ THIS DOCUMENTATION IS PROVIDED BY TIANOCORE PROJECT "AS IS" AND ANY EXPRESS OR
+ IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ EVENT SHALL TIANOCORE PROJECT BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF
+ ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+-->
+
# Summary

* [Introduction](README.md)
@@ -8,3 +39,10 @@
* [References](references.md)
* [Authors](authors.md)

+---
+
+* Figures
+ * [Figure 1 - SMRAM memory protection](memory-protection-in-SMM.md#figure-1---smram-memory-protection)
+ * [Figure 2 - Mapping of Protection in SMM](memory-protection-in-SMM.md#figure-2---mapping-of-protection-in-smm)
+ * [Figure 3 - Page table enforced memory layout](memory-protection-in-SMM.md#figure-3---page-table-enforced-memory-layout)
+ * [Figure 4 - UEFI memory protection](memory-protection-in-uefi.md#figure-4---uefi-memory-protection)
diff --git a/assets/Tianocore_logo2.png b/assets/Tianocore_logo2.png
deleted file mode 100644
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GIT binary patch
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diff --git a/authors.md b/authors.md
index f120a97..b3987ff 100644
--- a/authors.md
+++ b/authors.md
@@ -1,3 +1,34 @@
+<!--- @file
+ Authors
+
+ Copyright (c) 2008-2017, Intel Corporation. All rights reserved.<BR>
+
+ Redistribution and use in source (original document form) and 'compiled'
+ forms (converted to PDF, epub, HTML and other formats) with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code (original document form) must retain the
+ above copyright notice, this list of conditions and the following
+ disclaimer as the first lines of this file unmodified.
+
+ 2) Redistributions in compiled form (transformed to other DTDs, converted to
+ PDF, epub, HTML and other formats) must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ THIS DOCUMENTATION IS PROVIDED BY TIANOCORE PROJECT "AS IS" AND ANY EXPRESS OR
+ IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ EVENT SHALL TIANOCORE PROJECT BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF
+ ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+-->
+
## Authors
Jiewen Yao [jiewen.yao@...](mailto:jiewen.yao@...) is EDK II BIOS architect, EDK II FSP package maintainer, EDK II TPM2 module maintainer, EDK II ACPI S3 module maintainer, with Software and Services Group at Intel Corporation. Jiewen is member of UEFI Security Sub-team and PI Security Sub-team in the UEFI Forum.

diff --git a/book.json b/book.json
new file mode 100644
index 0000000..b553eb5
--- /dev/null
+++ b/book.json
@@ -0,0 +1,9 @@
+{
+ "variables" : {
+ "draft" : "yes",
+ "title" : "A Tour Beyond BIOS - Memory Protection in UEFI BIOS",
+ "version" : "Revision 1.0"
+ },
+ "plugins": ["puml-aleung"],
+ "pluginsConfig": {}
+}
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diff --git a/executive-summary.md b/executive-summary.md
index da95613..19c0569 100644
--- a/executive-summary.md
+++ b/executive-summary.md
@@ -1,3 +1,34 @@
+<!--- @file
+ Executive Summary
+
+ Copyright (c) 2008-2017, Intel Corporation. All rights reserved.<BR>
+
+ Redistribution and use in source (original document form) and 'compiled'
+ forms (converted to PDF, epub, HTML and other formats) with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code (original document form) must retain the
+ above copyright notice, this list of conditions and the following
+ disclaimer as the first lines of this file unmodified.
+
+ 2) Redistributions in compiled form (transformed to other DTDs, converted to
+ PDF, epub, HTML and other formats) must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ THIS DOCUMENTATION IS PROVIDED BY TIANOCORE PROJECT "AS IS" AND ANY EXPRESS OR
+ IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ EVENT SHALL TIANOCORE PROJECT BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF
+ ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+-->
+
# Executive Summary
## Introduction
**Data execution protection (DEP)** is intended to prevent an application or service from executing code from a non-executable memory region. This helps prevent certain exploits that store code via a buffer overflow. [[WindowsHeap][1]] shows 4 of 7 exploitation techniques that can be mitigated by DEP and ASLR (Address Space Layout Randomization). [[DEP][2]] also shows 14 of 19 exploits from popular exploit kits that fail with DEP enabled. Besides Windows, the Unix/Linux community also has similar non-executable protection [[PaX][3]].
diff --git a/glossary.md b/glossary.md
index f1eb67c..81a3bbb 100644
--- a/glossary.md
+++ b/glossary.md
@@ -1,51 +1,81 @@
+<!--- @file
+ Glossary
+
+ Copyright (c) 2008-2017, Intel Corporation. All rights reserved.<BR>
+
+ Redistribution and use in source (original document form) and 'compiled'
+ forms (converted to PDF, epub, HTML and other formats) with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code (original document form) must retain the
+ above copyright notice, this list of conditions and the following
+ disclaimer as the first lines of this file unmodified.
+
+ 2) Redistributions in compiled form (transformed to other DTDs, converted to
+ PDF, epub, HTML and other formats) must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ THIS DOCUMENTATION IS PROVIDED BY TIANOCORE PROJECT "AS IS" AND ANY EXPRESS OR
+ IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ EVENT SHALL TIANOCORE PROJECT BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF
+ ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+-->
+
# Glossary

-ASLR – Address Space Layout Randomization.
+ASLR - Address Space Layout Randomization.

BDA - BIOS Data Area.

-CSM – Compatibility Support Module.
+CSM - Compatibility Support Module.

-DEP – Data Execution Protection.
+DEP - Data Execution Protection.

EBDA - Extended BIOS Data Area

-HOB – Hand off block. See [[PI][1]].
+HOB - Hand off block. See [[PI][1]].

-MMIO – Memory Mapped I/O.
+MMIO - Memory Mapped I/O.

-NX – No Execution. See DEP.
+NX - No Execution. See DEP.

-PE/COFF – Portable Executable and Common Object File Format. The executable file format for UEFI.
+PE/COFF - Portable Executable and Common Object File Format. The executable file format for UEFI.

ROP - Return-oriented programming

-RO – Read Only.
+RO - Read Only.

-RW – Read/Write.
+RW - Read/Write.

-PCD – Platform configuration database. See [[PI][1]].
+PCD - Platform configuration database. See [[PI][1]].

-PF – Page Fault Exception.
+PF - Page Fault Exception.

-PI – Platform Initialization. Volume 1-5 of the UEFI PI specifications.
+PI - Platform Initialization. Volume 1-5 of the UEFI PI specifications.

-SPI – Serial Peripheral Interface.
+SPI - Serial Peripheral Interface.

TSS - Task-state segment. See [[IA32 SDM][2]].

-UEFI – Unified Extensible Firmware Interface. Firmware interface between the platform and the operating system. Predominate interfaces are in the boot services (BS) or pre-OS. Few runtime (RT) services.
+UEFI - Unified Extensible Firmware Interface. Firmware interface between the platform and the operating system. Predominate interfaces are in the boot services (BS) or pre-OS. Few runtime (RT) services.

-VTd – Virtualization for Directed IO. See [[VTd][3]]
+VTd - Virtualization for Directed IO. See [[VTd][3]]

-WP – Write Protect.
+WP - Write Protect.

-XD – Execution Disable. See DEP.
+XD - Execution Disable. See DEP.

-XP – Execution Protected. See DEP.
+XP - Execution Protected. See DEP.

[1]: http://uefi.org "PI"
-
[2]: https://software.intel.com/en-us/articles/intel-sdm "IA32SDM"
[3]: http://www.intel.com/content/www/us/en/embedded/technology/virtualization/vt-directed-io-spec.html "Vtd"

diff --git a/assets/Fig1- SMRAM memory protection.jpg b/media/Fig1- SMRAM memory protection.jpg
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diff --git a/assets/Fig3 - Page table enforced memory layout.jpg b/media/Fig3 - Page table enforced memory layout.jpg
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diff --git a/assets/Fig4 - UEFI memory protection.jpg b/media/Fig4 - UEFI memory protection.jpg
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diff --git a/memory-protection-in-SMM.md b/memory-protection-in-SMM.md
index ce89639..e9f21bb 100644
--- a/memory-protection-in-SMM.md
+++ b/memory-protection-in-SMM.md
@@ -1,13 +1,44 @@
+<!--- @file
+ Memory Protection in SMM
+
+ Copyright (c) 2008-2017, Intel Corporation. All rights reserved.<BR>
+
+ Redistribution and use in source (original document form) and 'compiled'
+ forms (converted to PDF, epub, HTML and other formats) with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code (original document form) must retain the
+ above copyright notice, this list of conditions and the following
+ disclaimer as the first lines of this file unmodified.
+
+ 2) Redistributions in compiled form (transformed to other DTDs, converted to
+ PDF, epub, HTML and other formats) must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ THIS DOCUMENTATION IS PROVIDED BY TIANOCORE PROJECT "AS IS" AND ANY EXPRESS OR
+ IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ EVENT SHALL TIANOCORE PROJECT BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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+ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF
+ ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+-->
+
# Memory Protection in SMM

-The SMM is an isolated execution environment according to Intel® 64 and IA-32 Architectures Software Developer’s Manual [[IA32SDM][1]]. The UEFI Platform Initialization [[PI][2]] specification volume 4 defines the SMM infrastructure. Figure 1 shows the SMM memory protection. **RO** designates read-only memory. **XD **designates execution-disabled memory.
+The SMM is an isolated execution environment according to Intel(R) 64 and IA-32 Architectures Software Developer's Manual [[IA32SDM][1]]. The UEFI Platform Initialization [[PI][2]] specification volume 4 defines the SMM infrastructure. Figure 1 shows the SMM memory protection. **RO** designates read-only memory. **XD **designates execution-disabled memory.

-![](/assets/Fig1- SMRAM memory protection.jpg)
-
-Figure 1 - SMRAM memory protection
+![](/media/Fig1- SMRAM memory protection.jpg)
+
+###### Figure 1 - SMRAM memory protection

## Protection for PE image
-In UEFI/PI firmware, the SMM image is a normal PE/COFF image loaded by the SmmCore. If a given section of the SMM image is page aligned, it may be protected according to the section attributes, such as read-only for the code and non-executable for data. See the top right of figure 1.
+In UEFI/PI firmware, the SMM image is a normal PE/COFF image loaded by the SmmCore. If a given section of the SMM image is page aligned, it may be protected according to the section attributes, such as read-only for the code and non-executable for data. See the top right of Figure 1.

In EDK II, the PiSmmCore (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/PiSmmCore/MemoryAttributesTable.c) checks the PE image alignment and builds an `EDKII_PI_SMM_MEMORY_ATTRIBUTES_TABLE ` (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Include/Guid/PiSmmMemoryAttributesTable.h) to record such information. If the PI SMM image is not page aligned, this table will not be published. If the `EDKII_PI_SMM_MEMORY_ATTRIBUTES_TABLE` is published, that means the `EfiRuntimeServicesCode` contains only code and it is ``EFI_MEMORY_RO``, and the `EfiRuntimeServicesData` contains only data and it is `EFI_MEMORY_XP`.

@@ -15,8 +46,8 @@ Later the PiSmmCpu driver (https://github.com/tianocore/edk2/blob/master/UefiCpu

There are several assumptions to support the PE image protection in SMM:

-1. The PE code section and data sections are not merged. If those 2 sections are merged, a #PF exception might be generated because the CPU might try to write a RO data item in the data section or execute a non-executable (NX) instruction in code section.
-2. The PE image can be protected if it is page aligned. There should not be any self-modified-code in the code region. If there is, a platform should not set this PE image to be page aligned.
+1. The PE code section and data sections are not merged. If those 2 sections are merged, a #PF exception might be generated because the CPU might try to write a RO data item in the data section or execute a non-executable (NX) instruction in code section.
+2. The PE image can be protected if it is page aligned. There should not be any self-modified-code in the code region. If there is, a platform should not set this PE image to be page aligned.

A platform may disable the XD in the UEFI environment, but this does not impact the SMM environment. The SMM environment may choose to always enable the XD upon SMM entry, and restore the XD state at the SMM exit point.

@@ -40,31 +71,31 @@ The IDT defines the entry point of the exception handler. If the IDT is updated,

This work is done by `PatchGdtIdtMap()` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c.

-However, the IA32 version GDT cannot be set to read-only if the stack guard feature is enabled. (https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c) The reason is that the IA32 stack guard needs to use a "_task switch_" to switch the stack, and the task switch needs to write the GDT and Task-State Segment (TSS). The X64 version of the GDT does not have such a problem because the X64 stack guard uses “_interrupt stack table (IST)_” to switch the stack. For details of the stack switch and exceptions, please refer to [[IA32SDM][1]].
+However, the IA32 version GDT cannot be set to read-only if the stack guard feature is enabled. (https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmFuncsArch.c) The reason is that the IA32 stack guard needs to use a "_task switch_" to switch the stack, and the task switch needs to write the GDT and Task-State Segment (TSS). The X64 version of the GDT does not have such a problem because the X64 stack guard uses "_interrupt stack table (IST)_" to switch the stack. For details of the stack switch and exceptions, please refer to [[IA32SDM][1]].

### Page Table
In an X86 CPU, we rely on the page table to set up the read-only or non-executable region. In order to prevent the page table itself from being updated, we may need to set the page table itself to be read-only.

The work is done at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c `SetPageTableAttributes()`.

-However, setting a page table to be read-only may break the original dynamic paging feature in SMM. There is a (PCD) ```PcdCpuSmmStaticPageTable ``` to determine if the platform wants to enable the static page table or the dynamic page table.
+However, setting a page table to be read-only may break the original dynamic paging feature in SMM. There is a (PCD) `PcdCpuSmmStaticPageTable` to determine if the platform wants to enable the static page table or the dynamic page table.

-If ```PcdCpuSmmStaticPageTable``` is FALSE, the PiSmmCpu uses the original dynamic paging policy, namely the the PiSmmCpu only sets 4GiB paging by default. If the PiSmmCpu needs to access above 4GiB memory locations, a page fault exception (#PF) exception is triggered and an above-4GiB mapping is created in the page fault handler.
+If `PcdCpuSmmStaticPageTable` is FALSE, the PiSmmCpu uses the original dynamic paging policy, namely the the PiSmmCpu only sets 4GiB paging by default. If the PiSmmCpu needs to access above 4GiB memory locations, a page fault exception (#PF) exception is triggered and an above-4GiB mapping is created in the page fault handler.

-If ```PcdCpuSmmStaticPageTable``` is TRUE, the PiSmmCpu will try to set the read-only attribute for the page table.
+If `PcdCpuSmmStaticPageTable` is TRUE, the PiSmmCpu will try to set the read-only attribute for the page table.

Figure 2 shows the mapping of the protection.

-![](/assets/Fig2 - Mapping of Protection in SMM.jpg)
+![](/media/Fig2 - Mapping of Protection in SMM.jpg)

-Figure 2 Mapping of Protection in SMM
+###### Figure 2 - Mapping of Protection in SMM

## Life cycle of the protection
-In a normal boot, the page table based protection is configured by the PiSmmCpu driver just after the SmmReadyToLock event by ```PerformRemainingTasks()``` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c. All read-only data must be ready before ```SmmReadyToLock```.
+In a normal boot, the page table based protection is configured by the PiSmmCpu driver just after the SmmReadyToLock event by `PerformRemainingTasks()` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c. All read-only data must be ready before `SmmReadyToLock`.

-In an S3 resume, the protection is disabled during SMBASE relocation because the PiSmmCpu needs to set up the environment. The PiSmmCpu uses SmmS3Cr3, which is generated by ```InitSmmS3Cr3()``` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c with 4G paging only. After the SMBASE relocation is done, all the protection takes effect up receipt of the next SMI by ```PerformPreTasks()``` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c.
+In an S3 resume, the protection is disabled during SMBASE relocation because the PiSmmCpu needs to set up the environment. The PiSmmCpu uses SmmS3Cr3, which is generated by `InitSmmS3Cr3()` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c with 4G paging only. After the SMBASE relocation is done, all the protection takes effect up receipt of the next SMI by `PerformPreTasks()` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c.

-If there is an additional lock that needs to be set, it can be done in ```SmmCpuFeaturesCompleteSmmReadyToLock()``` API (defined in https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h).
+If there is an additional lock that needs to be set, it can be done in `SmmCpuFeaturesCompleteSmmReadyToLock()` API (defined in https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/Include/Library/SmmCpuFeaturesLib.h).

## SMRAM Size Overhead
### PE image
@@ -80,29 +111,29 @@ In order to protect the page table itself, we must use the static page table ins
The size of the dynamic paging is fixed. We need 6 fixed pages (24K) and 8 on-demand pages (32K). The total size of the page table is 56K in this case.

The size of the static page table depends upon 2 things: 1) 1G paging capability, 2) max supported address bit. A rough estimation is below:
-1. If 1G paging is supported,
-* 32 bit addressing need (1+1+4) pages = 24K. (still use 2M paging for below 4G memory)
-* 39 bit addressing need (1+1+4) pages = 24K.
-* 48 bit addressing need (1+512) pages = 2M.
+1. If 1G paging is supported,
+* 32 bit addressing need (1+1+4) pages = 24K. (still use 2M paging for below 4G memory)
+* 39 bit addressing need (1+1+4) pages = 24K.
+* 48 bit addressing need (1+512) pages = 2M.
* If 1G paging is not supported, 2M paging is used.
-* 32 bit addressing need (1+1+4) pages = 24K.
-* 39 bit addressing need (1+1+512) pages = 2M.
-* 48 bit addressing need (1+512+512*512) pages = 1G. < - This seems ****not**** acceptable.
+* 32 bit addressing need (1+1+4) pages = 24K.
+* 39 bit addressing need (1+1+512) pages = 2M.
+* 48 bit addressing need (1+512+512*512) pages = 1G. < - This seems ****not**** acceptable.


-The maximum address bit is determined by the (CPU_HOB) if it is present, or the physical address bit returned by the CPUID instruction if the CPU_HOB is not present. (https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c, ```CalculateMaximumSupportAddress()```) A platform may set the CPU_HOB based upon the addressing capability of the memory controller or the CPU.
+The maximum address bit is determined by the (CPU_HOB) if it is present, or the physical address bit returned by the CPUID instruction if the CPU_HOB is not present. (https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c, `CalculateMaximumSupportAddress()`) A platform may set the CPU_HOB based upon the addressing capability of the memory controller or the CPU.

## Performance Overhead
-1. The SMRAM protection setup is a one-time activity. It happens just after the SmmReadyToLock event. We do not observe too much impact to the system firmware boot performance. The activity only takes some small number of milliseconds.
+1. The SMRAM protection setup is a one-time activity. It happens just after the SmmReadyToLock event. We do not observe too much impact to the system firmware boot performance. The activity only takes some small number of milliseconds.

-2. The SMRAM runtime protection is based upon the page table. No additional CPU instruction is needed. As such, there is zero SMM runtime performance impact to have this protection.
+2. The SMRAM runtime protection is based upon the page table. No additional CPU instruction is needed. As such, there is zero SMM runtime performance impact to have this protection.

## Non SMRAM access in SMM
Besides the SMRAM, the SMM memory protection also limits the access to the non-SMRAM region.

First, the non-SMRAM region must be set to be non-executable because the SMM entities should not call any code outside SMRAM. Code outside of SMRAM might be controlled by malicious software.

-This protection work is done by ```InitPaging()``` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c
+This protection work is done by `InitPaging()` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c


Second, because of the security concerns regarding SMM entities accessing VMM memory, [[WindowsWSMT][3]] [[Wsmt.docx][4]] and [[MicrosoftHV][5]] introduced the Windows SMM Security Mitigations Table (WSMT). A platform needs to report the WSMT table in order to declare that the SMI handler will validate the SMM communication buffer.
@@ -113,13 +144,13 @@ A better way is to use an active check. The PiSmmCpu driver sets the non-fixed D

As such, if a platform SMI handler does not include the check recommended in [[SecureSmmComm][6]], the system will get #PF exception within SMM on such an attack.

-This protection work is done by ```SetUefiMemMapAttributes()``` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c.
+This protection work is done by `SetUefiMemMapAttributes()` at https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c.

Figure 3 shows final image layout.

- ![](/assets/Fig3 - Page table enforced memory layout.jpg)
+ ![](/media/Fig3 - Page table enforced memory layout.jpg)

-Figure 3 Page table enforced memory layout
+###### Figure 3 - Page table enforced memory layout

The assumption for non-SMRAM access in SMM is described in [[SecureSmmComm][6]].
Besides that, this solution assumes that all DRAM regions are added to the Global Coherency Domain (GCD) management before EndOfDxe, so that the UEFI memory map can return all DRAM regions. If there are more regions added to the GCD after EndOfDxe, those regions are not set to not-present in the page table.
@@ -128,52 +159,41 @@ NOTE: The SMM does not set the not-present bit for the GCD **EfiGcdMemoryTypeNon
## Limitation
Setting up RO and NX attribute for SMRAM is a good enhancement to prevent a code overriding attack. However it has some limitations:

-1. It cannot resist a Return-Oriented-Programming (ROP) attack. [[ROP][8]]. We might need ASLR to mitigate the ROP attack. [[ASLR][7]] With the code region randomized, an attacker cannot accurately predict the location of instructions in order to leverage gadgets.
-2. Not all important data structure are set to Read-Only. This is the current SMM driver limitation. The SMM driver can be updated to allocate the important structures to be read-only instead of a read-write global variable.
+1. It cannot resist a Return-Oriented-Programming (ROP) attack. [[ROP][8]]. We might need ASLR to mitigate the ROP attack. [[ASLR][7]] With the code region randomized, an attacker cannot accurately predict the location of instructions in order to leverage gadgets.
+2. Not all important data structure are set to Read-Only. This is the current SMM driver limitation. The SMM driver can be updated to allocate the important structures to be read-only instead of a read-write global variable.

To set not-present bit for non-fixed DRAM region in SmmReadyToLock is a good enhancement to enforce the protection policy. However, it cannot cover below cases:

-1. Memory Hot Plug. Take a server platform as the example, A RAS server may hot plug more DRAM during OS runtime, and rely on SMM to initialize those DRAM. This SMM Memory Initialization module may need access the DRAM for the memory test.
-2. Memory Mapped IO (MMIO). Ideally, not all MMIO regions are configured to be accessible to SMM. Some MMIO BARs are important such as VTd or SPI controller. VTd BAR is important because OS need setup VTd to configuration the DMA protection. SPI controller BAR is important because BIOS SMM handler need access it to program the flash device. It should be a platform policy to configure which one should be accessible. The SMI handler must consider the case that the MMIO BAR might be modified by the malicious software and check if the MMIO BAR is in the valid region.
+1. Memory Hot Plug. Take a server platform as the example, A RAS server may hot plug more DRAM during OS runtime, and rely on SMM to initialize those DRAM. This SMM Memory Initialization module may need access the DRAM for the memory test.
+2. Memory Mapped IO (MMIO). Ideally, not all MMIO regions are configured to be accessible to SMM. Some MMIO BARs are important such as VTd or SPI controller. VTd BAR is important because OS need setup VTd to configuration the DMA protection. SPI controller BAR is important because BIOS SMM handler need access it to program the flash device. It should be a platform policy to configure which one should be accessible. The SMI handler must consider the case that the MMIO BAR might be modified by the malicious software and check if the MMIO BAR is in the valid region.

## Compatibility Considerations
-1. So far, we have not observed self-modified-code in SMM image or executable code in data section. As such, we believe the PE image protection is compatible.
+1. So far, we have not observed self-modified-code in SMM image or executable code in data section. As such, we believe the PE image protection is compatible.

-2. The protection for the SMM communication buffer may cause a #PF exception in SMM if the SMI handler does not perform the check recommended in [[SecureSmmComm][6]].
+2. The protection for the SMM communication buffer may cause a #PF exception in SMM if the SMI handler does not perform the check recommended in [[SecureSmmComm][6]].

-3. Some legacy Compatibility Support Module (CSM) drivers may need co-work with SMM module. Then the SMM driver need access the legacy region. As such these memory regions should be allocated as ReservedMemory, such as BIOS data area (BDA) or extended BIOS data area (EBDA).
+3. Some legacy Compatibility Support Module (CSM) drivers may need co-work with SMM module. Then the SMM driver need access the legacy region. As such these memory regions should be allocated as ReservedMemory, such as BIOS data area (BDA) or extended BIOS data area (EBDA).

## Call for action
In order to support SMM memory protection, the firmware need configure SMM driver to be page aligned:
-1. Override link flags below to support SMM memory protection.
- ```css
+1. Override link flags below to support SMM memory protection.
+ ```
[BuildOptions.common.EDKII.DXE_SMM_DRIVER,
- BuildOptions.common.EDKII.SMM_CORE]
- MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096
- GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
- ```
+ BuildOptions.common.EDKII.SMM_CORE]
+ MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096
+ GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
+ ```

-2. Evaluate if SMRAM size is big enough.
+2. Evaluate if SMRAM size is big enough.

#### Summary
This section introduces the memory protection in SMM.

[1]: https://software.intel.com/en-us/articles/intel-sdm "IA32SDM"
[2]: http://uefi.org "PI Spec"
-
-
-
[3]: https://msdn.microsoft.com/en-us/library/windows/hardware/dn495660(v=vs.85).aspx#wsmt "WindowsWSMT"
-
[4]: http://download.microsoft.com/download/1/8/A/18A21244-EB67-4538-BAA2-1A54E0E490B6/WSMT.docx "WindowsWSMT docx"
-[5]: https://msdn.microsoft.com/en-us/library/windows/hardware/dn614617 "MicrosoftHV"
-[6]: https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Secure_SMM_Communication.pdf "SecureSmmComm"
-
-
+[5]: https://msdn.microsoft.com/en-us/library/windows/hardware/dn614617 "MicrosoftHV"
+[6]: https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Secure_SMM_Communication.pdf "SecureSmmComm"
[7]: https://en.wikipedia.org/wiki/Address_space_layout_randomization "ASLR"
-
[8]: https://en.wikipedia.org/wiki/Return-oriented_programming "ROP"
-
-
-
- 
diff --git a/memory-protection-in-uefi.md b/memory-protection-in-uefi.md
index 635e0f8..255663d 100644
--- a/memory-protection-in-uefi.md
+++ b/memory-protection-in-uefi.md
@@ -1,24 +1,55 @@
+<!--- @file
+ Memory Protection in UEFI
+
+ Copyright (c) 2008-2017, Intel Corporation. All rights reserved.<BR>
+
+ Redistribution and use in source (original document form) and 'compiled'
+ forms (converted to PDF, epub, HTML and other formats) with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code (original document form) must retain the
+ above copyright notice, this list of conditions and the following
+ disclaimer as the first lines of this file unmodified.
+
+ 2) Redistributions in compiled form (transformed to other DTDs, converted to
+ PDF, epub, HTML and other formats) must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ THIS DOCUMENTATION IS PROVIDED BY TIANOCORE PROJECT "AS IS" AND ANY EXPRESS OR
+ IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ EVENT SHALL TIANOCORE PROJECT BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF
+ ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+-->
+
# Memory Protection in UEFI
In the white paper [[MemMap][1]], we discussed to how to report the runtime memory attribute by using `EFI_MEMORY_ATTRIBUTES_TABLE`, so that OS can apply the protection for the runtime code and data. This may bring some compatibility concerns if we choose to adopt the full DEP protection for the entire UEFI memory.


In order to resolve the compatibility concerns, we can define a policy-based setting to enable partial NX and RO protection for the UEFI memory region. The detailed information will be discussed below.
-![](/assets/Fig4 - UEFI memory protection.jpg)
-
-Figure 4 - UEFI memory protection
+![](/media/Fig4 - UEFI memory protection.jpg)
+
+###### Figure 4 - UEFI memory protection

## Protection for PE image
The DXE core may apply a pre-defined policy to set up the NX attribute for the PE data region and the RO attribute for the PE code region.

-1. The image is loaded by the UEFI boot service - `LoadImage()`. If an image is loaded in some other way, the DXE core does not have such knowledge and the DXE core cannot apply any protection.
-2. The image section is page aligned. If an image is not page aligned, the DXE core cannot apply the page level protection.
-3. The protection policy can be based upon a PCD ‘PcdImageProtectionPolicy`. (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/MdeModulePkg.dec) Whenever a new image is loaded, the DxeCore checks the source of the image and then decides the policy of the protection. The policy could be to enable the protection if the sections are aligned, or disable the protection. The platform may choose the policy based upon the need. For example, if a platform thinks the image from the firmware volume should be capable of being protection, it can set protection for IMAGE_FROM_FV. But if a platform is not sure about a PCI option ROM or a file system on disk, it can set no-protection.
+1. The image is loaded by the UEFI boot service - `LoadImage()`. If an image is loaded in some other way, the DXE core does not have such knowledge and the DXE core cannot apply any protection.
+2. The image section is page aligned. If an image is not page aligned, the DXE core cannot apply the page level protection.
+3. The protection policy can be based upon a PCD `PcdImageProtectionPolicy`. (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/MdeModulePkg.dec) Whenever a new image is loaded, the DxeCore checks the source of the image and then decides the policy of the protection. The policy could be to enable the protection if the sections are aligned, or disable the protection. The platform may choose the policy based upon the need. For example, if a platform thinks the image from the firmware volume should be capable of being protection, it can set protection for IMAGE_FROM_FV. But if a platform is not sure about a PCI option ROM or a file system on disk, it can set no-protection.

There are assumptions for the PE image protection in UEFI:

-1. [Same as SMM] The PE code section and data sections are not merged. If those 2 sections are merged, a #PF exception might be generated because the CPU may try to write a RO data in data section or execute a NX instruction in the code section.
-2. [Same as SMM] The PE image can be protected if it is page aligned. There should not be any self-modifying-code in the code region. If there is, a platform should not set this PE image to be page aligned.
-3. A platform may not disable the XD in the DXE phase. If a platform disables the XD in the DXE phase, the X86 page table will become invalid because the XD bit in page table becomes a RESERVED bit. The consequence is that a #PF exception will be generated. If a platform wants to disable the XD bit, it must happen in the PEI phase.
+1. [Same as SMM] The PE code section and data sections are not merged. If those 2 sections are merged, a #PF exception might be generated because the CPU may try to write a RO data in data section or execute a NX instruction in the code section.
+2. [Same as SMM] The PE image can be protected if it is page aligned. There should not be any self-modifying-code in the code region. If there is, a platform should not set this PE image to be page aligned.
+3. A platform may not disable the XD in the DXE phase. If a platform disables the XD in the DXE phase, the X86 page table will become invalid because the XD bit in page table becomes a RESERVED bit. The consequence is that a #PF exception will be generated. If a platform wants to disable the XD bit, it must happen in the PEI phase.

In EDK II, the DXE core image services calls `ProtectUefiImage()` on image load and `UnprotectUefiImage()` on image unload. (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Image/Image.c) Then `ProtectUefiImageCommon()` (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c) calls `GetUefiImageProtectionPolicy()` to check the image source and protection policy and parses PE alignment. If all checks pass, `SetUefiImageProtectionAttributes()` calls `SetUefiImageMemoryAttributes()`. Finally, `gCpu->SetMemoryAttribute()` sets **EFI_MEMORY_XP** or **EFI_MEMORY_RO** for the new loaded image , or clears the protection for the old unloaded image. When the CPU driver gets the memory attribute setting request, it updates page table.

@@ -26,22 +57,22 @@ The X86 CPU driver https://github.com/tianocore/edk2/blob/master/UefiCpuPkg/CpuD

The ARM CPU driver https://github.com/tianocore/edk2/blob/master/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c `CpuSetMemoryAttributes()` also has similar capability.

-If an image is loaded before CPU_ARCH protocol is ready, the DXE core just skips the setting. Later these images protection will be set in CPU_ARCH callback function – `MemoryProtectionCpuArchProtocolNotify() `(https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c).
+If an image is loaded before CPU_ARCH protocol is ready, the DXE core just skips the setting. Later these images protection will be set in CPU_ARCH callback function - `MemoryProtectionCpuArchProtocolNotify()`(https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c).

In `ExitBootServices` event, `MemoryProtectionExitBootServicesCallback() `(https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c) is invoked to unprotect the runtime image, because the runtime image code relocation need write code segment at `SetVirtualAddressMap()`.

## Protection for stack and heap
-[[UEFI][2]] specification allows
->"Stack may be marked as non-executable in identity mapped page tables."
+[[UEFI][2]] specification allows
+>"Stack may be marked as non-executable in identity mapped page tables."

As such, we set up the NX stack (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/DxeIplPeim/X64/VirtualMemory.c, `CreateIdentityMappingPageTables()`).



-The heap protection is based upon the policy, because we already observed some unexpected usage in [[MemMap][1]] white paper. A platform needs to configure a PCD `PcdDxeNxMemoryProtectionPolicy`
+The heap protection is based upon the policy, because we already observed some unexpected usage in [[MemMap][1]] white paper. A platform needs to configure a PCD `PcdDxeNxMemoryProtectionPolicy`
(https://github.com/tianocore/edk2/blob/master/MdeModulePkg/MdeModulePkg.dec) to indicate which type of memory can be set to NX in the page table. The DxeCore `ApplyMemoryProtectionPolicy()` (https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c) consumes the PCD after the memory allocation service and sets NX attribute for the allocated memory by using CPU_ARCH protocol.

-Before CPU_ARCH protocol is ready, the protection takes no effect. In CPU_ARCH callback function – `MemoryProtectionCpuArchProtocolNotify() `(https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c), the `InitializeDxeNxMemoryProtectionPolicy()` is called to get current memory map and setup the NX protection.
+Before CPU_ARCH protocol is ready, the protection takes no effect. In CPU_ARCH callback function - `MemoryProtectionCpuArchProtocolNotify() `(https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe/Misc/MemoryProtection.c), the `InitializeDxeNxMemoryProtectionPolicy()` is called to get current memory map and setup the NX protection.


In addition, we may use some special techniques, such as the guard page, to apply the protection for the allocated memory in order to detect a buffer overflow. This is discussed in [[SecurityEnhancement][3]] white paper.
@@ -58,10 +89,10 @@ The UEFI firmware does not own page tables after `ExitBootServices()`, so the OS

## Size Overhead

-1. Runtime memory overhead (visible to OS)
-: The size overhead of the runtime PE image is the same as the overhead of the SMM PE image. If a platform has n runtime images, the average amount overhead is `6K * n`.
-2. Boot time memory overhead (invisible to OS)
-: The size of the overhead for the boot time PE image is the same as the overhead of the SMM PE image. If a platform has n boot time images, the average overhead is `6K * n`.
+1. Runtime memory overhead (visible to OS)
+: The size overhead of the runtime PE image is the same as the overhead of the SMM PE image. If a platform has n runtime images, the average amount overhead is `6K * n`.
+2. Boot time memory overhead (invisible to OS)
+: The size of the overhead for the boot time PE image is the same as the overhead of the SMM PE image. If a platform has n boot time images, the average overhead is `6K * n`.

If the NX protection for data is enabled, the size of the page table is increased because we need set fine granularity page level protection.

@@ -70,10 +101,10 @@ The size overhead of the boot time page table is also same as for the SMM static
## Limitation
The protection in the UEFI is limited to the PE image and the stack at this moment because of the compatibility concerns. The limitations of the UEFI memory protection are:

-1. Not all images are protected to be NX and RO. The protection is based upon the policy.
-2. Not all heap regions are protected to be NX due to the compatibility concern. We observed that both Windows boot loader and Linux boot loader may use the LoaderData type for the code. The heap protection is based upon the policy.
-3. [Same as SMM] The protection cannot resist ROP attack.
-4. [Same as SMM] Not all important data structures are set to ReadOnly.
+1. Not all images are protected to be NX and RO. The protection is based upon the policy.
+2. Not all heap regions are protected to be NX due to the compatibility concern. We observed that both Windows boot loader and Linux boot loader may use the LoaderData type for the code. The heap protection is based upon the policy.
+3. [Same as SMM] The protection cannot resist ROP attack.
+4. [Same as SMM] Not all important data structures are set to ReadOnly.

## Compatibility Consideration
A platform may need to evaluate and select the image protection policy based upon the capability of the platform image, Option ROM, and OS loader. For platform images, the Compatibility Support Module (CSM) and the EDK-I Compatibility Package (ECP) modules should be considered. If a platform observes the compatibility issues, it should choose 1) to disable the protection, or 2) to fix the compatibility issue and enable the protection.
@@ -81,36 +112,31 @@ A platform may need to evaluate and select the image protection policy based upo
## Call for action
In order to support UEFI memory protection, the firmware need configure UEFI driver to be page aligned:

-1. Override link flags below to support UEFI runtime attribute table, so that OS can protect the runtime memory.
-```css
+1. Override link flags below to support UEFI runtime attribute table, so that OS can protect the runtime memory.
+```
[BuildOptions.IA32.EDKII.DXE_RUNTIME_DRIVER, BuildOptions.X64.EDKII.DXE_RUNTIME_DRIVER]
-MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096
+MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
```
-2. Override link flags below to support UEFI memory protection.
-```css
-[BuildOptions.common.EDKII.DXE_DRIVER,
-BuildOptions.common.EDKII.DXE_CORE,
+2. Override link flags below to support UEFI memory protection.
+```
+[BuildOptions.common.EDKII.DXE_DRIVER,
+BuildOptions.common.EDKII.DXE_CORE,
BuildOptions.common.EDKII.UEFI_DRIVER, BuildOptions.common.EDKII.UEFI_APPLICATION]
-MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096
+MSFT:*_*_*_DLINK_FLAGS = /ALIGN:4096
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000
```
-3. Evaluate if the UEFI memory size is big enough to hold the split page table.
+3. Evaluate if the UEFI memory size is big enough to hold the split page table.

-4. Evaluate if the DXE image can be protected.
+4. Evaluate if the DXE image can be protected.

-5. Set proper `gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy`.
-
-6. Set proper `gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy`.
+5. Set proper `gEfiMdeModulePkgTokenSpaceGuid.PcdImageProtectionPolicy`.

+6. Set proper `gEfiMdeModulePkgTokenSpaceGuid.PcdDxeNxMemoryProtectionPolicy`.

#### Summary
This section introduces the memory protection in UEFI.

[1]: https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Memory_Map_And_Practices_in_UEFI_BIOS_V2.pdf "MemMap"
-
-
[2]: http://uefi.org "UEFI"
-
-
[3]: https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Securiy_Enhancement_to_Mitigate_Buffer_Overflow_in_UEFI.pdf "Security Enhancment"
\ No newline at end of file
diff --git a/references.md b/references.md
index 23894e0..c9ffab7 100644
--- a/references.md
+++ b/references.md
@@ -1,10 +1,41 @@
+<!--- @file
+ References
+
+ Copyright (c) 2008-2017, Intel Corporation. All rights reserved.<BR>
+
+ Redistribution and use in source (original document form) and 'compiled'
+ forms (converted to PDF, epub, HTML and other formats) with or without
+ modification, are permitted provided that the following conditions are met:
+
+ 1) Redistributions of source code (original document form) must retain the
+ above copyright notice, this list of conditions and the following
+ disclaimer as the first lines of this file unmodified.
+
+ 2) Redistributions in compiled form (transformed to other DTDs, converted to
+ PDF, epub, HTML and other formats) must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+ THIS DOCUMENTATION IS PROVIDED BY TIANOCORE PROJECT "AS IS" AND ANY EXPRESS OR
+ IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO
+ EVENT SHALL TIANOCORE PROJECT BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
+ PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
+ OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
+ WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
+ OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS DOCUMENTATION, EVEN IF
+ ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+-->
+
# References

[ASLR] Address Space Layout Randmization, https://en.wikipedia.org/wiki/Address_space_layout_randomization

-[DEP] Exploit Mitigation Improvements in Windows 8, Ken Johnson, Ma, Miller, http://media.blackhat.com/bh-us-12/Briefings/M_Miller/BH_US_12_Miller_Exploit_Mitigation_Slides.pdf
+[DEP] Exploit Mitigation Improvements in Windows 8, Ken Johnson, Ma, Miller, http://media.blackhat.com/bh-us-12/Briefings/M_Miller/BH_US_12_Miller_Exploit_Mitigation_Slides.pdf

-[IA32SDM] Intel® 64 and IA-32 Architectures Software Developer’s Manual, www.intel.com https://software.intel.com/en-us/articles/intel-sdm
+[IA32SDM] Intel(R) 64 and IA-32 Architectures Software Developer's Manual, www.intel.com https://software.intel.com/en-us/articles/intel-sdm

[MemMap] A Tour Beyond BIOS Memory Map And Practices in UEFI BIOS, Jiewen Yao, Vincent Zimmer, 2016 https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Memory_Map_And_Practices_in_UEFI_BIOS_V2.pdf

@@ -12,25 +43,22 @@

[ROP] Return-oriented programming, https://en.wikipedia.org/wiki/Return-oriented_programming

-[SecureSmmComm] A Tour Beyond BIOS Secure SMM Communication, Jiewen Yao, Vincent Zimmer, Star Zeng, 2016, https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Secure_SMM_Communication.pdf
+[SecureSmmComm] A Tour Beyond BIOS Secure SMM Communication, Jiewen Yao, Vincent Zimmer, Star Zeng, 2016, https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Secure_SMM_Communication.pdf

[SecurityEnhancement] A Tour Beyond BIOS Securiy Enhancement to Mitigate Buffer Overflow in UEFI, Jiewen Yao, Vincent Zimmer, 2016, https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Securiy_Enhancement_to_Mitigate_Buffer_Overflow_in_UEFI.pdf

[SecurityDesign] A Tour Beyond BIOS Security Design Guide in EDK II, Jiewen Yao, Vincent Zimmer, 2016, https://github.com/tianocore-docs/Docs/raw/master/White_Papers/A_Tour_Beyond_BIOS_Security_Design_Guide_in_EDK_II.pdf

-[UEFI] Unified Extensible Firmware Interface (UEFI) Specification, Version 2.6
-www.uefi.org
+[UEFI] Unified Extensible Firmware Interface (UEFI) Specification, Version 2.6
+www.uefi.org

-[VTd] Intel® Virtualization Technology for Directed I/O: Spec, http://www.intel.com/content/www/us/en/embedded/technology/virtualization/vt-directed-io-spec.html
+[VTd] Intel(R) Virtualization Technology for Directed I/O: Spec, http://www.intel.com/content/www/us/en/embedded/technology/virtualization/vt-directed-io-spec.html

[WindowsHeap] Preventing the exploitation of user mode heap corruption vulnerabilities, 2009, https://blogs.technet.microsoft.com/srd/2009/08/04/preventing-the-exploitation-of-user-mode-heap-corruption-vulnerabilities/

[WindowsInternal] Windows Internals, 6th edition, Mark E. Russinovich, David A. Solomon, Alex Ionescu, 2012, Microsoft Press. ISBN-13: 978-0735648739/978-0735665873

[WindowsWSMT] Windows SMM Security Table, https://msdn.microsoft.com/en-us/library/windows/hardware/dn495660(v=vs.85).aspx#wsmt
-http://download.microsoft.com/download/1/8/A/18A21244-EB67-4538-BAA2-1A54E0E490B6/WSMT.docx
-
-[MicrosoftHV] Microsoft Hypervisor Requirements, https://msdn.microsoft.com/en-us/library/windows/hardware/dn614617
-
+http://download.microsoft.com/download/1/8/A/18A21244-EB67-4538-BAA2-1A54E0E490B6/WSMT.docx

- 
+[MicrosoftHV] Microsoft Hypervisor Requirements, https://msdn.microsoft.com/en-us/library/windows/hardware/dn614617
--
2.29.2.windows.2


[tianocore-docs][ATBB-Memory_Protection_in_UEFI_BIOS][Patch 0/2] Sync with template add Gitbook Action

Michael D Kinney
 

* Move figures from assets directory to media directory
* Remove non ASCII characters
* Add Figure to TOC
* Add missing file headers
* Add layout directory to match template
* Update CSS styles to match template
* Add GitBook Action

Cc: Jiewen Yao <jiewen.yao@...>
Cc: Vincent Zimmer <vincent.zimmer@...>
Cc: Laurie Jarlstrom <laurie.jarlstrom@...>
Cc: Kevin Shaw <kevin.w.shaw@...>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@...>

Michael D Kinney (2):
Clean up format and layout to match template
Update to match template and enable GitBook action

.bookignore | 3 +
.github/workflows/gitbook-action.yml | 39 +++
.gitignore | 10 +-
README.md | 36 +--
SUMMARY.md | 38 +++
_layouts/ebook/page.html | 42 ++++
_layouts/ebook/pdf_footer.html | 17 ++
_layouts/ebook/pdf_header.html | 14 ++
_layouts/ebook/summary.html | 98 ++++++++
_layouts/layout.html | 27 +++
_layouts/website/footer.html | 17 ++
_layouts/website/header.html | 31 +++
_layouts/website/languages.html | 19 ++
_layouts/website/layout.html | 28 +++
_layouts/website/page.html | 86 +++++++
_layouts/website/summary.html | 61 +++++
assets/Tianocore_logo2.png | Bin 7360 -> 0 bytes
authors.md | 31 +++
book.json | 9 +
cover.jpg | Bin 0 -> 211343 bytes
executive-summary.md | 31 +++
glossary.md | 68 ++++--
.../Fig1- SMRAM memory protection.jpg | Bin
.../Fig2 - Mapping of Protection in SMM.jpg | Bin
...g3 - Page table enforced memory layout.jpg | Bin
.../Fig4 - UEFI memory protection.jpg | Bin
media/TianocoreTitlePageLogo.jpg | Bin 0 -> 44499 bytes
memory-protection-in-SMM.md | 134 ++++++-----
memory-protection-in-uefi.md | 104 +++++---
references.md | 50 +++-
styles/epub.css | 221 ++---------------
styles/mobi.css | 50 ++++
styles/pdf.css | 221 ++---------------
styles/website.css | 223 ++----------------
34 files changed, 950 insertions(+), 758 deletions(-)
create mode 100644 .bookignore
create mode 100644 .github/workflows/gitbook-action.yml
create mode 100644 _layouts/ebook/page.html
create mode 100644 _layouts/ebook/pdf_footer.html
create mode 100644 _layouts/ebook/pdf_header.html
create mode 100644 _layouts/ebook/summary.html
create mode 100644 _layouts/layout.html
create mode 100644 _layouts/website/footer.html
create mode 100644 _layouts/website/header.html
create mode 100644 _layouts/website/languages.html
create mode 100644 _layouts/website/layout.html
create mode 100644 _layouts/website/page.html
create mode 100644 _layouts/website/summary.html
delete mode 100644 assets/Tianocore_logo2.png
create mode 100644 book.json
create mode 100644 cover.jpg
rename {assets => media}/Fig1- SMRAM memory protection.jpg (100%)
rename {assets => media}/Fig2 - Mapping of Protection in SMM.jpg (100%)
rename {assets => media}/Fig3 - Page table enforced memory layout.jpg (100%)
rename {assets => media}/Fig4 - UEFI memory protection.jpg (100%)
create mode 100644 media/TianocoreTitlePageLogo.jpg
create mode 100644 styles/mobi.css

--
2.29.2.windows.2


Re: [PATCH v1 1/1] Adding changes for issue with Certificate Validation Bug 2433 - HTTPS Certificate Enrollment Issue

Michael D Kinney
 

edk2.diff.order and tianocore.template should not be part of the patch.

The commit message does not follow the required format and is missing
Signed-off-by.

EDK II Dev Process:

https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Development-Process

EDK II Commit message format:

https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-Format

It would also help if you would join the EDK II mailing list on groups.io.

https://edk2.groups.io/g/devel

Thanks,

Mike

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of INDIA\sivaramann
Sent: Friday, December 11, 2020 4:09 AM
To: devel@edk2.groups.io
Subject: [edk2-devel] [PATCH v1 1/1] Adding changes for issue with Certificate Validation Bug 2433 - HTTPS Certificate
Enrollment Issue

---
NetworkPkg/HttpDxe/HttpsSupport.c | 16 +++++++++++-----
edk2.diff.order | 8 ++++++++
tianocore.template | 3 +++
3 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/NetworkPkg/HttpDxe/HttpsSupport.c b/NetworkPkg/HttpDxe/HttpsSupport.c
index 7e0bf85c3c42..5bf2ecec4baa 100644
--- a/NetworkPkg/HttpDxe/HttpsSupport.c
+++ b/NetworkPkg/HttpDxe/HttpsSupport.c
@@ -380,6 +380,7 @@ TlsConfigCertificate (
EFI_SIGNATURE_DATA *Cert;

UINTN CertArraySizeInBytes;

UINTN CertCount;

+ BOOLEAN CertValidFlag;

UINT32 ItemDataSize;



CACert = NULL;

@@ -493,6 +494,7 @@ TlsConfigCertificate (
//

ItemDataSize = (UINT32) CACertSize;

CertList = (EFI_SIGNATURE_LIST *) CACert;

+ CertValidFlag = 0;

while ((ItemDataSize > 0) && (ItemDataSize >= CertList->SignatureListSize)) {

Cert = (EFI_SIGNATURE_DATA *) ((UINT8 *) CertList + sizeof (EFI_SIGNATURE_LIST) + CertList->SignatureHeaderSize);

CertCount = (CertList->SignatureListSize - sizeof (EFI_SIGNATURE_LIST) - CertList->SignatureHeaderSize) / CertList-
SignatureSize;
@@ -506,17 +508,21 @@ TlsConfigCertificate (
Cert->SignatureData,

CertList->SignatureSize - sizeof (Cert->SignatureOwner)

);

- if (EFI_ERROR (Status)) {

- goto FreeCACert;

- }

+ if (!EFI_ERROR (Status)) {

+ CertValidFlag = 1;

+ }

+ else

+ break;



Cert = (EFI_SIGNATURE_DATA *) ((UINT8 *) Cert + CertList->SignatureSize);

}



ItemDataSize -= CertList->SignatureListSize;

CertList = (EFI_SIGNATURE_LIST *) ((UINT8 *) CertList + CertList->SignatureListSize);

- }

-

+

+ }

+ if(CertValidFlag == 1)

+ Status = EFI_SUCCESS;

FreeCACert:

FreePool (CACert);

return Status;

diff --git a/edk2.diff.order b/edk2.diff.order
new file mode 100644
index 000000000000..1d578ac28cca
--- /dev/null
+++ b/edk2.diff.order
@@ -0,0 +1,8 @@
+*.dec

+*.dsc.inc

+*.dsc

+*.fdf

+*.inf

+*.h

+*.vfr

+*.c

diff --git a/tianocore.template b/tianocore.template
new file mode 100644
index 000000000000..cfc4bdddc4cc
--- /dev/null
+++ b/tianocore.template
@@ -0,0 +1,3 @@
+[empty line]

+[empty line]

+Signed-off-by: Sivaraman <sivaramann@...>

--
2.28.0.windows.1



-=-=-=-=-=-=
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#68725): https://edk2.groups.io/g/devel/message/68725
Mute This Topic: https://groups.io/mt/78887450/1643496
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [michael.d.kinney@...]
-=-=-=-=-=-=


[PATCH v1 1/1] Adding changes for issue with Certificate Validation Bug 2433 - HTTPS Certificate Enrollment Issue

INDIA\sivaramann <emergingsiva@...>
 

---
NetworkPkg/HttpDxe/HttpsSupport.c | 16 +++++++++++-----
edk2.diff.order | 8 ++++++++
tianocore.template | 3 +++
3 files changed, 22 insertions(+), 5 deletions(-)

diff --git a/NetworkPkg/HttpDxe/HttpsSupport.c b/NetworkPkg/HttpDxe/HttpsSu=
pport.c
index 7e0bf85c3c42..5bf2ecec4baa 100644
--- a/NetworkPkg/HttpDxe/HttpsSupport.c
+++ b/NetworkPkg/HttpDxe/HttpsSupport.c
@@ -380,6 +380,7 @@ TlsConfigCertificate (
EFI_SIGNATURE_DATA *Cert;=0D
UINTN CertArraySizeInBytes;=0D
UINTN CertCount;=0D
+ BOOLEAN CertValidFlag;=0D
UINT32 ItemDataSize;=0D
=0D
CACert =3D NULL;=0D
@@ -493,6 +494,7 @@ TlsConfigCertificate (
//=0D
ItemDataSize =3D (UINT32) CACertSize;=0D
CertList =3D (EFI_SIGNATURE_LIST *) CACert;=0D
+ CertValidFlag =3D 0;=0D
while ((ItemDataSize > 0) && (ItemDataSize >=3D CertList->SignatureListS=
ize)) {=0D
Cert =3D (EFI_SIGNATURE_DATA *) ((UINT8 *) CertList + sizeof (EFI_SIGN=
ATURE_LIST) + CertList->SignatureHeaderSize);=0D
CertCount =3D (CertList->SignatureListSize - sizeof (EFI_SIGNATURE_LI=
ST) - CertList->SignatureHeaderSize) / CertList->SignatureSize;=0D
@@ -506,17 +508,21 @@ TlsConfigCertificate (
Cert->SignatureData,=0D
CertList->SignatureSize -=
sizeof (Cert->SignatureOwner)=0D
);=0D
- if (EFI_ERROR (Status)) {=0D
- goto FreeCACert;=0D
- }=0D
+ if (!EFI_ERROR (Status)) {=0D
+ CertValidFlag =3D 1;=0D
+ }=0D
+ else=0D
+ break;=0D
=0D
Cert =3D (EFI_SIGNATURE_DATA *) ((UINT8 *) Cert + CertList->Signatur=
eSize);=0D
}=0D
=0D
ItemDataSize -=3D CertList->SignatureListSize;=0D
CertList =3D (EFI_SIGNATURE_LIST *) ((UINT8 *) CertList + CertList->Si=
gnatureListSize);=0D
- }=0D
-=0D
+ =0D
+ }=0D
+ if(CertValidFlag =3D=3D 1)=0D
+ Status =3D EFI_SUCCESS;=0D
FreeCACert:=0D
FreePool (CACert);=0D
return Status;=0D
diff --git a/edk2.diff.order b/edk2.diff.order
new file mode 100644
index 000000000000..1d578ac28cca
--- /dev/null
+++ b/edk2.diff.order
@@ -0,0 +1,8 @@
+*.dec=0D
+*.dsc.inc=0D
+*.dsc=0D
+*.fdf=0D
+*.inf=0D
+*.h=0D
+*.vfr=0D
+*.c=0D
diff --git a/tianocore.template b/tianocore.template
new file mode 100644
index 000000000000..cfc4bdddc4cc
--- /dev/null
+++ b/tianocore.template
@@ -0,0 +1,3 @@
+[empty line]=0D
+[empty line]=0D
+Signed-off-by: Sivaraman <sivaramann@...>=0D
--=20
2.28.0.windows.1


Re: [edk2-CCodingStandardsSpecification PATCH 1/1] Fix URLs on the Introduction page

Michael D Kinney
 

-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@...>
Sent: Wednesday, December 9, 2020 9:09 AM
To: Rebecca Cran <rebecca@...>; devel@edk2.groups.io; Kinney, Michael D <michael.d.kinney@...>
Cc: Leif Lindholm <leif@...>; Laszlo Ersek <lersek@...>; Andrew Fish <afish@...>
Subject: RE: [edk2-CCodingStandardsSpecification PATCH 1/1] Fix URLs on the Introduction page

Reviewed-by: Michael D Kinney <michael.d.kinney@...>


-----Original Message-----
From: Rebecca Cran <rebecca@...>
Sent: Wednesday, December 9, 2020 7:31 AM
To: devel@edk2.groups.io
Cc: Rebecca Cran <rebecca@...>; Kinney, Michael D <michael.d.kinney@...>; Leif Lindholm
<leif@...>; Laszlo Ersek <lersek@...>; Andrew Fish <afish@...>
Subject: [edk2-CCodingStandardsSpecification PATCH 1/1] Fix URLs on the Introduction page

The Doxygen manual is no longer at the specified URL: fix it to
link to the current documentation.

While http://www.uefi.org still works, it redirects to the https
version of the site. Avoid the redirect by updating the URL.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Rebecca Cran <rebecca@...>
---
1_introduction.md | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/1_introduction.md b/1_introduction.md
index c22c04c9f76d..8862bf369712 100644
--- a/1_introduction.md
+++ b/1_introduction.md
@@ -216,12 +216,12 @@ internal namespaces to other components of the firmware system.
David Keppel, EECS, UC Berkeley CS&E, University of Washington; Mark Brader,
SoftQuad Incorporated, Toronto. 6/25/1990.

-* _Doxygen manual_, http://www.doxygen.org/manual.html, Version 1.4.6-NO
+* _Doxygen manual_, https://www.doxygen.org/manual/, Version 1.4.6-NO

* _Doxygen Primer_ by Daryl McDaniel, IBM 2002; Updated for Intel Corporation
1/2006

-* _UEFI Specification_, http://www.uefi.org
+* _UEFI Specification_, https://www.uefi.org

* _Beyond Bios:Developing with the Unified Extensible Firmware Interface_,
Second Edition, Zimmer, Michael Rothman, Suresh Marisetty Copyright @2010
--
2.26.2


Re: [edk2-CCodingStandardsSpecification PATCH 1/1] Function example in Chapter 5 C Programming has extraneous semicolon

Michael D Kinney
 

-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@...>
Sent: Wednesday, December 9, 2020 9:32 AM
To: Rebecca Cran <rebecca@...>; devel@edk2.groups.io; Kinney, Michael D <michael.d.kinney@...>
Cc: Leif Lindholm <leif@...>; Laszlo Ersek <lersek@...>; Andrew Fish <afish@...>
Subject: RE: [edk2-CCodingStandardsSpecification PATCH 1/1] Function example in Chapter 5 C Programming has extraneous
semicolon

Rebecca,

Looks like a BZ was opened for this issue too:

https://bugzilla.tianocore.org/show_bug.cgi?id=1606

Mike

-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@...>
Sent: Wednesday, December 9, 2020 8:41 AM
To: Rebecca Cran <rebecca@...>; devel@edk2.groups.io; Kinney, Michael D <michael.d.kinney@...>
Cc: Leif Lindholm <leif@...>; Laszlo Ersek <lersek@...>; Andrew Fish <afish@...>
Subject: RE: [edk2-CCodingStandardsSpecification PATCH 1/1] Function example in Chapter 5 C Programming has extraneous
semicolon

Hi Rebecca,

Reviewed-by: Michael D Kinney <michael.d.kinney@...>

I see this was a GitHub issue entered in 2019.

We should be using TianoCore Bugzilla to enter specification issues. I appreciate you
noticing this GitHub issue and generating a patch to get this fixed.

There are also recommendations for the Revision History to be updated for each change
with cross links between Revision History, git commit messages, and TianoCore Bugzilla.

https://github.com/tianocore-docs/edk2-TemplateSpecification/wiki/TianoCore-Documents-Editing


There are some examples of this at the end of the Revision History of the EDK II Build Specification.

Ideally, the Revision History contains a link to the TianoCore Bugzilla. A few examples:

| | [#465](https://bugzilla.tianocore.org/show_bug.cgi?id=465) DEC spec: document private definitions
| |

| | [#1110](https://bugzilla.tianocore.org/show_bug.cgi?id=1110) Extend exclamation statement's keyword to
case-insensitive | |
| | [#598](https://bugzilla.tianocore.org/show_bug.cgi?id=598) update supported operators in 8.2.4.6
Expressions | |
| 1.29 | [#1453](https://bugzilla.tianocore.org/show_bug.cgi?id=1453) Update Build spec to remove EDK related
contents | Mar 2019 |
| 1.30 | [#1952](https://bugzilla.tianocore.org/show_bug.cgi?id=1952) Update Build spec to support
HOST_APPLICATION
MODULE_TYPE | July 2019 |

The TianoCore Bugzilla should be updated when the issue is Fixed/Resolved with links to the
GitHub commits for the specification changes.

With this cross linking, when a specification is opened, the reader can review the Revision History,
follow the link to the TianoCore Bugzilla with a discussion of the specification change and see
the links to the final commits. The reader can then follow the links to GitHub commits and see
the text changed rendered with by GitHub with green (add), red (delete), yellow (change) highlight
when the "Display as rich diff" button is selected.

For example, BZ 465

https://bugzilla.tianocore.org/show_bug.cgi?id=465

This BZ contains the full link to the GitHub commits:

https://github.com/tianocore-docs/edk2-BuildSpecification/commit/afb505572de767fa05ca6348d36015faae387df9

If you clink on the "Display as rich diff" button, it will show a more readable version of the change:

https://github.com/tianocore-docs/edk2-
BuildSpecification/commit/afb505572de767fa05ca6348d36015faae387df9?short_path=3d47f51#diff-
3d47f517e576e84d4c7bf02e39d31d597e39821a99fa4fbe08a91f6e03e56961

With the addition of the GitBook Action, you can also create a fork of a document in your personal
GitHub area and provide links to a branch with the proposed document changes that can be viewed
using the "Display as rich diff" for easier/faster community review of document changed. If you
enable the GitBook Action on your personal fork of a document, you can also provide links to the
published versions of the document with the proposed changes.

This full process makes sense for larger changes. Does not seem to make sense for simple typos.

Thanks,

Mike

-----Original Message-----
From: Rebecca Cran <rebecca@...>
Sent: Wednesday, December 9, 2020 7:16 AM
To: devel@edk2.groups.io
Cc: Rebecca Cran <rebecca@...>; Kinney, Michael D <michael.d.kinney@...>; Leif Lindholm
<leif@...>; Laszlo Ersek <lersek@...>; Andrew Fish <afish@...>
Subject: [edk2-CCodingStandardsSpecification PATCH 1/1] Function example in Chapter 5 C Programming has extraneous
semicolon

https://github.com/tianocore-docs/edk2-CCodingStandardsSpecification/issues/1

"Section 5.7.1.10, there is a semicolon after the function paramters.
Probably a copy-paste error from the header file."

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Rebecca Cran <rebecca@...>
---
5_source_files/57_c_programming.md | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/5_source_files/57_c_programming.md b/5_source_files/57_c_programming.md
index 8b9db584eea7..8b4111bfac29 100644
--- a/5_source_files/57_c_programming.md
+++ b/5_source_files/57_c_programming.md
@@ -102,7 +102,7 @@ FooName (
IN UINTN Arg2, OPTIONAL
OUT UINTN *Arg3,
IN OUT UINTN *Arg4
- );
+ )
{
UINTN Local;
...
--
2.26.2


Re: [edk2-CCodingStandardsSpecification PATCH 1/1] Update Chapter 5 Source Files examples to follow the coding standard

Michael D Kinney
 

-----Original Message-----
From: Kinney, Michael D <michael.d.kinney@...>
Sent: Tuesday, December 8, 2020 1:46 PM
To: devel@edk2.groups.io; rebecca@...; Kinney, Michael D <michael.d.kinney@...>
Cc: Leif Lindholm <leif@...>; Laszlo Ersek <lersek@...>; Andrew Fish <afish@...>
Subject: RE: [edk2-devel] [edk2-CCodingStandardsSpecification PATCH 1/1] Update Chapter 5 Source Files examples to follow
the coding standard

Reviewed-by: Michael D Kinney <michael.d.kinney@...>

Mike

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Rebecca Cran
Sent: Tuesday, December 8, 2020 4:27 AM
To: devel@edk2.groups.io
Cc: Rebecca Cran <rebecca@...>; Kinney, Michael D <michael.d.kinney@...>; Leif Lindholm
<leif@...>; Laszlo Ersek <lersek@...>; Andrew Fish <afish@...>
Subject: [edk2-devel] [edk2-CCodingStandardsSpecification PATCH 1/1] Update Chapter 5 Source Files examples to follow
the
coding standard

There shouldn't be a space after an opening parenthesis, or around
unary operators.

There should be a space before a opening parenthesis and around binary
operators.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Rebecca Cran <rebecca@...>
---
5_source_files/52_spacing.md | 8 ++++----
5_source_files/54_code_file_structure.md | 8 ++++----
5_source_files/55_preprocessor_directives.md | 14 +++++++-------
5_source_files/57_c_programming.md | 6 +++---
4 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/5_source_files/52_spacing.md b/5_source_files/52_spacing.md
index fca0044a148b..9a97466f1d61 100644
--- a/5_source_files/52_spacing.md
+++ b/5_source_files/52_spacing.md
@@ -103,10 +103,10 @@ by && or || must have each sub-expression on a separate line. The opening brace,
column of the associated keyword.

```c
-while ( ( Code == MEETS_STANDARD)
- && ( Code == FUNCTIONAL))
+while ((Code == MEETS_STANDARD)
+ && (Code == FUNCTIONAL))
{
- ShipIt();
+ ShipIt ();
}
```

@@ -220,7 +220,7 @@ This is not the case. The bitwise OR operator, '`|`', has lower precedence than
the equality operator, '`==`'. This results in the expression being evaluated as
if one had entered:
```
-8 | ( 8 == 8 )
+8 | (8 == 8)
```

This evaluates to the value 9.
diff --git a/5_source_files/54_code_file_structure.md b/5_source_files/54_code_file_structure.md
index caaeab94b68e..0c4d6a26820c 100644
--- a/5_source_files/54_code_file_structure.md
+++ b/5_source_files/54_code_file_structure.md
@@ -151,12 +151,12 @@ and hide each other. Never write code that does this.
7 {
8 UINT32 i;
9
-10 for ( i = 0; i < 5; ++i) {
+10 for (i = 0; i < 5; ++i) {
11 UCHAR8 MyVar = i; // Block scope
12 INT16 i = 12;
13
14 MyVar += 'A';
-15 process ( MyVar, i);
+15 process (MyVar, i);
16 }
17 *MyVar = i;
18 }
@@ -165,8 +165,8 @@ and hide each other. Never write code that does this.
21 {
22 UINT32 George = 4;
23
-24 MyFunction ( &George);
-25 process ( MyVar, 0);
+24 MyFunction (&George);
+25 process (MyVar, 0);
26 }
27
```
diff --git a/5_source_files/55_preprocessor_directives.md b/5_source_files/55_preprocessor_directives.md
index 98839f6677a8..3075285b7e31 100644
--- a/5_source_files/55_preprocessor_directives.md
+++ b/5_source_files/55_preprocessor_directives.md
@@ -77,8 +77,8 @@ An order-of-precedence bug in a macro is very hard to debug. The following are
examples of macro construction:

```
-#define BAD_MACRO(a, b) a*b
-#define GOOD_MACRO(a, b) ((a)*(b))
+#define BAD_MACRO(a, b) a * b
+#define GOOD_MACRO(a, b) ((a) * (b))
```

The following examples should explain the difference between `BAD_MACRO ()` and
@@ -86,9 +86,9 @@ The following examples should explain the difference between `BAD_MACRO ()` and

* `BAD_MACRO (10, 2)` and `GOOD_MACRO (10, 2)` both evaluate to 20.

-* `BAD_MACRO (7+3, 2)` returns 13 = 7 + (3*2).
+* `BAD_MACRO (7 + 3, 2)` returns 13 = 7 + (3 * 2).

-* `GOOD_MACRO (7+3, 2)` returns 20.
+* `GOOD_MACRO (7 + 3, 2)` returns 20.

Also, consider the following expression:

@@ -102,7 +102,7 @@ the equality operator, '`==`'. This results in the expression being evaluated as
if one had entered:

```
-8 | ( 8 == 8 )
+8 | (8 == 8)
```

This evaluates to the value 9 The desired result of `TRUE`, (1), can be achieved
@@ -123,7 +123,7 @@ or a simple substitution macro.
Failure to do this will cause the build to break.

```
-#define GOOD_MACRO(a, b) ((a)*(b))
+#define GOOD_MACRO(a, b) ((a) * (b))
```

This is because the compiler has no way to differentiate between
@@ -146,7 +146,7 @@ Failure to separate macro names from parameters negatively impacts readability
and consistency with other coding style rules.

```
-GOOD_MACRO (7+3, 2)
+GOOD_MACRO (7 + 3, 2)
```

#### 5.5.2.7 Single-line Functions
diff --git a/5_source_files/57_c_programming.md b/5_source_files/57_c_programming.md
index 8b9db584eea7..a167f925536f 100644
--- a/5_source_files/57_c_programming.md
+++ b/5_source_files/57_c_programming.md
@@ -259,7 +259,7 @@ Module parameters of a PERF_END invocation.

```c
for (Index = 0; Index < NumberOfEntries; Index++) {
- if (( LogEntryArray[Index].Handle == (EFI_PHYSICAL_ADDRESS)(UINTN) Handle)
+ if ((LogEntryArray[Index].Handle == (EFI_PHYSICAL_ADDRESS)(UINTN) Handle)
&& AsciiStrnCmp (LogEntryArray[Index].Token, Token, PEI_PERFORMANCE_STRING_LENGTH) == 0
&& AsciiStrnCmp (LogEntryArray[Index].Module, Module, PEI_PERFORMANCE_STRING_LENGTH) == 0
&& LogEntryArray[Index].EndTimeStamp == 0
@@ -301,7 +301,7 @@ Re-ordering the predicate expression using this information produces:

```c
for (Index = 0; Index < NumberOfEntries; Index++) {
- if ( LogEntryArray[Index].EndTimeStamp == 0
+ if (LogEntryArray[Index].EndTimeStamp == 0
&& LogEntryArray[Index].Handle == (EFI_PHYSICAL_ADDRESS)(UINTN) Handle
&& AsciiStrnCmp (LogEntryArray[Index].Module, Module, PEI_PERFORMANCE_STRING_LENGTH) == 0
&& AsciiStrnCmp (LogEntryArray[Index].Token, Token, PEI_PERFORMANCE_STRING_LENGTH) == 0
@@ -495,7 +495,7 @@ a `goto`.

```c
Status = IAmTheCode ();
-if (! EFI_ERROR (Status)) {
+if (!EFI_ERROR (Status)) {
IDoTheWork ();
}
return Status;
--
2.26.2





Re: [PATCH v5 0/6] jansson edk2 port

Michael D Kinney
 

Abner,

Feedback below.

Mike

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Abner Chang
Sent: Wednesday, December 9, 2020 8:02 PM
To: Kinney, Michael D <michael.d.kinney@...>; devel@edk2.groups.io; gaoliming@...
Cc: 'Sean Brogan' <sean.brogan@...>; 'Bret Barkelew' <Bret.Barkelew@...>; 'Andrew Fish'
<afish@...>; 'Laszlo Ersek' <lersek@...>; 'Leif Lindholm' <leif@...>; Wang, Nickle (HPS SW)
<nickle.wang@...>; O'Hanley, Peter (EXL) <peter.ohanley@...>
Subject: Re: [edk2-devel] [PATCH v5 0/6] jansson edk2 port



-----Original Message-----
From: Kinney, Michael D [mailto:michael.d.kinney@...]
Sent: Thursday, December 10, 2020 10:33 AM
To: Chang, Abner (HPS SW/FW Technologist) <abner.chang@...>;
devel@edk2.groups.io; gaoliming@...; Kinney, Michael D
<michael.d.kinney@...>
Cc: 'Sean Brogan' <sean.brogan@...>; 'Bret Barkelew'
<Bret.Barkelew@...>; 'Andrew Fish' <afish@...>; 'Laszlo
Ersek' <lersek@...>; 'Leif Lindholm' <leif@...>; Wang,
Nickle (HPS SW) <nickle.wang@...>; O'Hanley, Peter (EXL)
<peter.ohanley@...>
Subject: RE: [edk2-devel] [PATCH v5 0/6] jansson edk2 port

Abner,

Some questions included below.

Mike


-----Original Message-----
From: Chang, Abner (HPS SW/FW Technologist) <abner.chang@...>
Sent: Wednesday, December 9, 2020 6:14 PM
To: devel@edk2.groups.io; gaoliming@...
Cc: 'Sean Brogan' <sean.brogan@...>; 'Bret Barkelew'
<Bret.Barkelew@...>; 'Andrew Fish'
<afish@...>; 'Laszlo Ersek' <lersek@...>; 'Leif Lindholm'
<leif@...>; Kinney, Michael D <michael.d.kinney@...>;
Wang, Nickle (HPS SW) <nickle.wang@...>; O'Hanley, Peter (EXL)
<peter.ohanley@...>
Subject: RE: [edk2-devel] [PATCH v5 0/6] jansson edk2 port



-----Original Message-----
From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf
Of gaoliming
Sent: Tuesday, December 8, 2020 2:40 PM
To: devel@edk2.groups.io; Chang, Abner (HPS SW/FW Technologist)
<abner.chang@...>
Cc: 'Sean Brogan' <sean.brogan@...>; 'Bret Barkelew'
<Bret.Barkelew@...>; 'Andrew Fish' <afish@...>;
'Laszlo Ersek' <lersek@...>; 'Leif Lindholm'
<leif@...>; 'Michael D Kinney'
<michael.d.kinney@...>; Wang, Nickle (HPS SW)
<nickle.wang@...>; O'Hanley, Peter (EXL)
<peter.ohanley@...>
Subject: 回复: [edk2-devel] [PATCH v5 0/6] jansson edk2 port

Abner:
I have minor comments on the library header file.

1. JasonLib.h & BaseUcs2Utf8Lib.h. They don't need to include the
additional header files, such as Uefi.h and BaseLib.h, because the
library header file doesn't depend on the definitions from BaseLib.
2. CrtLib.inf needs to list the required library class: BaseMemoryLib &
PrintLib.

OK, I will wait couple days for other comments and address that all
together.

Thanks

Thanks
Liming
-----邮件原件-----
发件人: bounce+27952+68426+4905953+8761045@groups.io
<bounce+27952+68426+4905953+8761045@groups.io> 代表 Abner
Chang
发送时间: 2020年12月8日 10:11
收件人: devel@edk2.groups.io
抄送: Sean Brogan <sean.brogan@...>; Bret Barkelew
<Bret.Barkelew@...>; Andrew Fish <afish@...>;
Laszlo Ersek <lersek@...>; Leif Lindholm
<leif@...>; Michael D Kinney
<michael.d.kinney@...>; Liming Gao
<gaoliming@...>; Nickle Wang <nickle.wang@...>;
Peter
O'Hanley <peter.ohanley@...>
主题: [edk2-devel] [PATCH v5 0/6] jansson edk2 port

In v5, move BaseUcs2Utf8Lib to under RedfishPkg.
In v4,
- Address review comments
- Seperate CRT functions to a individule library CrtLib under
RedfishPkg.
- Seperate UCS2-UTF8 functions to a individule library
BaseUcs2Utf8Lib under MdeModulePkg.

In v3, Add jansson library as the required submoudle in
CiSettings.py for CI test.
In v2, JsonLib is moved to under RedfishPkg.

edk2 JSON library is based on jansson open source
(https://github.com/akheron/jansson) and wrapped as an edk2 library.
edk2 JsonLib will be used by edk2 Redfish feature drivers (not
contributed yet) and the edk2 port of libredfish library (not
contributed yet) based on DMTF GitHub
(https://github.com/DMTF/libredfish).

Jansson is licensed under the MIT license(refer to ReadMe.rst under
edk2).
It is used in production and its API is stable. In UEFI/EDKII
environment, Redfish project consumes jansson to achieve JSON
operations.

* Jansson version on edk2: 2.13.1

* EDKII jansson library wrapper:
- JsonLib.h:
This is the denifitions of EDKII JSON APIs which are mapped to
jannson funcitons accordingly.

- JanssonJsonLibMapping.h:
This is the wrapper file to map funcitons and definitions used in
native jannson applications to edk2 JsonLib. This avoids the
modifications on native jannson applications to be built under
edk2 environment.
Can you explain the use case for this in more detail?
What are these native jannson applications and why do we need to build
them in edk2?
If we have the jannson submodule, why can't these apps just use the
standard jannson services?

I ask because this is a new concept for edk2 and I want to make sure it is
really required.
The users of jannson library are LibRedfish open source (https://github.com/DMTF/libredfish) and the Edk2 Redfish features
drivers (WIP) to communicate with Redfish service. EDK2 port of Libredfish will be sent for review after this one.
Libredfish use "jansson.h" in its source code and uses the native jansson functions directly. I think most of open source
projects use the same way to leverage jansson open source project.
However, "jansson.h" is defined in the source code directory that edk2 module can't refer to it in edk2 metafiles.
Why not? The package DEC file can list include paths.

For example, the RedFishPkg DEC file currently has the following [Includes] section:

[Includes]
Include

I could be updated to:

[Includes]
Include
Library\JsonLib\jansson\src

This would allow libs/modules that want to directly use the jansson services to use

#include <janson.h>

If you wanted to limit the use of <janson.h> to only libs/modules in the RedfishPkg, then you
could use the private include feature:

[Includes]
Include

[Includes.Common.Private]
Library\JsonLib\jansson\src

In fact, this exact pattern is used in the UnitTestFrameworkPkg to allow comonponents
to use the standard includes from the cmocka submodule:

[Includes]
Library/CmockaLib/cmocka/include

[Includes.Common.Private]
PrivateInclude
Library/CmockaLib/cmocka/include/cmockery


Please evaluate this approach and see of the JassonJsoonMapping.h file can be removed.

Thus we need an wrapper for these jansson applications. That JanssonJsonMapping.h defines the EDK2 style API for mapping
native jansson functions. For those edk2 based JSON applications, they can just use edk2 style APIs. Such as the edk2
Redfish feature drivers, those can use the EDK2 coding style compliant API to invoke jansson functions by using JsonLib.h.
For those native jansson applications, we can just use JanssonJsonMapping.h to map the native jansson API to EDK2 style
API provided by JsonLib.lib. JanssonJsonMapping.h is not just map the functions, it also gives edk2 style prototype for
jansson variables such as json_t. These edk2 style prototypes are used in EDK2 Redfish drivers or other edk2 based
application as well.



*Known issue:
Build fail with jansson/src/load.c, overrride and add code in load.c
to conditionally use stdin according to HAVE_UNISTD_H macro.
The PR is submitted to jansson open source community.
https://github.com/akheron/jansson/pull/558

Signed-off-by: Abner Chang <abner.chang@...>

Cc: Sean Brogan <sean.brogan@...>
Cc: Bret Barkelew <Bret.Barkelew@...>
Cc: Andrew Fish <afish@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Leif Lindholm <leif@...>
Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Liming Gao <gaoliming@...>
Cc: Nickle Wang <nickle.wang@...>
Cc: Peter O'Hanley <peter.ohanley@...>

Abner Chang (6):
RedfishPkg/Ucs2Utf8lib: UCS2 to UFT8 manipulation library
edk2: jansson submodule for edk2 JSON library
RedfishPkg/CrtLib: C runtime library
RedfishPkg/library: EDK2 port of jansson library
RedfishPkg: Add EDK2 port of jansson library to build
.pytool: Add required submodule for JsonLib

.gitmodules | 3 +
.pytool/CISettings.py | 2 +
ReadMe.rst | 1 +
RedfishPkg/Include/JanssonJsonMapping.h | 63 +
RedfishPkg/Include/Library/BaseUcs2Utf8Lib.h | 69 +
RedfishPkg/Include/Library/CrtLib.h | 195 +++
RedfishPkg/Include/Library/JsonLib.h | 768 ++++++++++++
.../Library/BaseUcs2Utf8Lib/BaseUcs2Utf8Lib.c | 417 +++++++
.../BaseUcs2Utf8Lib/BaseUcs2Utf8Lib.inf | 31 +
RedfishPkg/Library/CrtLib/CrtLib.c | 705 +++++++++++
RedfishPkg/Library/CrtLib/CrtLib.inf | 37 +
RedfishPkg/Library/JsonLib/JsonLib.c | 961 ++++++++++++++
RedfishPkg/Library/JsonLib/JsonLib.inf | 101 ++
RedfishPkg/Library/JsonLib/Readme.rst | 40 +
RedfishPkg/Library/JsonLib/assert.h | 16 +
RedfishPkg/Library/JsonLib/errno.h | 16 +
RedfishPkg/Library/JsonLib/jansson | 1 +
RedfishPkg/Library/JsonLib/jansson_config.h | 46 +
.../Library/JsonLib/jansson_private_config.h | 19 +
RedfishPkg/Library/JsonLib/limits.h | 16 +
RedfishPkg/Library/JsonLib/load.c | 1111
+++++++++++++++++
RedfishPkg/Library/JsonLib/math.h | 16 +
RedfishPkg/Library/JsonLib/stdarg.h | 15 +
RedfishPkg/Library/JsonLib/stddef.h | 16 +
RedfishPkg/Library/JsonLib/stdio.h | 15 +
RedfishPkg/Library/JsonLib/stdlib.h | 16 +
RedfishPkg/Library/JsonLib/string.h | 16 +
RedfishPkg/Library/JsonLib/sys/time.h | 15 +
RedfishPkg/Library/JsonLib/sys/types.h | 15 +
RedfishPkg/Library/JsonLib/time.h | 15 +
RedfishPkg/RedfishLibs.dsc.inc | 3 +
RedfishPkg/RedfishPkg.ci.yaml | 33 +
RedfishPkg/RedfishPkg.dec | 15 +
RedfishPkg/RedfishPkg.dsc | 3 +
34 files changed, 4811 insertions(+) create mode 100644
RedfishPkg/Include/JanssonJsonMapping.h
create mode 100644 RedfishPkg/Include/Library/BaseUcs2Utf8Lib.h
create mode 100644 RedfishPkg/Include/Library/CrtLib.h
create mode 100644 RedfishPkg/Include/Library/JsonLib.h
create mode 100644
RedfishPkg/Library/BaseUcs2Utf8Lib/BaseUcs2Utf8Lib.c
create mode 100644
RedfishPkg/Library/BaseUcs2Utf8Lib/BaseUcs2Utf8Lib.inf
create mode 100644 RedfishPkg/Library/CrtLib/CrtLib.c
create mode 100644 RedfishPkg/Library/CrtLib/CrtLib.inf
create mode 100644 RedfishPkg/Library/JsonLib/JsonLib.c
create mode 100644 RedfishPkg/Library/JsonLib/JsonLib.inf
create mode 100644 RedfishPkg/Library/JsonLib/Readme.rst
create mode 100644 RedfishPkg/Library/JsonLib/assert.h
create mode 100644 RedfishPkg/Library/JsonLib/errno.h
create mode 160000 RedfishPkg/Library/JsonLib/jansson
create mode 100644 RedfishPkg/Library/JsonLib/jansson_config.h
create mode 100644
RedfishPkg/Library/JsonLib/jansson_private_config.h
create mode 100644 RedfishPkg/Library/JsonLib/limits.h
create mode 100644 RedfishPkg/Library/JsonLib/load.c create mode
100644 RedfishPkg/Library/JsonLib/math.h create mode 100644
RedfishPkg/Library/JsonLib/stdarg.h
create mode 100644 RedfishPkg/Library/JsonLib/stddef.h
create mode 100644 RedfishPkg/Library/JsonLib/stdio.h
create mode 100644 RedfishPkg/Library/JsonLib/stdlib.h
create mode 100644 RedfishPkg/Library/JsonLib/string.h
create mode 100644 RedfishPkg/Library/JsonLib/sys/time.h
create mode 100644 RedfishPkg/Library/JsonLib/sys/types.h
create mode 100644 RedfishPkg/Library/JsonLib/time.h

--
2.17.1













[PATCH v1 1/1] Silicon/Qemu/Sbsa: sbsa-wdt interrupt id update

Shashi Mallela
 

The previous value of interrupt id used was causing
conflict with a different device of sbsa-ref platform.
This was preventing the watchdog interrupt from getting
identified.Updated SBSA-wdt interrupt id in Gtdt table
to rectify the issue.

Cc: Leif Lindholm <leif@...>
Cc: Ard Biesheuvel <ard.biesheuvel@...>
Cc: Graeme Gregory <graeme@...>
Signed-off-by: Shashi Mallela <shashi.mallela@...>
---
Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
index a010b908c434..14733a37183d 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc
@@ -36,7 +36,7 @@

#define SBSAQEMU_WDT_REFRESH_FRAME_BASE 0x50010000
#define SBSAQEMU_WDT_CONTROL_FRAME_BASE 0x50011000
-#define SBSAQEMU_WDT_IRQ 44
+#define SBSAQEMU_WDT_IRQ 48

#define GTDT_WDTIMER_EDGE_TRIGGERED EFI_ACPI_6_3_GTDT_SBSA_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE
#define GTDT_WDTIMER_LEVEL_TRIGGERED 0
--
2.27.0


[PATCH v1 0/1] sbsa-wdt interrupt id update

Shashi Mallela
 

This patch contains an update to interrupt id value of
sbsa wdt,since the previous value of interrupt id used
was causing conflict with a different device of
sbsa-ref platform.This was preventing the watchdog
interrupt from getting identified.

Shashi Mallela (1):
Silicon/Qemu/Sbsa: sbsa-wdt interrupt id update

Silicon/Qemu/SbsaQemu/AcpiTables/Gtdt.aslc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

--
2.27.0


Re: [RFC PATCH 0/5] support CPU hot-unplug

Igor Mammedov
 

On Thu, 10 Dec 2020 12:08:13 -0800
"Ankur Arora" <ankur.a.arora@...> wrote:

On 2020-12-10 1:21 a.m., Laszlo Ersek wrote:
Hi Ankur,

On 12/08/20 06:34, Ankur Arora wrote:
[ Resending to the correct edk2 alias this time. ]

Hi,

This series adds support for CPU hot-unplug with OVMF.

Please see this in conjunction with the QEMU v2 series posted here:
https://lore.kernel.org/qemu-devel/20201207140739.3829993-1-imammedo@redhat.com/

In particular, would be glad for comments on Patch 4, specifically
where we should be ejecting the CPU.

Right now the ejection happens in UnplugCpus() (called from
CpuHotplugMmi()):
+ QemuCpuhpWriteCpuSelector (mMmCpuIo, RemoveApicId);
+ QemuCpuhpWriteCpuStatus (mMmCpuIo, QEMU_CPUHP_STAT_EJECTED);

That is way too early -- given that the actual unplug will happen
in SmmCpuUpdate() and given that the BSPHandler() would have waited
for the APs multiple times before then.

Another possibility is that the actual ejection be deferred to the
_EJ0 method after the return from the SMI. But, that seems like a
hack. Additionally, Igor points out here that this approach has problems:
https://lore.kernel.org/qemu-devel/20201204170939.1815522-1-imammedo@redhat.com/

Please review.
thanks for the patches; I'm confirming I've got them.

I'll need a non-trivial amount of time before I come to these patches
(and to the QEMU patches posted by Igor).

I'm working very busily on
<https://bugzilla.tianocore.org/show_bug.cgi?id=3097> and my brain is
full of other stuff.
Thanks for letting me know. I empathize with not wanting to context
switch out all of your built up virtio-fs/ARM state.


We had the reverse situation earlier this year, I think, when -- in
relation to hotplug -- Igor was occupied with a more pressing QEMU
development (NUMA I think?), for a significant amount of time.

What's important is that I want to do both Igor's patches and your
patches *justice*, with my review, and at this time I just cannot sit
down with them alone for a day. These patches deserve a deep looking-at,
rather than a skim, and I cannot afford the former at the moment. I
prefer doing a (hopefully) thorough review, later, to rushing a review now.
I'll look forward to it. Anyway I think a deep look at these patches might
be wasted at the current stage. In particular there's a glaring hole in this
patch set which is how to handle the actual unplug (setting of
QEMU_CPUHP_STAT_EJECTED).

That's one thing I would be glad for a comment on: not right away, please
come back to this when you have thinking room.

So the problem is that my current approach -- setting QEMU_CPUHP_STAT_EJECTED
via the CpuHotplugMmi() handler definitely doesn't work given that it removes
an AP immediately while the SMI handler is still using it.

The two alternatives are:
- do this in SmmCpuFeaturesLib::SmmCpuFeaturesRendezvousExit() while exiting
SMI. That means that the only thing we will not do on the AP being unplugged
is restoring debug registers and a bunch of MSRs. Which AFAICS would be
okay, since the next time this AP is plugged in it will start from a clean
slate anyway.
- Qemu marks the hot-unplug when QEMU_CPUHP_STAT_EJECTED is set and defers it
until the SMI exit.
I don't like implementing workarounds on hw side for guest software sake.
(it's occasionally done but only if there is no way to fix guest side,
for example closed sources OS. So there shall be very good reason to do so)

AFAICS, both ought to work. But, assuming it works (I haven't tried it out yet)
the first seems cleaner.

Ankur



I hope that's tolerable.

Thank you,
Laszlo




Re: [edk2-platforms][PATCH 29/34] Platform/Ampere: Add LinuxBoot image

Leif Lindholm
 

Hi Nhi,

Well, that simplifies things, so sure.
Please hold back on the v2 until I either comment on somethign
requring substantial changes or tell you I'm done with this set.
It is a big one, so I probably won't finish today.

When you do send a v2, please cc people on all the patches, not just
the cover letter.

Best Regards,

Leif

On Fri, Dec 11, 2020 at 09:38:02 +0700, Nhi Pham wrote:
Hi Leif,

Thanks for your feedback.
There is no problem for us to move the LinuxBoot binary to the edk2-non-osi.
But we have some problem about license statement for the binary and we are
also finding another solution for supporting LinuxBoot built-in into EDK2
image. So, for now, I will remove the LinuxBoot support from the patch
series. We will add them later when it's ready.

I'm going to send a patch series v2 for this. Do you have any comments on
the remaining patches? - just avoid spamming mailbox :)

Thanks and Best Regards,
Nhi

On 12/10/20 19:40, Leif Lindholm wrote:
Hi Nhi, (+Ard for opinions on GUID usage below)

This is a pretty huge set, so I'll start by giving some random
high-level comments. This one jumped out as a bit of an anomaly.

We can't accept binaries in edk2-platforms, so please move this one
over to edk2-non-osi, and add a file describing the license covering
the "flashkernel" binary, together with information on what sources it
was built from, and how it was built.

(Yes, we will get around to creating an edk2-non-bsd repository one of
these years.)

On Wed, Dec 09, 2020 at 16:25:26 +0700, Nhi Pham via groups.io wrote:
LinuxBoot is a firmware that replaces specific firmware functionality
like the UEFI DXE phase with a Linux kernel and runtime.

This image is used for replacing the UEFI Shell Application in case we
want to execute the LinuxBoot at end of the DXE phase.

Also add the kernel config file that is used to generate the kernel image.

Signed-off-by: Vanshidhar Konda <vanshikonda@...>
Signed-off-by: Nhi Pham <nhi@...>
Only one signed-off-by per patch - you can only sign off on your own
declaration of the contribution's conformance with
https://developercertificate.org/, not someone else's.

Authorship metadata is covered by the From: tag.

---
Platform/Ampere/LinuxBootPkg/LinuxBoot.inf | 17 +
Platform/Ampere/LinuxBootPkg/AArch64/flashkernel | Bin 0 -> 9529856 bytes
Platform/Ampere/LinuxBootPkg/flash.config | 2710 ++++++++++++++++++++
3 files changed, 2727 insertions(+)

diff --git a/Platform/Ampere/LinuxBootPkg/LinuxBoot.inf b/Platform/Ampere/LinuxBootPkg/LinuxBoot.inf
new file mode 100644
index 000000000000..15c0631682e0
--- /dev/null
+++ b/Platform/Ampere/LinuxBootPkg/LinuxBoot.inf
@@ -0,0 +1,17 @@
+## @file
+#
+# Copyright (c) 2020, Ampere Computing LLC. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x0001001B
+ BASE_NAME = LinuxBoot
+ FILE_GUID = 7C04A583-9E3E-4f1c-AD65-E05268D0B4D1
I'm not super happy about some other binary claiming to be the UEFI
Shell. You're already replacing the PlatformBootmanagerLib with a
cut-down version - you could make and use you own GUID, with a more
accurate name, instead.

Best Regard,

Leif

+ MODULE_TYPE = UEFI_APPLICATION
+ VERSION_STRING = 1.0
+
+[Binaries.AArch64]
+ PE32|AArch64/flashkernel|*
diff --git a/Platform/Ampere/LinuxBootPkg/AArch64/flashkernel b/Platform/Ampere/LinuxBootPkg/AArch64/flashkernel
new file mode 100755
index 000000000000..bbe9665c072f
Binary files /dev/null and b/Platform/Ampere/LinuxBootPkg/AArch64/flashkernel differ
diff --git a/Platform/Ampere/LinuxBootPkg/flash.config b/Platform/Ampere/LinuxBootPkg/flash.config
new file mode 100644
index 000000000000..48a7dbc4d6e4
--- /dev/null
+++ b/Platform/Ampere/LinuxBootPkg/flash.config
@@ -0,0 +1,2710 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# Linux/arm64 5.7.0 Kernel Configuration
+#
+
+#
+# Compiler: aarch64-linux-gnu-gcc (Ubuntu 9.3.0-17ubuntu1~20.04) 9.3.0
+#
+CONFIG_CC_IS_GCC=y
+CONFIG_GCC_VERSION=90300
+CONFIG_LD_VERSION=234000000
+CONFIG_CLANG_VERSION=0
+CONFIG_CC_CAN_LINK=y
+CONFIG_CC_HAS_ASM_GOTO=y
+CONFIG_CC_HAS_ASM_INLINE=y
+CONFIG_IRQ_WORK=y
+CONFIG_BUILDTIME_TABLE_SORT=y
+CONFIG_THREAD_INFO_IN_TASK=y
+
+#
+# General setup
+#
+CONFIG_INIT_ENV_ARG_LIMIT=32
+# CONFIG_COMPILE_TEST is not set
+CONFIG_LOCALVERSION=""
+# CONFIG_LOCALVERSION_AUTO is not set
+CONFIG_BUILD_SALT=""
+CONFIG_DEFAULT_HOSTNAME="(none)"
+# CONFIG_SWAP is not set
+# CONFIG_SYSVIPC is not set
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_CROSS_MEMORY_ATTACH is not set
+# CONFIG_USELIB is not set
+# CONFIG_AUDIT is not set
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+
+#
+# IRQ subsystem
+#
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_MIGRATION=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_DOMAIN_HIERARCHY=y
+CONFIG_GENERIC_MSI_IRQ=y
+CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_SPARSE_IRQ=y
+# end of IRQ subsystem
+
+CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_ARCH_HAS_TICK_BROADCAST=y
+CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
+
+#
+# Timers subsystem
+#
+CONFIG_HZ_PERIODIC=y
+# CONFIG_NO_HZ_IDLE is not set
+# CONFIG_NO_HZ_FULL is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+# end of Timers subsystem
+
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+
+#
+# CPU/Task time and stats accounting
+#
+CONFIG_TICK_CPU_ACCOUNTING=y
+# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
+# CONFIG_IRQ_TIME_ACCOUNTING is not set
+# CONFIG_SCHED_THERMAL_PRESSURE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_PSI is not set
+# end of CPU/Task time and stats accounting
+
+# CONFIG_CPU_ISOLATION is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_TREE_RCU=y
+# CONFIG_RCU_EXPERT is not set
+CONFIG_SRCU=y
+CONFIG_TREE_SRCU=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_RCU_NEED_SEGCBLIST=y
+# end of RCU Subsystem
+
+# CONFIG_IKCONFIG is not set
+# CONFIG_IKHEADERS is not set
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_LOG_CPU_MAX_BUF_SHIFT=12
+CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=13
+CONFIG_GENERIC_SCHED_CLOCK=y
+
+#
+# Scheduler features
+#
+# end of Scheduler features
+
+CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
+CONFIG_CC_HAS_INT128=y
+CONFIG_ARCH_SUPPORTS_INT128=y
+CONFIG_CGROUPS=y
+CONFIG_PAGE_COUNTER=y
+CONFIG_MEMCG=y
+CONFIG_MEMCG_KMEM=y
+CONFIG_BLK_CGROUP=y
+CONFIG_CGROUP_WRITEBACK=y
+CONFIG_CGROUP_SCHED=y
+CONFIG_FAIR_GROUP_SCHED=y
+# CONFIG_CFS_BANDWIDTH is not set
+# CONFIG_RT_GROUP_SCHED is not set
+CONFIG_CGROUP_PIDS=y
+CONFIG_CGROUP_RDMA=y
+CONFIG_CGROUP_FREEZER=y
+CONFIG_CGROUP_HUGETLB=y
+CONFIG_CPUSETS=y
+CONFIG_PROC_PID_CPUSET=y
+CONFIG_CGROUP_DEVICE=y
+CONFIG_CGROUP_CPUACCT=y
+CONFIG_SOCK_CGROUP_DATA=y
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+CONFIG_NET_NS=y
+# CONFIG_CHECKPOINT_RESTORE is not set
+# CONFIG_SCHED_AUTOGROUP is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE="../flashinitramfs.cpio"
+CONFIG_INITRAMFS_FORCE=y
+CONFIG_INITRAMFS_ROOT_UID=0
+CONFIG_INITRAMFS_ROOT_GID=0
+# CONFIG_RD_GZIP is not set
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
+CONFIG_RD_XZ=y
+# CONFIG_RD_LZO is not set
+# CONFIG_RD_LZ4 is not set
+CONFIG_INITRAMFS_COMPRESSION_XZ=y
+# CONFIG_INITRAMFS_COMPRESSION_NONE is not set
+# CONFIG_BOOT_CONFIG is not set
+# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_BPF=y
+# CONFIG_EXPERT is not set
+CONFIG_MULTIUSER=y
+CONFIG_SYSFS_SYSCALL=y
+CONFIG_FHANDLE=y
+CONFIG_POSIX_TIMERS=y
+CONFIG_PRINTK=y
+CONFIG_PRINTK_NMI=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_FUTEX_PI=y
+CONFIG_HAVE_FUTEX_CMPXCHG=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+CONFIG_IO_URING=y
+CONFIG_ADVISE_SYSCALLS=y
+CONFIG_MEMBARRIER=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_BASE_RELATIVE=y
+# CONFIG_BPF_SYSCALL is not set
+CONFIG_ARCH_WANT_DEFAULT_BPF_JIT=y
+# CONFIG_USERFAULTFD is not set
+CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
+CONFIG_RSEQ=y
+# CONFIG_EMBEDDED is not set
+CONFIG_HAVE_PERF_EVENTS=y
+
+#
+# Kernel Performance Events And Counters
+#
+# CONFIG_PERF_EVENTS is not set
+# end of Kernel Performance Events And Counters
+
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_COMPAT_BRK is not set
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLAB_MERGE_DEFAULT is not set
+# CONFIG_SLAB_FREELIST_RANDOM is not set
+# CONFIG_SLAB_FREELIST_HARDENED is not set
+# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
+CONFIG_SLUB_CPU_PARTIAL=y
+# CONFIG_PROFILING is not set
+# end of General setup
+
+CONFIG_ARM64=y
+CONFIG_64BIT=y
+CONFIG_MMU=y
+CONFIG_ARM64_PAGE_SHIFT=12
+CONFIG_ARM64_CONT_SHIFT=4
+CONFIG_ARCH_MMAP_RND_BITS_MIN=18
+CONFIG_ARCH_MMAP_RND_BITS_MAX=33
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=16
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CSUM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_ZONE_DMA=y
+CONFIG_ZONE_DMA32=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_SMP=y
+CONFIG_KERNEL_MODE_NEON=y
+CONFIG_FIX_EARLYCON_MEM=y
+CONFIG_PGTABLE_LEVELS=4
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_PROC_KCORE_TEXT=y
+
+#
+# Platform selection
+#
+# CONFIG_ARCH_ACTIONS is not set
+# CONFIG_ARCH_AGILEX is not set
+# CONFIG_ARCH_SUNXI is not set
+# CONFIG_ARCH_ALPINE is not set
+# CONFIG_ARCH_BCM2835 is not set
+# CONFIG_ARCH_BCM_IPROC is not set
+# CONFIG_ARCH_BERLIN is not set
+# CONFIG_ARCH_BITMAIN is not set
+# CONFIG_ARCH_BRCMSTB is not set
+# CONFIG_ARCH_EXYNOS is not set
+# CONFIG_ARCH_K3 is not set
+# CONFIG_ARCH_LAYERSCAPE is not set
+# CONFIG_ARCH_LG1K is not set
+# CONFIG_ARCH_HISI is not set
+# CONFIG_ARCH_MEDIATEK is not set
+# CONFIG_ARCH_MESON is not set
+# CONFIG_ARCH_MVEBU is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_QCOM is not set
+# CONFIG_ARCH_REALTEK is not set
+# CONFIG_ARCH_RENESAS is not set
+# CONFIG_ARCH_ROCKCHIP is not set
+# CONFIG_ARCH_S32 is not set
+# CONFIG_ARCH_SEATTLE is not set
+# CONFIG_ARCH_STRATIX10 is not set
+# CONFIG_ARCH_SYNQUACER is not set
+# CONFIG_ARCH_TEGRA is not set
+# CONFIG_ARCH_SPRD is not set
+# CONFIG_ARCH_THUNDER is not set
+# CONFIG_ARCH_THUNDER2 is not set
+# CONFIG_ARCH_UNIPHIER is not set
+# CONFIG_ARCH_VEXPRESS is not set
+# CONFIG_ARCH_XGENE is not set
+# CONFIG_ARCH_ZX is not set
+# CONFIG_ARCH_ZYNQMP is not set
+# end of Platform selection
+
+#
+# Kernel Features
+#
+
+#
+# ARM errata workarounds via the alternatives framework
+#
+# CONFIG_ARM64_ERRATUM_826319 is not set
+# CONFIG_ARM64_ERRATUM_827319 is not set
+# CONFIG_ARM64_ERRATUM_824069 is not set
+# CONFIG_ARM64_ERRATUM_819472 is not set
+# CONFIG_ARM64_ERRATUM_832075 is not set
+# CONFIG_ARM64_ERRATUM_843419 is not set
+# CONFIG_ARM64_ERRATUM_1024718 is not set
+# CONFIG_ARM64_ERRATUM_1165522 is not set
+# CONFIG_ARM64_ERRATUM_1530923 is not set
+# CONFIG_ARM64_ERRATUM_1286807 is not set
+# CONFIG_ARM64_ERRATUM_1319367 is not set
+# CONFIG_ARM64_ERRATUM_1463225 is not set
+# CONFIG_ARM64_ERRATUM_1542419 is not set
+# CONFIG_CAVIUM_ERRATUM_22375 is not set
+# CONFIG_CAVIUM_ERRATUM_23154 is not set
+# CONFIG_CAVIUM_ERRATUM_27456 is not set
+# CONFIG_CAVIUM_ERRATUM_30115 is not set
+# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_1003 is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_1009 is not set
+# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
+# CONFIG_SOCIONEXT_SYNQUACER_PREITS is not set
+# CONFIG_HISILICON_ERRATUM_161600802 is not set
+# CONFIG_QCOM_FALKOR_ERRATUM_E1041 is not set
+# CONFIG_FUJITSU_ERRATUM_010001 is not set
+# end of ARM errata workarounds via the alternatives framework
+
+CONFIG_ARM64_4K_PAGES=y
+# CONFIG_ARM64_16K_PAGES is not set
+# CONFIG_ARM64_64K_PAGES is not set
+# CONFIG_ARM64_VA_BITS_39 is not set
+CONFIG_ARM64_VA_BITS_48=y
+CONFIG_ARM64_VA_BITS=48
+CONFIG_ARM64_PA_BITS_48=y
+CONFIG_ARM64_PA_BITS=48
+# CONFIG_CPU_BIG_ENDIAN is not set
+CONFIG_CPU_LITTLE_ENDIAN=y
+# CONFIG_SCHED_MC is not set
+# CONFIG_SCHED_SMT is not set
+CONFIG_NR_CPUS=256
+CONFIG_HOTPLUG_CPU=y
+# CONFIG_NUMA is not set
+CONFIG_HOLES_IN_ZONE=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_SPARSEMEM_ENABLE=y
+CONFIG_ARCH_SPARSEMEM_DEFAULT=y
+CONFIG_ARCH_SELECT_MEMORY_MODEL=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_HAVE_ARCH_PFN_VALID=y
+CONFIG_SYS_SUPPORTS_HUGETLBFS=y
+CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
+CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
+CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
+# CONFIG_SECCOMP is not set
+# CONFIG_PARAVIRT is not set
+# CONFIG_PARAVIRT_TIME_ACCOUNTING is not set
+CONFIG_KEXEC_FILE=y
+# CONFIG_KEXEC_SIG is not set
+# CONFIG_CRASH_DUMP is not set
+# CONFIG_XEN is not set
+CONFIG_FORCE_MAX_ZONEORDER=11
+CONFIG_UNMAP_KERNEL_AT_EL0=y
+CONFIG_HARDEN_BRANCH_PREDICTOR=y
+CONFIG_HARDEN_EL2_VECTORS=y
+CONFIG_ARM64_SSBD=y
+# CONFIG_RODATA_FULL_DEFAULT_ENABLED is not set
+# CONFIG_ARM64_SW_TTBR0_PAN is not set
+# CONFIG_ARM64_TAGGED_ADDR_ABI is not set
+# CONFIG_COMPAT is not set
+
+#
+# ARMv8.1 architectural features
+#
+# CONFIG_ARM64_HW_AFDBM is not set
+# CONFIG_ARM64_PAN is not set
+CONFIG_ARM64_VHE=y
+# end of ARMv8.1 architectural features
+
+#
+# ARMv8.2 architectural features
+#
+# CONFIG_ARM64_UAO is not set
+# CONFIG_ARM64_PMEM is not set
+# CONFIG_ARM64_RAS_EXTN is not set
+# CONFIG_ARM64_CNP is not set
+# end of ARMv8.2 architectural features
+
+#
+# ARMv8.3 architectural features
+#
+# CONFIG_ARM64_PTR_AUTH is not set
+CONFIG_CC_HAS_BRANCH_PROT_PAC_RET=y
+CONFIG_CC_HAS_SIGN_RETURN_ADDRESS=y
+CONFIG_AS_HAS_PAC=y
+CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y
+# end of ARMv8.3 architectural features
+
+#
+# ARMv8.4 architectural features
+#
+# CONFIG_ARM64_AMU_EXTN is not set
+# end of ARMv8.4 architectural features
+
+#
+# ARMv8.5 architectural features
+#
+# CONFIG_ARM64_E0PD is not set
+# CONFIG_ARCH_RANDOM is not set
+# end of ARMv8.5 architectural features
+
+# CONFIG_ARM64_SVE is not set
+# CONFIG_ARM64_PSEUDO_NMI is not set
+# CONFIG_RANDOMIZE_BASE is not set
+CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y
+# end of Kernel Features
+
+#
+# Boot options
+#
+# CONFIG_ARM64_ACPI_PARKING_PROTOCOL is not set
+CONFIG_CMDLINE="console=ttyAMA0,115200 irqchip.gicv3_nolpi=1 uroot.nohwrng"
+CONFIG_CMDLINE_FORCE=y
+CONFIG_EFI_STUB=y
+CONFIG_EFI=y
+CONFIG_DMI=y
+# end of Boot options
+
+#
+# Power management options
+#
+# CONFIG_SUSPEND is not set
+# CONFIG_PM is not set
+CONFIG_CPU_PM=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+# end of Power management options
+
+#
+# CPU Power Management
+#
+
+#
+# CPU Idle
+#
+CONFIG_CPU_IDLE=y
+CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
+CONFIG_CPU_IDLE_GOV_LADDER=y
+CONFIG_CPU_IDLE_GOV_MENU=y
+# CONFIG_CPU_IDLE_GOV_TEO is not set
+CONFIG_DT_IDLE_STATES=y
+
+#
+# ARM CPU Idle Drivers
+#
+CONFIG_ARM_CPUIDLE=y
+# CONFIG_ARM_PSCI_CPUIDLE is not set
+# end of ARM CPU Idle Drivers
+# end of CPU Idle
+
+#
+# CPU Frequency scaling
+#
+# CONFIG_CPU_FREQ is not set
+# end of CPU Frequency scaling
+# end of CPU Power Management
+
+#
+# Firmware Drivers
+#
+# CONFIG_ARM_SCMI_PROTOCOL is not set
+# CONFIG_ARM_SCPI_PROTOCOL is not set
+# CONFIG_ARM_SDE_INTERFACE is not set
+CONFIG_DMIID=y
+# CONFIG_DMI_SYSFS is not set
+# CONFIG_ISCSI_IBFT is not set
+# CONFIG_FW_CFG_SYSFS is not set
+CONFIG_HAVE_ARM_SMCCC=y
+CONFIG_ARM_PSCI_FW=y
+# CONFIG_ARM_PSCI_CHECKER is not set
+# CONFIG_GOOGLE_FIRMWARE is not set
+
+#
+# EFI (Extensible Firmware Interface) Support
+#
+CONFIG_EFI_VARS=y
+CONFIG_EFI_ESRT=y
+CONFIG_EFI_VARS_PSTORE=y
+# CONFIG_EFI_VARS_PSTORE_DEFAULT_DISABLE is not set
+CONFIG_EFI_PARAMS_FROM_FDT=y
+CONFIG_EFI_RUNTIME_WRAPPERS=y
+CONFIG_EFI_ARMSTUB=y
+# CONFIG_EFI_ARMSTUB_DTB_LOADER is not set
+CONFIG_EFI_BOOTLOADER_CONTROL=y
+CONFIG_EFI_CAPSULE_LOADER=y
+# CONFIG_EFI_TEST is not set
+# CONFIG_RESET_ATTACK_MITIGATION is not set
+# CONFIG_EFI_DISABLE_PCI_DMA is not set
+# end of EFI (Extensible Firmware Interface) Support
+
+CONFIG_EFI_EARLYCON=y
+
+#
+# Tegra firmware driver
+#
+# end of Tegra firmware driver
+# end of Firmware Drivers
+
+CONFIG_ARCH_SUPPORTS_ACPI=y
+CONFIG_ACPI=y
+CONFIG_ACPI_GENERIC_GSI=y
+CONFIG_ACPI_CCA_REQUIRED=y
+# CONFIG_ACPI_DEBUGGER is not set
+CONFIG_ACPI_SPCR_TABLE=y
+# CONFIG_ACPI_EC_DEBUGFS is not set
+CONFIG_ACPI_AC=y
+CONFIG_ACPI_BATTERY=y
+CONFIG_ACPI_BUTTON=y
+CONFIG_ACPI_FAN=y
+# CONFIG_ACPI_DOCK is not set
+CONFIG_ACPI_PROCESSOR_IDLE=y
+CONFIG_ACPI_MCFG=y
+CONFIG_ACPI_PROCESSOR=y
+CONFIG_ACPI_IPMI=y
+CONFIG_ACPI_HOTPLUG_CPU=y
+CONFIG_ACPI_THERMAL=y
+CONFIG_ACPI_CUSTOM_DSDT_FILE=""
+CONFIG_ARCH_HAS_ACPI_TABLE_UPGRADE=y
+CONFIG_ACPI_TABLE_UPGRADE=y
+# CONFIG_ACPI_DEBUG is not set
+CONFIG_ACPI_PCI_SLOT=y
+CONFIG_ACPI_CONTAINER=y
+# CONFIG_ACPI_HED is not set
+# CONFIG_ACPI_BGRT is not set
+CONFIG_ACPI_REDUCED_HARDWARE_ONLY=y
+CONFIG_HAVE_ACPI_APEI=y
+# CONFIG_ACPI_APEI is not set
+# CONFIG_PMIC_OPREGION is not set
+# CONFIG_ACPI_CONFIGFS is not set
+CONFIG_ACPI_IORT=y
+CONFIG_ACPI_GTDT=y
+CONFIG_ACPI_PPTT=y
+# CONFIG_VIRTUALIZATION is not set
+# CONFIG_ARM64_CRYPTO is not set
+
+#
+# General architecture-dependent options
+#
+CONFIG_CRASH_CORE=y
+CONFIG_KEXEC_CORE=y
+# CONFIG_JUMP_LABEL is not set
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
+CONFIG_HAVE_NMI=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_IDLE_POLL_SETUP=y
+CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_KEEPINITRD=y
+CONFIG_ARCH_HAS_SET_MEMORY=y
+CONFIG_ARCH_HAS_SET_DIRECT_MAP=y
+CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
+CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y
+CONFIG_MMU_GATHER_TABLE_FREE=y
+CONFIG_MMU_GATHER_RCU_TABLE_FREE=y
+CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
+CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
+CONFIG_HAVE_CMPXCHG_LOCAL=y
+CONFIG_HAVE_CMPXCHG_DOUBLE=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_STACKLEAK=y
+CONFIG_HAVE_STACKPROTECTOR=y
+CONFIG_CC_HAS_STACKPROTECTOR_NONE=y
+# CONFIG_STACKPROTECTOR is not set
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
+CONFIG_HAVE_ARCH_HUGE_VMAP=y
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_HAVE_ARCH_MMAP_RND_BITS=y
+CONFIG_ARCH_MMAP_RND_BITS=18
+CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_CLONE_BACKWARDS=y
+# CONFIG_COMPAT_32BIT_TIME is not set
+CONFIG_HAVE_ARCH_VMAP_STACK=y
+# CONFIG_VMAP_STACK is not set
+CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
+CONFIG_STRICT_KERNEL_RWX=y
+CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
+CONFIG_HAVE_ARCH_COMPILER_H=y
+CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
+CONFIG_ARCH_USE_MEMREMAP_PROT=y
+
+#
+# GCOV-based kernel profiling
+#
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+# end of GCOV-based kernel profiling
+
+CONFIG_HAVE_GCC_PLUGINS=y
+# end of General architecture-dependent options
+
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_BLK_RQ_ALLOC_TIME=y
+CONFIG_BLK_SCSI_REQUEST=y
+CONFIG_BLK_DEV_BSG=y
+CONFIG_BLK_DEV_BSGLIB=y
+# CONFIG_BLK_DEV_INTEGRITY is not set
+# CONFIG_BLK_DEV_ZONED is not set
+# CONFIG_BLK_DEV_THROTTLING is not set
+# CONFIG_BLK_CMDLINE_PARSER is not set
+# CONFIG_BLK_WBT is not set
+CONFIG_BLK_CGROUP_IOLATENCY=y
+CONFIG_BLK_CGROUP_IOCOST=y
+# CONFIG_BLK_SED_OPAL is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_EFI_PARTITION=y
+# end of Partition Types
+
+CONFIG_BLK_MQ_PCI=y
+
+#
+# IO Schedulers
+#
+CONFIG_MQ_IOSCHED_DEADLINE=y
+CONFIG_MQ_IOSCHED_KYBER=y
+# CONFIG_IOSCHED_BFQ is not set
+# end of IO Schedulers
+
+CONFIG_ARCH_INLINE_SPIN_TRYLOCK=y
+CONFIG_ARCH_INLINE_SPIN_TRYLOCK_BH=y
+CONFIG_ARCH_INLINE_SPIN_LOCK=y
+CONFIG_ARCH_INLINE_SPIN_LOCK_BH=y
+CONFIG_ARCH_INLINE_SPIN_LOCK_IRQ=y
+CONFIG_ARCH_INLINE_SPIN_LOCK_IRQSAVE=y
+CONFIG_ARCH_INLINE_SPIN_UNLOCK=y
+CONFIG_ARCH_INLINE_SPIN_UNLOCK_BH=y
+CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQ=y
+CONFIG_ARCH_INLINE_SPIN_UNLOCK_IRQRESTORE=y
+CONFIG_ARCH_INLINE_READ_LOCK=y
+CONFIG_ARCH_INLINE_READ_LOCK_BH=y
+CONFIG_ARCH_INLINE_READ_LOCK_IRQ=y
+CONFIG_ARCH_INLINE_READ_LOCK_IRQSAVE=y
+CONFIG_ARCH_INLINE_READ_UNLOCK=y
+CONFIG_ARCH_INLINE_READ_UNLOCK_BH=y
+CONFIG_ARCH_INLINE_READ_UNLOCK_IRQ=y
+CONFIG_ARCH_INLINE_READ_UNLOCK_IRQRESTORE=y
+CONFIG_ARCH_INLINE_WRITE_LOCK=y
+CONFIG_ARCH_INLINE_WRITE_LOCK_BH=y
+CONFIG_ARCH_INLINE_WRITE_LOCK_IRQ=y
+CONFIG_ARCH_INLINE_WRITE_LOCK_IRQSAVE=y
+CONFIG_ARCH_INLINE_WRITE_UNLOCK=y
+CONFIG_ARCH_INLINE_WRITE_UNLOCK_BH=y
+CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQ=y
+CONFIG_ARCH_INLINE_WRITE_UNLOCK_IRQRESTORE=y
+CONFIG_INLINE_SPIN_TRYLOCK=y
+CONFIG_INLINE_SPIN_TRYLOCK_BH=y
+CONFIG_INLINE_SPIN_LOCK=y
+CONFIG_INLINE_SPIN_LOCK_BH=y
+CONFIG_INLINE_SPIN_LOCK_IRQ=y
+CONFIG_INLINE_SPIN_LOCK_IRQSAVE=y
+CONFIG_INLINE_SPIN_UNLOCK_BH=y
+CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
+CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE=y
+CONFIG_INLINE_READ_LOCK=y
+CONFIG_INLINE_READ_LOCK_BH=y
+CONFIG_INLINE_READ_LOCK_IRQ=y
+CONFIG_INLINE_READ_LOCK_IRQSAVE=y
+CONFIG_INLINE_READ_UNLOCK=y
+CONFIG_INLINE_READ_UNLOCK_BH=y
+CONFIG_INLINE_READ_UNLOCK_IRQ=y
+CONFIG_INLINE_READ_UNLOCK_IRQRESTORE=y
+CONFIG_INLINE_WRITE_LOCK=y
+CONFIG_INLINE_WRITE_LOCK_BH=y
+CONFIG_INLINE_WRITE_LOCK_IRQ=y
+CONFIG_INLINE_WRITE_LOCK_IRQSAVE=y
+CONFIG_INLINE_WRITE_UNLOCK=y
+CONFIG_INLINE_WRITE_UNLOCK_BH=y
+CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
+CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_MUTEX_SPIN_ON_OWNER=y
+CONFIG_RWSEM_SPIN_ON_OWNER=y
+CONFIG_LOCK_SPIN_ON_OWNER=y
+CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
+CONFIG_QUEUED_RWLOCKS=y
+CONFIG_ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE=y
+CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
+CONFIG_FREEZER=y
+
+#
+# Executable file formats
+#
+CONFIG_BINFMT_ELF=y
+CONFIG_ELFCORE=y
+CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
+CONFIG_BINFMT_SCRIPT=y
+CONFIG_BINFMT_MISC=y
+CONFIG_COREDUMP=y
+# end of Executable file formats
+
+#
+# Memory Management options
+#
+CONFIG_SELECT_MEMORY_MODEL=y
+# CONFIG_FLATMEM_MANUAL is not set
+CONFIG_SPARSEMEM_MANUAL=y
+CONFIG_SPARSEMEM=y
+CONFIG_HAVE_MEMORY_PRESENT=y
+CONFIG_SPARSEMEM_EXTREME=y
+CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
+# CONFIG_SPARSEMEM_VMEMMAP is not set
+CONFIG_HAVE_FAST_GUP=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_COMPACTION is not set
+# CONFIG_PAGE_REPORTING is not set
+# CONFIG_MIGRATION is not set
+CONFIG_PHYS_ADDR_T_64BIT=y
+CONFIG_BOUNCE=y
+# CONFIG_KSM is not set
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
+# CONFIG_MEMORY_FAILURE is not set
+# CONFIG_TRANSPARENT_HUGEPAGE is not set
+# CONFIG_CLEANCACHE is not set
+# CONFIG_CMA is not set
+# CONFIG_ZPOOL is not set
+# CONFIG_ZBUD is not set
+# CONFIG_ZSMALLOC is not set
+CONFIG_GENERIC_EARLY_IOREMAP=y
+# CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set
+# CONFIG_IDLE_PAGE_TRACKING is not set
+CONFIG_ARCH_HAS_PTE_DEVMAP=y
+# CONFIG_PERCPU_STATS is not set
+# CONFIG_GUP_BENCHMARK is not set
+CONFIG_ARCH_HAS_PTE_SPECIAL=y
+# end of Memory Management options
+
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_DIAG is not set
+CONFIG_UNIX=y
+CONFIG_UNIX_SCM=y
+# CONFIG_UNIX_DIAG is not set
+CONFIG_TLS=y
+# CONFIG_TLS_DEVICE is not set
+# CONFIG_TLS_TOE is not set
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+# CONFIG_NET_IPGRE_DEMUX is not set
+CONFIG_NET_IP_TUNNEL=y
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_NET_IPVTI is not set
+# CONFIG_NET_FOU is not set
+# CONFIG_NET_FOU_IP_TUNNELS is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+CONFIG_INET_TUNNEL=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_INET_UDP_DIAG is not set
+# CONFIG_INET_RAW_DIAG is not set
+# CONFIG_INET_DIAG_DESTROY is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETLABEL is not set
+# CONFIG_MPTCP is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_BPFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_RDS is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_L2TP is not set
+# CONFIG_BRIDGE is not set
+CONFIG_HAVE_NET_DSA=y
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+# CONFIG_BATMAN_ADV is not set
+# CONFIG_OPENVSWITCH is not set
+# CONFIG_VSOCKETS is not set
+# CONFIG_NETLINK_DIAG is not set
+# CONFIG_MPLS is not set
+# CONFIG_NET_NSH is not set
+# CONFIG_HSR is not set
+# CONFIG_NET_SWITCHDEV is not set
+# CONFIG_NET_L3_MASTER_DEV is not set
+# CONFIG_NET_NCSI is not set
+CONFIG_RPS=y
+CONFIG_RFS_ACCEL=y
+CONFIG_XPS=y
+CONFIG_CGROUP_NET_PRIO=y
+CONFIG_CGROUP_NET_CLASSID=y
+CONFIG_NET_RX_BUSY_POLL=y
+CONFIG_BQL=y
+CONFIG_NET_FLOW_LIMIT=y
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# end of Network testing
+# end of Networking options
+
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+# CONFIG_AF_KCM is not set
+CONFIG_STREAM_PARSER=y
+# CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+# CONFIG_CAIF is not set
+# CONFIG_CEPH_LIB is not set
+# CONFIG_NFC is not set
+# CONFIG_PSAMPLE is not set
+# CONFIG_NET_IFE is not set
+# CONFIG_LWTUNNEL is not set
+CONFIG_DST_CACHE=y
+CONFIG_GRO_CELLS=y
+CONFIG_NET_SOCK_MSG=y
+# CONFIG_FAILOVER is not set
+# CONFIG_ETHTOOL_NETLINK is not set
+CONFIG_HAVE_EBPF_JIT=y
+
+#
+# Device Drivers
+#
+CONFIG_ARM_AMBA=y
+CONFIG_HAVE_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DOMAINS_GENERIC=y
+CONFIG_PCI_SYSCALL=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIEAER_INJECT is not set
+# CONFIG_PCIE_ECRC is not set
+CONFIG_PCIEASPM=y
+CONFIG_PCIEASPM_DEFAULT=y
+# CONFIG_PCIEASPM_POWERSAVE is not set
+# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
+# CONFIG_PCIEASPM_PERFORMANCE is not set
+# CONFIG_PCIE_DPC is not set
+# CONFIG_PCIE_PTM is not set
+# CONFIG_PCIE_BW is not set
+CONFIG_PCI_MSI=y
+CONFIG_PCI_MSI_IRQ_DOMAIN=y
+CONFIG_PCI_QUIRKS=y
+# CONFIG_PCI_STUB is not set
+CONFIG_PCI_ECAM=y
+# CONFIG_PCI_IOV is not set
+# CONFIG_PCI_PRI is not set
+# CONFIG_PCI_PASID is not set
+CONFIG_PCI_LABEL=y
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# PCI controller drivers
+#
+# CONFIG_PCI_FTPCI100 is not set
+# CONFIG_PCI_HOST_GENERIC is not set
+# CONFIG_PCIE_XILINX is not set
+# CONFIG_PCI_XGENE is not set
+# CONFIG_PCIE_ALTERA is not set
+# CONFIG_PCI_HOST_THUNDER_PEM is not set
+# CONFIG_PCI_HOST_THUNDER_ECAM is not set
+
+#
+# DesignWare PCI Core Support
+#
+# CONFIG_PCIE_DW_PLAT_HOST is not set
+# CONFIG_PCIE_DW_PLAT_EP is not set
+# CONFIG_PCI_HISI is not set
+# CONFIG_PCIE_KIRIN is not set
+# CONFIG_PCI_MESON is not set
+# CONFIG_PCIE_AL is not set
+# end of DesignWare PCI Core Support
+
+#
+# Mobiveil PCIe Core Support
+#
+# CONFIG_PCIE_LAYERSCAPE_GEN4 is not set
+# end of Mobiveil PCIe Core Support
+
+#
+# Cadence PCIe controllers support
+#
+CONFIG_PCIE_CADENCE=y
+CONFIG_PCIE_CADENCE_HOST=y
+CONFIG_PCIE_CADENCE_EP=y
+CONFIG_PCIE_CADENCE_PLAT=y
+CONFIG_PCIE_CADENCE_PLAT_HOST=y
+CONFIG_PCIE_CADENCE_PLAT_EP=y
+# end of Cadence PCIe controllers support
+# end of PCI controller drivers
+
+#
+# PCI Endpoint
+#
+CONFIG_PCI_ENDPOINT=y
+CONFIG_PCI_ENDPOINT_CONFIGFS=y
+# CONFIG_PCI_EPF_TEST is not set
+# end of PCI Endpoint
+
+#
+# PCI switch controller drivers
+#
+# CONFIG_PCI_SW_SWITCHTEC is not set
+# end of PCI switch controller drivers
+
+# CONFIG_PCCARD is not set
+# CONFIG_RAPIDIO is not set
+
+#
+# Generic Driver Options
+#
+# CONFIG_UEVENT_HELPER is not set
+CONFIG_DEVTMPFS=y
+CONFIG_DEVTMPFS_MOUNT=y
+# CONFIG_STANDALONE is not set
+# CONFIG_PREVENT_FIRMWARE_BUILD is not set
+
+#
+# Firmware loader
+#
+CONFIG_FW_LOADER=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_FW_LOADER_USER_HELPER is not set
+# CONFIG_FW_LOADER_COMPRESS is not set
+# end of Firmware loader
+
+CONFIG_ALLOW_DEV_COREDUMP=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_CPU_VULNERABILITIES=y
+CONFIG_GENERIC_ARCH_TOPOLOGY=y
+# end of Generic Driver Options
+
+#
+# Bus devices
+#
+# CONFIG_BRCMSTB_GISB_ARB is not set
+# CONFIG_VEXPRESS_CONFIG is not set
+# CONFIG_MHI_BUS is not set
+# end of Bus devices
+
+# CONFIG_CONNECTOR is not set
+# CONFIG_GNSS is not set
+# CONFIG_MTD is not set
+CONFIG_DTC=y
+CONFIG_OF=y
+# CONFIG_OF_UNITTEST is not set
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_NET=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_RESERVED_MEM=y
+# CONFIG_OF_OVERLAY is not set
+# CONFIG_PARPORT is not set
+CONFIG_PNP=y
+# CONFIG_PNP_DEBUG_MESSAGES is not set
+
+#
+# Protocols
+#
+CONFIG_PNPACPI=y
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_NULL_BLK is not set
+# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_DRBD is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SKD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_RAM is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_BLK_DEV_RBD is not set
+# CONFIG_BLK_DEV_RSXX is not set
+
+#
+# NVME Support
+#
+CONFIG_NVME_CORE=y
+CONFIG_BLK_DEV_NVME=y
+CONFIG_NVME_MULTIPATH=y
+# CONFIG_NVME_FC is not set
+# CONFIG_NVME_TCP is not set
+# CONFIG_NVME_TARGET is not set
+# end of NVME Support
+
+#
+# Misc devices
+#
+# CONFIG_AD525X_DPOT is not set
+# CONFIG_DUMMY_IRQ is not set
+# CONFIG_PHANTOM is not set
+# CONFIG_TIFM_CORE is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_HP_ILO is not set
+# CONFIG_APDS9802ALS is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_ISL29020 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_SENSORS_BH1770 is not set
+# CONFIG_SENSORS_APDS990X is not set
+# CONFIG_HMC6352 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SRAM is not set
+# CONFIG_PCI_ENDPOINT_TEST is not set
+# CONFIG_XILINX_SDFEC is not set
+# CONFIG_PVPANIC is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_MAX6875 is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_EEPROM_IDT_89HPESX is not set
+# CONFIG_EEPROM_EE1004 is not set
+# end of EEPROM support
+
+# CONFIG_CB710_CORE is not set
+
+#
+# Texas Instruments shared transport line discipline
+#
+# end of Texas Instruments shared transport line discipline
+
+# CONFIG_SENSORS_LIS3_I2C is not set
+# CONFIG_ALTERA_STAPL is not set
+
+#
+# Intel MIC & related support
+#
+# CONFIG_VOP_BUS is not set
+# end of Intel MIC & related support
+
+# CONFIG_GENWQE is not set
+# CONFIG_ECHO is not set
+# CONFIG_MISC_ALCOR_PCI is not set
+# CONFIG_MISC_RTSX_PCI is not set
+# CONFIG_HABANA_AI is not set
+# end of Misc devices
+
+#
+# SCSI device support
+#
+CONFIG_SCSI_MOD=y
+CONFIG_RAID_ATTRS=y
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+CONFIG_SCSI_SAS_ATTRS=y
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+# end of SCSI Transports
+
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_ISCSI_BOOT_SYSFS is not set
+# CONFIG_SCSI_CXGB3_ISCSI is not set
+# CONFIG_SCSI_CXGB4_ISCSI is not set
+# CONFIG_SCSI_BNX2_ISCSI is not set
+# CONFIG_BE2ISCSI is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_HPSA is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_3W_SAS is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_MVSAS is not set
+# CONFIG_SCSI_MVUMI is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_SCSI_ESAS2R is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+CONFIG_SCSI_MPT3SAS=y
+CONFIG_SCSI_MPT2SAS_MAX_SGE=128
+CONFIG_SCSI_MPT3SAS_MAX_SGE=128
+# CONFIG_SCSI_MPT2SAS is not set
+# CONFIG_SCSI_SMARTPQI is not set
+# CONFIG_SCSI_UFSHCD is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_MYRB is not set
+# CONFIG_SCSI_MYRS is not set
+# CONFIG_SCSI_SNIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_FDOMAIN_PCI is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_AM53C974 is not set
+# CONFIG_SCSI_WD719X is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_PMCRAID is not set
+# CONFIG_SCSI_PM8001 is not set
+# CONFIG_SCSI_DH is not set
+# end of SCSI device support
+
+CONFIG_HAVE_PATA_PLATFORM=y
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_TARGET_CORE is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_FIREWIRE_NOSY is not set
+# end of IEEE 1394 (FireWire) support
+
+CONFIG_NETDEVICES=y
+CONFIG_NET_CORE=y
+# CONFIG_BONDING is not set
+# CONFIG_DUMMY is not set
+# CONFIG_WIREGUARD is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_NET_FC is not set
+# CONFIG_NET_TEAM is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_IPVLAN is not set
+# CONFIG_VXLAN is not set
+# CONFIG_GENEVE is not set
+# CONFIG_BAREUDP is not set
+# CONFIG_GTP is not set
+# CONFIG_MACSEC is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_TUN is not set
+# CONFIG_TUN_VNET_CROSS_LE is not set
+# CONFIG_VETH is not set
+# CONFIG_NLMON is not set
+# CONFIG_ARCNET is not set
+
+#
+# Distributed Switch Architecture drivers
+#
+# end of Distributed Switch Architecture drivers
+
+CONFIG_ETHERNET=y
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_VENDOR_ADAPTEC is not set
+# CONFIG_NET_VENDOR_AGERE is not set
+# CONFIG_NET_VENDOR_ALACRITECH is not set
+# CONFIG_NET_VENDOR_ALTEON is not set
+# CONFIG_ALTERA_TSE is not set
+# CONFIG_NET_VENDOR_AMAZON is not set
+# CONFIG_NET_VENDOR_AMD is not set
+# CONFIG_NET_VENDOR_AQUANTIA is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_VENDOR_ATHEROS is not set
+# CONFIG_NET_VENDOR_AURORA is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_BROCADE is not set
+# CONFIG_NET_VENDOR_CADENCE is not set
+# CONFIG_NET_VENDOR_CAVIUM is not set
+# CONFIG_NET_VENDOR_CHELSIO is not set
+# CONFIG_NET_VENDOR_CISCO is not set
+# CONFIG_NET_VENDOR_CORTINA is not set
+# CONFIG_DNET is not set
+# CONFIG_NET_VENDOR_DEC is not set
+# CONFIG_NET_VENDOR_DLINK is not set
+# CONFIG_NET_VENDOR_EMULEX is not set
+# CONFIG_NET_VENDOR_EZCHIP is not set
+# CONFIG_NET_VENDOR_GOOGLE is not set
+# CONFIG_NET_VENDOR_HISILICON is not set
+# CONFIG_NET_VENDOR_HUAWEI is not set
+# CONFIG_NET_VENDOR_I825XX is not set
+CONFIG_NET_VENDOR_INTEL=y
+# CONFIG_E100 is not set
+# CONFIG_E1000 is not set
+# CONFIG_E1000E is not set
+CONFIG_IGB=y
+# CONFIG_IGBVF is not set
+# CONFIG_IXGB is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGBEVF is not set
+# CONFIG_I40E is not set
+# CONFIG_I40EVF is not set
+# CONFIG_ICE is not set
+# CONFIG_FM10K is not set
+# CONFIG_IGC is not set
+# CONFIG_JME is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MELLANOX is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_MICROCHIP is not set
+# CONFIG_NET_VENDOR_MICROSEMI is not set
+# CONFIG_NET_VENDOR_MYRI is not set
+# CONFIG_FEALNX is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+# CONFIG_NET_VENDOR_NETERION is not set
+# CONFIG_NET_VENDOR_NETRONOME is not set
+# CONFIG_NET_VENDOR_NI is not set
+# CONFIG_NET_VENDOR_NVIDIA is not set
+# CONFIG_NET_VENDOR_OKI is not set
+# CONFIG_ETHOC is not set
+# CONFIG_NET_VENDOR_PACKET_ENGINES is not set
+# CONFIG_NET_VENDOR_PENSANDO is not set
+# CONFIG_NET_VENDOR_QLOGIC is not set
+# CONFIG_NET_VENDOR_QUALCOMM is not set
+# CONFIG_NET_VENDOR_RDC is not set
+# CONFIG_NET_VENDOR_REALTEK is not set
+# CONFIG_NET_VENDOR_RENESAS is not set
+# CONFIG_NET_VENDOR_ROCKER is not set
+# CONFIG_NET_VENDOR_SAMSUNG is not set
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SOLARFLARE is not set
+# CONFIG_NET_VENDOR_SILAN is not set
+# CONFIG_NET_VENDOR_SIS is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_SOCIONEXT is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_SUN is not set
+# CONFIG_NET_VENDOR_SYNOPSYS is not set
+# CONFIG_NET_VENDOR_TEHUTI is not set
+# CONFIG_NET_VENDOR_TI is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_NET_VENDOR_XILINX is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_NET_SB1000 is not set
+CONFIG_MDIO_DEVICE=y
+CONFIG_MDIO_BUS=y
+# CONFIG_MDIO_BCM_UNIMAC is not set
+# CONFIG_MDIO_BITBANG is not set
+# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
+# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
+# CONFIG_MDIO_HISI_FEMAC is not set
+# CONFIG_MDIO_MSCC_MIIM is not set
+# CONFIG_MDIO_OCTEON is not set
+# CONFIG_MDIO_THUNDER is not set
+# CONFIG_MDIO_XPCS is not set
+CONFIG_PHYLIB=y
+CONFIG_SWPHY=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_ADIN_PHY is not set
+# CONFIG_AMD_PHY is not set
+# CONFIG_AQUANTIA_PHY is not set
+# CONFIG_AX88796B_PHY is not set
+# CONFIG_BCM7XXX_PHY is not set
+# CONFIG_BCM87XX_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_BCM84881_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_CORTINA_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_DP83822_PHY is not set
+# CONFIG_DP83TC811_PHY is not set
+# CONFIG_DP83848_PHY is not set
+# CONFIG_DP83867_PHY is not set
+# CONFIG_DP83869_PHY is not set
+CONFIG_FIXED_PHY=y
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_INTEL_XWAY_PHY is not set
+# CONFIG_LSI_ET1011C_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_MARVELL_10G_PHY is not set
+# CONFIG_MICREL_PHY is not set
+# CONFIG_MICROCHIP_PHY is not set
+# CONFIG_MICROCHIP_T1_PHY is not set
+# CONFIG_MICROSEMI_PHY is not set
+# CONFIG_NATIONAL_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_REALTEK_PHY is not set
+# CONFIG_RENESAS_PHY is not set
+# CONFIG_ROCKCHIP_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_STE10XP is not set
+# CONFIG_TERANETICS_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_XILINX_GMII2RGMII is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+
+#
+# Host-side USB support is needed for USB Network Adapter support
+#
+# CONFIG_WLAN is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
+# CONFIG_WAN is not set
+# CONFIG_VMXNET3 is not set
+# CONFIG_FUJITSU_ES is not set
+# CONFIG_NET_FAILOVER is not set
+# CONFIG_ISDN is not set
+# CONFIG_NVM is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+# CONFIG_INPUT_SPARSEKMAP is not set
+# CONFIG_INPUT_MATRIXKMAP is not set
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+CONFIG_INPUT_EVDEV=y
+CONFIG_INPUT_EVBUG=y
+
+#
+# Input Device Drivers
+#
+CONFIG_INPUT_KEYBOARD=y
+# CONFIG_KEYBOARD_ADP5588 is not set
+# CONFIG_KEYBOARD_ADP5589 is not set
+CONFIG_KEYBOARD_ATKBD=y
+# CONFIG_KEYBOARD_QT1050 is not set
+# CONFIG_KEYBOARD_QT1070 is not set
+# CONFIG_KEYBOARD_QT2160 is not set
+# CONFIG_KEYBOARD_DLINK_DIR685 is not set
+# CONFIG_KEYBOARD_LKKBD is not set
+# CONFIG_KEYBOARD_TCA6416 is not set
+# CONFIG_KEYBOARD_TCA8418 is not set
+# CONFIG_KEYBOARD_LM8333 is not set
+# CONFIG_KEYBOARD_MAX7359 is not set
+# CONFIG_KEYBOARD_MCS is not set
+# CONFIG_KEYBOARD_MPR121 is not set
+# CONFIG_KEYBOARD_NEWTON is not set
+# CONFIG_KEYBOARD_OPENCORES is not set
+# CONFIG_KEYBOARD_SAMSUNG is not set
+# CONFIG_KEYBOARD_STOWAWAY is not set
+# CONFIG_KEYBOARD_SUNKBD is not set
+# CONFIG_KEYBOARD_OMAP4 is not set
+# CONFIG_KEYBOARD_XTKBD is not set
+# CONFIG_KEYBOARD_CAP11XX is not set
+# CONFIG_KEYBOARD_BCM is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+# CONFIG_RMI4_CORE is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_AMBAKMI is not set
+# CONFIG_SERIO_PCIPS2 is not set
+CONFIG_SERIO_LIBPS2=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_SERIO_ALTERA_PS2 is not set
+# CONFIG_SERIO_PS2MULT is not set
+# CONFIG_SERIO_ARC_PS2 is not set
+# CONFIG_SERIO_APBPS2 is not set
+# CONFIG_USERIO is not set
+# CONFIG_GAMEPORT is not set
+# end of Hardware I/O ports
+# end of Input device support
+
+#
+# Character devices
+#
+CONFIG_TTY=y
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+CONFIG_LDISC_AUTOLOAD=y
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_EARLYCON=y
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_AMBA_PL010=y
+CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
+CONFIG_SERIAL_AMBA_PL011=y
+CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
+CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST=y
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+# CONFIG_SERIAL_SIFIVE is not set
+# CONFIG_SERIAL_SCCNXP is not set
+# CONFIG_SERIAL_SC16IS7XX is not set
+# CONFIG_SERIAL_ALTERA_JTAGUART is not set
+# CONFIG_SERIAL_ALTERA_UART is not set
+# CONFIG_SERIAL_XILINX_PS_UART is not set
+# CONFIG_SERIAL_ARC is not set
+# CONFIG_SERIAL_RP2 is not set
+# CONFIG_SERIAL_FSL_LPUART is not set
+# CONFIG_SERIAL_FSL_LINFLEXUART is not set
+# CONFIG_SERIAL_CONEXANT_DIGICOLOR is not set
+# CONFIG_SERIAL_SPRD is not set
+# end of Serial drivers
+
+# CONFIG_SERIAL_NONSTANDARD is not set
+# CONFIG_N_GSM is not set
+# CONFIG_NOZOMI is not set
+# CONFIG_NULL_TTY is not set
+# CONFIG_TRACE_SINK is not set
+# CONFIG_HVC_DCC is not set
+# CONFIG_SERIAL_DEV_BUS is not set
+CONFIG_IPMI_HANDLER=y
+CONFIG_IPMI_DMI_DECODE=y
+CONFIG_IPMI_PLAT_DATA=y
+# CONFIG_IPMI_PANIC_EVENT is not set
+CONFIG_IPMI_DEVICE_INTERFACE=y
+CONFIG_IPMI_SI=y
+CONFIG_IPMI_SSIF=y
+# CONFIG_IPMI_WATCHDOG is not set
+CONFIG_IPMI_POWEROFF=y
+# CONFIG_IPMB_DEVICE_INTERFACE is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_DEVMEM is not set
+# CONFIG_RAW_DRIVER is not set
+CONFIG_DEVPORT=y
+# CONFIG_TCG_TPM is not set
+# CONFIG_XILLYBUS is not set
+# end of Character devices
+
+# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_ACPI_I2C_OPREGION=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_COMPAT=y
+CONFIG_I2C_CHARDEV=y
+# CONFIG_I2C_MUX is not set
+CONFIG_I2C_HELPER_AUTO=y
+CONFIG_I2C_ALGOBIT=y
+
+#
+# I2C Hardware Bus support
+#
+
+#
+# PC SMBus host controller drivers
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_AMD_MP2 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_ISCH is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_NVIDIA_GPU is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+
+#
+# ACPI drivers
+#
+# CONFIG_I2C_SCMI is not set
+
+#
+# I2C system bus drivers (mostly embedded / system-on-chip)
+#
+# CONFIG_I2C_CADENCE is not set
+CONFIG_I2C_DESIGNWARE_CORE=y
+CONFIG_I2C_DESIGNWARE_PLATFORM=y
+CONFIG_I2C_DESIGNWARE_SLAVE=y
+# CONFIG_I2C_DESIGNWARE_PCI is not set
+# CONFIG_I2C_EMEV2 is not set
+# CONFIG_I2C_NOMADIK is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
+# CONFIG_I2C_RK3X is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_THUNDERX is not set
+# CONFIG_I2C_XILINX is not set
+
+#
+# External I2C/SMBus adapter drivers
+#
+# CONFIG_I2C_TAOS_EVM is not set
+
+#
+# Other I2C/SMBus bus drivers
+#
+# end of I2C Hardware Bus support
+
+CONFIG_I2C_SLAVE=y
+# CONFIG_I2C_SLAVE_EEPROM is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# end of I2C support
+
+# CONFIG_I3C is not set
+# CONFIG_SPI is not set
+# CONFIG_SPMI is not set
+# CONFIG_HSI is not set
+# CONFIG_PPS is not set
+
+#
+# PTP clock support
+#
+# CONFIG_PTP_1588_CLOCK is not set
+
+#
+# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
+#
+# end of PTP clock support
+
+# CONFIG_PINCTRL is not set
+# CONFIG_GPIOLIB is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_AVS is not set
+CONFIG_POWER_RESET=y
+# CONFIG_POWER_RESET_RESTART is not set
+# CONFIG_POWER_RESET_XGENE is not set
+# CONFIG_POWER_RESET_SYSCON is not set
+# CONFIG_POWER_RESET_SYSCON_POWEROFF is not set
+# CONFIG_NVMEM_REBOOT_MODE is not set
+CONFIG_POWER_SUPPLY=y
+# CONFIG_POWER_SUPPLY_DEBUG is not set
+# CONFIG_PDA_POWER is not set
+# CONFIG_TEST_POWER is not set
+# CONFIG_CHARGER_ADP5061 is not set
+# CONFIG_BATTERY_DS2780 is not set
+# CONFIG_BATTERY_DS2781 is not set
+# CONFIG_BATTERY_DS2782 is not set
+# CONFIG_BATTERY_SBS is not set
+# CONFIG_CHARGER_SBS is not set
+# CONFIG_BATTERY_BQ27XXX is not set
+# CONFIG_BATTERY_MAX17040 is not set
+# CONFIG_BATTERY_MAX17042 is not set
+# CONFIG_CHARGER_MAX8903 is not set
+# CONFIG_CHARGER_LP8727 is not set
+# CONFIG_CHARGER_DETECTOR_MAX14656 is not set
+# CONFIG_CHARGER_BQ2415X is not set
+# CONFIG_CHARGER_SMB347 is not set
+# CONFIG_BATTERY_GAUGE_LTC2941 is not set
+# CONFIG_HWMON is not set
+CONFIG_THERMAL=y
+# CONFIG_THERMAL_STATISTICS is not set
+CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
+# CONFIG_THERMAL_OF is not set
+# CONFIG_THERMAL_WRITABLE_TRIPS is not set
+CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
+# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
+# CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE is not set
+# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
+CONFIG_THERMAL_GOV_STEP_WISE=y
+# CONFIG_THERMAL_GOV_BANG_BANG is not set
+# CONFIG_THERMAL_GOV_USER_SPACE is not set
+# CONFIG_THERMAL_EMULATION is not set
+# CONFIG_THERMAL_MMIO is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+CONFIG_BCMA_POSSIBLE=y
+# CONFIG_BCMA is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_ACT8945A is not set
+# CONFIG_MFD_AS3711 is not set
+# CONFIG_MFD_AS3722 is not set
+# CONFIG_PMIC_ADP5520 is not set
+# CONFIG_MFD_ATMEL_FLEXCOM is not set
+# CONFIG_MFD_ATMEL_HLCDC is not set
+# CONFIG_MFD_BCM590XX is not set
+# CONFIG_MFD_BD9571MWV is not set
+# CONFIG_MFD_AXP20X_I2C is not set
+# CONFIG_MFD_MADERA is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_DA9052_I2C is not set
+# CONFIG_MFD_DA9055 is not set
+# CONFIG_MFD_DA9062 is not set
+# CONFIG_MFD_DA9063 is not set
+# CONFIG_MFD_DA9150 is not set
+# CONFIG_MFD_MC13XXX_I2C is not set
+# CONFIG_MFD_HI6421_PMIC is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_LPC_ICH is not set
+# CONFIG_LPC_SCH is not set
+# CONFIG_MFD_IQS62X is not set
+# CONFIG_MFD_JANZ_CMODIO is not set
+# CONFIG_MFD_KEMPLD is not set
+# CONFIG_MFD_88PM800 is not set
+# CONFIG_MFD_88PM805 is not set
+# CONFIG_MFD_88PM860X is not set
+# CONFIG_MFD_MAX14577 is not set
+# CONFIG_MFD_MAX77620 is not set
+# CONFIG_MFD_MAX77650 is not set
+# CONFIG_MFD_MAX77686 is not set
+# CONFIG_MFD_MAX77693 is not set
+# CONFIG_MFD_MAX77843 is not set
+# CONFIG_MFD_MAX8907 is not set
+# CONFIG_MFD_MAX8925 is not set
+# CONFIG_MFD_MAX8997 is not set
+# CONFIG_MFD_MAX8998 is not set
+# CONFIG_MFD_MT6397 is not set
+# CONFIG_MFD_MENF21BMC is not set
+# CONFIG_MFD_RETU is not set
+# CONFIG_MFD_PCF50633 is not set
+# CONFIG_MFD_RDC321X is not set
+# CONFIG_MFD_RT5033 is not set
+# CONFIG_MFD_RC5T583 is not set
+# CONFIG_MFD_RK808 is not set
+# CONFIG_MFD_RN5T618 is not set
+# CONFIG_MFD_SEC_CORE is not set
+# CONFIG_MFD_SI476X_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_SKY81452 is not set
+# CONFIG_MFD_SMSC is not set
+# CONFIG_ABX500_CORE is not set
+# CONFIG_MFD_STMPE is not set
+# CONFIG_MFD_SYSCON is not set
+# CONFIG_MFD_TI_AM335X_TSCADC is not set
+# CONFIG_MFD_LP3943 is not set
+# CONFIG_MFD_LP8788 is not set
+# CONFIG_MFD_TI_LMU is not set
+# CONFIG_MFD_PALMAS is not set
+# CONFIG_TPS6105X is not set
+# CONFIG_TPS6507X is not set
+# CONFIG_MFD_TPS65086 is not set
+# CONFIG_MFD_TPS65090 is not set
+# CONFIG_MFD_TPS65217 is not set
+# CONFIG_MFD_TPS68470 is not set
+# CONFIG_MFD_TI_LP873X is not set
+# CONFIG_MFD_TI_LP87565 is not set
+# CONFIG_MFD_TPS65218 is not set
+# CONFIG_MFD_TPS6586X is not set
+# CONFIG_MFD_TPS65912_I2C is not set
+# CONFIG_MFD_TPS80031 is not set
+# CONFIG_TWL4030_CORE is not set
+# CONFIG_TWL6040_CORE is not set
+# CONFIG_MFD_WL1273_CORE is not set
+# CONFIG_MFD_LM3533 is not set
+# CONFIG_MFD_TC3589X is not set
+# CONFIG_MFD_TQMX86 is not set
+# CONFIG_MFD_VX855 is not set
+# CONFIG_MFD_LOCHNAGAR is not set
+# CONFIG_MFD_ARIZONA_I2C is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM831X_I2C is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_WM8994 is not set
+# CONFIG_MFD_ROHM_BD718XX is not set
+# CONFIG_MFD_ROHM_BD70528 is not set
+# CONFIG_MFD_ROHM_BD71828 is not set
+# CONFIG_MFD_STPMIC1 is not set
+# CONFIG_MFD_STMFX is not set
+# end of Multifunction device drivers
+
+# CONFIG_REGULATOR is not set
+# CONFIG_RC_CORE is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+CONFIG_VGA_ARB=y
+CONFIG_VGA_ARB_MAX_GPUS=16
+# CONFIG_DRM is not set
+
+#
+# ARM devices
+#
+# end of ARM devices
+
+CONFIG_DRM_RCAR_WRITEBACK=y
+
+#
+# Frame buffer Devices
+#
+# CONFIG_FB is not set
+# end of Frame buffer Devices
+
+#
+# Backlight & LCD device support
+#
+# CONFIG_LCD_CLASS_DEVICE is not set
+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+# end of Backlight & LCD device support
+
+#
+# Console display driver support
+#
+CONFIG_DUMMY_CONSOLE=y
+CONFIG_DUMMY_CONSOLE_COLUMNS=80
+CONFIG_DUMMY_CONSOLE_ROWS=25
+# end of Console display driver support
+# end of Graphics support
+
+# CONFIG_SOUND is not set
+
+#
+# HID support
+#
+CONFIG_HID=y
+# CONFIG_HID_BATTERY_STRENGTH is not set
+# CONFIG_HIDRAW is not set
+CONFIG_UHID=y
+CONFIG_HID_GENERIC=y
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_ACRUX is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_AUREAL is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_COUGAR is not set
+# CONFIG_HID_MACALLY is not set
+# CONFIG_HID_CMEDIA is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_HID_DRAGONRISE is not set
+# CONFIG_HID_EMS_FF is not set
+# CONFIG_HID_ELECOM is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_GEMBIRD is not set
+# CONFIG_HID_GFRM is not set
+# CONFIG_HID_GLORIOUS is not set
+# CONFIG_HID_KEYTOUCH is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_WALTOP is not set
+# CONFIG_HID_VIEWSONIC is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_ICADE is not set
+# CONFIG_HID_ITE is not set
+# CONFIG_HID_JABRA is not set
+# CONFIG_HID_TWINHAN is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LCPOWER is not set
+# CONFIG_HID_LENOVO is not set
+# CONFIG_HID_MAGICMOUSE is not set
+# CONFIG_HID_MALTRON is not set
+# CONFIG_HID_MAYFLASH is not set
+# CONFIG_HID_REDRAGON is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_MULTITOUCH is not set
+# CONFIG_HID_NTI is not set
+# CONFIG_HID_ORTEK is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_PICOLCD is not set
+# CONFIG_HID_PLANTRONICS is not set
+# CONFIG_HID_PRIMAX is not set
+# CONFIG_HID_SAITEK is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SPEEDLINK is not set
+# CONFIG_HID_STEAM is not set
+# CONFIG_HID_STEELSERIES is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_HID_RMI is not set
+# CONFIG_HID_GREENASIA is not set
+# CONFIG_HID_SMARTJOYPLUS is not set
+# CONFIG_HID_TIVO is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_HID_THRUSTMASTER is not set
+# CONFIG_HID_UDRAW_PS3 is not set
+# CONFIG_HID_XINMO is not set
+# CONFIG_HID_ZEROPLUS is not set
+# CONFIG_HID_ZYDACRON is not set
+# CONFIG_HID_SENSOR_HUB is not set
+# CONFIG_HID_ALPS is not set
+# end of Special HID drivers
+
+#
+# I2C HID support
+#
+# CONFIG_I2C_HID is not set
+# end of I2C HID support
+# end of HID support
+
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_INFINIBAND is not set
+CONFIG_EDAC_SUPPORT=y
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+
+#
+# DMABUF options
+#
+# CONFIG_SYNC_FILE is not set
+# CONFIG_DMABUF_MOVE_NOTIFY is not set
+# CONFIG_DMABUF_HEAPS is not set
+# end of DMABUF options
+
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_UIO is not set
+# CONFIG_VIRT_DRIVERS is not set
+# CONFIG_VIRTIO_MENU is not set
+# CONFIG_VDPA is not set
+CONFIG_VHOST_DPN=y
+# CONFIG_VHOST_MENU is not set
+
+#
+# Microsoft Hyper-V guest support
+#
+# end of Microsoft Hyper-V guest support
+
+# CONFIG_GREYBUS is not set
+# CONFIG_STAGING is not set
+# CONFIG_GOLDFISH is not set
+# CONFIG_MFD_CROS_EC is not set
+# CONFIG_CHROME_PLATFORMS is not set
+# CONFIG_MELLANOX_PLATFORM is not set
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_HAVE_CLK_PREPARE=y
+CONFIG_COMMON_CLK=y
+
+#
+# Common Clock Framework
+#
+# CONFIG_COMMON_CLK_VERSATILE is not set
+# CONFIG_CLK_HSDK is not set
+# CONFIG_COMMON_CLK_MAX9485 is not set
+# CONFIG_COMMON_CLK_SI5341 is not set
+# CONFIG_COMMON_CLK_SI5351 is not set
+# CONFIG_COMMON_CLK_SI514 is not set
+# CONFIG_COMMON_CLK_SI544 is not set
+# CONFIG_COMMON_CLK_SI570 is not set
+# CONFIG_COMMON_CLK_CDCE706 is not set
+# CONFIG_COMMON_CLK_CDCE925 is not set
+# CONFIG_COMMON_CLK_CS2000_CP is not set
+# CONFIG_CLK_QORIQ is not set
+# CONFIG_COMMON_CLK_XGENE is not set
+# CONFIG_COMMON_CLK_VC5 is not set
+# CONFIG_COMMON_CLK_FIXED_MMIO is not set
+# end of Common Clock Framework
+
+# CONFIG_HWSPINLOCK is not set
+
+#
+# Clock Source drivers
+#
+CONFIG_TIMER_OF=y
+CONFIG_TIMER_ACPI=y
+CONFIG_TIMER_PROBE=y
+CONFIG_ARM_ARCH_TIMER=y
+# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
+# CONFIG_FSL_ERRATUM_A008585 is not set
+# CONFIG_HISILICON_ERRATUM_161010101 is not set
+# CONFIG_ARM64_ERRATUM_858921 is not set
+# CONFIG_MICROCHIP_PIT64B is not set
+# end of Clock Source drivers
+
+CONFIG_MAILBOX=y
+# CONFIG_ARM_MHU is not set
+# CONFIG_PLATFORM_MHU is not set
+# CONFIG_PL320_MBOX is not set
+CONFIG_PCC=y
+# CONFIG_ALTERA_MBOX is not set
+# CONFIG_MAILBOX_TEST is not set
+# CONFIG_IOMMU_SUPPORT is not set
+
+#
+# Remoteproc drivers
+#
+# CONFIG_REMOTEPROC is not set
+# end of Remoteproc drivers
+
+#
+# Rpmsg drivers
+#
+# CONFIG_RPMSG_QCOM_GLINK_RPM is not set
+# CONFIG_RPMSG_VIRTIO is not set
+# end of Rpmsg drivers
+
+# CONFIG_SOUNDWIRE is not set
+
+#
+# SOC (System On Chip) specific Drivers
+#
+
+#
+# Amlogic SoC drivers
+#
+# end of Amlogic SoC drivers
+
+#
+# Aspeed SoC drivers
+#
+# end of Aspeed SoC drivers
+
+#
+# Broadcom SoC drivers
+#
+# CONFIG_SOC_BRCMSTB is not set
+# end of Broadcom SoC drivers
+
+#
+# NXP/Freescale QorIQ SoC drivers
+#
+# CONFIG_QUICC_ENGINE is not set
+# end of NXP/Freescale QorIQ SoC drivers
+
+#
+# i.MX SoC drivers
+#
+# end of i.MX SoC drivers
+
+#
+# Qualcomm SoC drivers
+#
+# end of Qualcomm SoC drivers
+
+# CONFIG_SOC_TI is not set
+
+#
+# Xilinx SoC drivers
+#
+# CONFIG_XILINX_VCU is not set
+# end of Xilinx SoC drivers
+# end of SOC (System On Chip) specific Drivers
+
+# CONFIG_PM_DEVFREQ is not set
+# CONFIG_EXTCON is not set
+# CONFIG_MEMORY is not set
+# CONFIG_IIO is not set
+# CONFIG_NTB is not set
+# CONFIG_VME_BUS is not set
+# CONFIG_PWM is not set
+
+#
+# IRQ chip support
+#
+CONFIG_IRQCHIP=y
+CONFIG_ARM_GIC=y
+CONFIG_ARM_GIC_MAX_NR=1
+CONFIG_ARM_GIC_V2M=y
+CONFIG_ARM_GIC_V3=y
+CONFIG_ARM_GIC_V3_ITS=y
+CONFIG_ARM_GIC_V3_ITS_PCI=y
+# CONFIG_AL_FIC is not set
+CONFIG_PARTITION_PERCPU=y
+# end of IRQ chip support
+
+# CONFIG_IPACK_BUS is not set
+# CONFIG_RESET_CONTROLLER is not set
+
+#
+# PHY Subsystem
+#
+# CONFIG_GENERIC_PHY is not set
+# CONFIG_PHY_XGENE is not set
+# CONFIG_BCM_KONA_USB2_PHY is not set
+# CONFIG_PHY_CADENCE_TORRENT is not set
+# CONFIG_PHY_CADENCE_DPHY is not set
+# CONFIG_PHY_FSL_IMX8MQ_USB is not set
+# CONFIG_PHY_MIXEL_MIPI_DPHY is not set
+# CONFIG_PHY_PXA_28NM_HSIC is not set
+# CONFIG_PHY_PXA_28NM_USB2 is not set
+# CONFIG_PHY_INTEL_EMMC is not set
+# end of PHY Subsystem
+
+# CONFIG_POWERCAP is not set
+# CONFIG_MCB is not set
+CONFIG_RAS=y
+
+#
+# Android
+#
+# CONFIG_ANDROID is not set
+# end of Android
+
+# CONFIG_LIBNVDIMM is not set
+# CONFIG_DAX is not set
+# CONFIG_NVMEM is not set
+
+#
+# HW tracing support
+#
+# CONFIG_STM is not set
+# CONFIG_INTEL_TH is not set
+# end of HW tracing support
+
+# CONFIG_FPGA is not set
+# CONFIG_FSI is not set
+# CONFIG_TEE is not set
+# CONFIG_SIOX is not set
+# CONFIG_SLIMBUS is not set
+# CONFIG_INTERCONNECT is not set
+# CONFIG_COUNTER is not set
+# CONFIG_MOST is not set
+# end of Device Drivers
+
+#
+# File systems
+#
+CONFIG_DCACHE_WORD_ACCESS=y
+# CONFIG_VALIDATE_FS_PARSER is not set
+CONFIG_FS_IOMAP=y
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+CONFIG_EXT4_FS=y
+CONFIG_EXT4_USE_FOR_EXT2=y
+# CONFIG_EXT4_FS_POSIX_ACL is not set
+# CONFIG_EXT4_FS_SECURITY is not set
+# CONFIG_EXT4_DEBUG is not set
+CONFIG_JBD2=y
+# CONFIG_JBD2_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+CONFIG_XFS_FS=y
+# CONFIG_XFS_QUOTA is not set
+# CONFIG_XFS_POSIX_ACL is not set
+# CONFIG_XFS_RT is not set
+# CONFIG_XFS_ONLINE_SCRUB is not set
+# CONFIG_XFS_WARN is not set
+# CONFIG_XFS_DEBUG is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+# CONFIG_F2FS_FS is not set
+# CONFIG_FS_DAX is not set
+CONFIG_EXPORTFS=y
+# CONFIG_EXPORTFS_BLOCK_OPS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_MANDATORY_FILE_LOCKING=y
+# CONFIG_FS_ENCRYPTION is not set
+# CONFIG_FS_VERITY is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_INOTIFY_USER is not set
+# CONFIG_FANOTIFY is not set
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_FUSE_FS is not set
+# CONFIG_OVERLAY_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+# end of Caches
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+# end of CD-ROM/DVD Filesystems
+
+#
+# DOS/FAT/EXFAT/NT Filesystems
+#
+CONFIG_FAT_FS=y
+# CONFIG_MSDOS_FS is not set
+CONFIG_VFAT_FS=y
+CONFIG_FAT_DEFAULT_CODEPAGE=437
+CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
+CONFIG_FAT_DEFAULT_UTF8=y
+CONFIG_EXFAT_FS=y
+CONFIG_EXFAT_DEFAULT_IOCHARSET="utf8"
+# CONFIG_NTFS_FS is not set
+# end of DOS/FAT/EXFAT/NT Filesystems
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+# CONFIG_PROC_CHILDREN is not set
+CONFIG_KERNFS=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_TMPFS_XATTR is not set
+CONFIG_HUGETLBFS=y
+CONFIG_HUGETLB_PAGE=y
+CONFIG_MEMFD_CREATE=y
+CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
+CONFIG_CONFIGFS_FS=y
+CONFIG_EFIVAR_FS=y
+# end of Pseudo filesystems
+
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ORANGEFS_FS is not set
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_QNX6FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_PSTORE=y
+CONFIG_PSTORE_DEFLATE_COMPRESS=y
+# CONFIG_PSTORE_LZO_COMPRESS is not set
+# CONFIG_PSTORE_LZ4_COMPRESS is not set
+# CONFIG_PSTORE_LZ4HC_COMPRESS is not set
+# CONFIG_PSTORE_842_COMPRESS is not set
+# CONFIG_PSTORE_ZSTD_COMPRESS is not set
+CONFIG_PSTORE_COMPRESS=y
+CONFIG_PSTORE_DEFLATE_COMPRESS_DEFAULT=y
+CONFIG_PSTORE_COMPRESS_DEFAULT="deflate"
+CONFIG_PSTORE_CONSOLE=y
+# CONFIG_PSTORE_PMSG is not set
+# CONFIG_PSTORE_RAM is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_EROFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NFS_FS is not set
+# CONFIG_CEPH_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_MAC_ROMAN is not set
+# CONFIG_NLS_MAC_CELTIC is not set
+# CONFIG_NLS_MAC_CENTEURO is not set
+# CONFIG_NLS_MAC_CROATIAN is not set
+# CONFIG_NLS_MAC_CYRILLIC is not set
+# CONFIG_NLS_MAC_GAELIC is not set
+# CONFIG_NLS_MAC_GREEK is not set
+# CONFIG_NLS_MAC_ICELAND is not set
+# CONFIG_NLS_MAC_INUIT is not set
+# CONFIG_NLS_MAC_ROMANIAN is not set
+# CONFIG_NLS_MAC_TURKISH is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+# CONFIG_UNICODE is not set
+CONFIG_IO_WQ=y
+# end of File systems
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY_DMESG_RESTRICT is not set
+CONFIG_SECURITY=y
+# CONFIG_SECURITYFS is not set
+CONFIG_SECURITY_NETWORK=y
+# CONFIG_SECURITY_PATH is not set
+CONFIG_HAVE_HARDENED_USERCOPY_ALLOCATOR=y
+# CONFIG_HARDENED_USERCOPY is not set
+# CONFIG_FORTIFY_SOURCE is not set
+# CONFIG_STATIC_USERMODEHELPER is not set
+# CONFIG_SECURITY_SMACK is not set
+# CONFIG_SECURITY_TOMOYO is not set
+# CONFIG_SECURITY_APPARMOR is not set
+# CONFIG_SECURITY_LOADPIN is not set
+# CONFIG_SECURITY_YAMA is not set
+# CONFIG_SECURITY_SAFESETID is not set
+# CONFIG_SECURITY_LOCKDOWN_LSM is not set
+CONFIG_INTEGRITY=y
+# CONFIG_INTEGRITY_SIGNATURE is not set
+# CONFIG_IMA is not set
+# CONFIG_EVM is not set
+CONFIG_DEFAULT_SECURITY_DAC=y
+CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity,bpf"
+
+#
+# Kernel hardening options
+#
+
+#
+# Memory initialization
+#
+CONFIG_INIT_STACK_NONE=y
+# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
+# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
+# end of Memory initialization
+# end of Kernel hardening options
+# end of Security options
+
+CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_SKCIPHER=y
+CONFIG_CRYPTO_SKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_RNG_DEFAULT=y
+CONFIG_CRYPTO_AKCIPHER2=y
+CONFIG_CRYPTO_KPP2=y
+CONFIG_CRYPTO_ACOMP2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+# CONFIG_CRYPTO_USER is not set
+CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
+CONFIG_CRYPTO_GF128MUL=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_NULL2=y
+# CONFIG_CRYPTO_PCRYPT is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+
+#
+# Public-key cryptography
+#
+# CONFIG_CRYPTO_RSA is not set
+# CONFIG_CRYPTO_DH is not set
+# CONFIG_CRYPTO_ECDH is not set
+# CONFIG_CRYPTO_ECRDSA is not set
+# CONFIG_CRYPTO_CURVE25519 is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+CONFIG_CRYPTO_GCM=y
+# CONFIG_CRYPTO_CHACHA20POLY1305 is not set
+# CONFIG_CRYPTO_AEGIS128 is not set
+CONFIG_CRYPTO_SEQIV=y
+# CONFIG_CRYPTO_ECHAINIV is not set
+
+#
+# Block modes
+#
+# CONFIG_CRYPTO_CBC is not set
+# CONFIG_CRYPTO_CFB is not set
+CONFIG_CRYPTO_CTR=y
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_OFB is not set
+# CONFIG_CRYPTO_PCBC is not set
+# CONFIG_CRYPTO_XTS is not set
+# CONFIG_CRYPTO_KEYWRAP is not set
+# CONFIG_CRYPTO_ADIANTUM is not set
+# CONFIG_CRYPTO_ESSIV is not set
+
+#
+# Hash modes
+#
+# CONFIG_CRYPTO_CMAC is not set
+CONFIG_CRYPTO_HMAC=y
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_VMAC is not set
+
+#
+# Digest
+#
+CONFIG_CRYPTO_CRC32C=y
+# CONFIG_CRYPTO_CRC32 is not set
+# CONFIG_CRYPTO_XXHASH is not set
+# CONFIG_CRYPTO_BLAKE2B is not set
+# CONFIG_CRYPTO_BLAKE2S is not set
+# CONFIG_CRYPTO_CRCT10DIF is not set
+CONFIG_CRYPTO_GHASH=y
+# CONFIG_CRYPTO_POLY1305 is not set
+# CONFIG_CRYPTO_MD4 is not set
+# CONFIG_CRYPTO_MD5 is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_RMD128 is not set
+# CONFIG_CRYPTO_RMD160 is not set
+# CONFIG_CRYPTO_RMD256 is not set
+# CONFIG_CRYPTO_RMD320 is not set
+# CONFIG_CRYPTO_SHA1 is not set
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_SHA3 is not set
+# CONFIG_CRYPTO_SM3 is not set
+# CONFIG_CRYPTO_STREEBOG is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
+CONFIG_CRYPTO_AES=y
+# CONFIG_CRYPTO_AES_TI is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_DES is not set
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_CHACHA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_SM4 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_LZO is not set
+# CONFIG_CRYPTO_842 is not set
+# CONFIG_CRYPTO_LZ4 is not set
+# CONFIG_CRYPTO_LZ4HC is not set
+# CONFIG_CRYPTO_ZSTD is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_DRBG_HMAC=y
+# CONFIG_CRYPTO_DRBG_HASH is not set
+# CONFIG_CRYPTO_DRBG_CTR is not set
+CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_JITTERENTROPY=y
+# CONFIG_CRYPTO_USER_API_HASH is not set
+# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
+# CONFIG_CRYPTO_USER_API_RNG is not set
+# CONFIG_CRYPTO_USER_API_AEAD is not set
+
+#
+# Crypto library routines
+#
+CONFIG_CRYPTO_LIB_AES=y
+# CONFIG_CRYPTO_LIB_BLAKE2S is not set
+# CONFIG_CRYPTO_LIB_CHACHA is not set
+# CONFIG_CRYPTO_LIB_CURVE25519 is not set
+CONFIG_CRYPTO_LIB_POLY1305_RSIZE=9
+# CONFIG_CRYPTO_LIB_POLY1305 is not set
+# CONFIG_CRYPTO_LIB_CHACHA20POLY1305 is not set
+CONFIG_CRYPTO_LIB_SHA256=y
+# CONFIG_CRYPTO_HW is not set
+
+#
+# Certificates for signature checking
+#
+# end of Certificates for signature checking
+
+#
+# Library routines
+#
+# CONFIG_PACKING is not set
+CONFIG_BITREVERSE=y
+CONFIG_HAVE_ARCH_BITREVERSE=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_NET_UTILS=y
+# CONFIG_CORDIC is not set
+CONFIG_RATIONAL=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
+CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
+# CONFIG_INDIRECT_PIO is not set
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC16=y
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC32_SELFTEST is not set
+CONFIG_CRC32_SLICEBY8=y
+# CONFIG_CRC32_SLICEBY4 is not set
+# CONFIG_CRC32_SARWATE is not set
+# CONFIG_CRC32_BIT is not set
+# CONFIG_CRC64 is not set
+# CONFIG_CRC4 is not set
+# CONFIG_CRC7 is not set
+CONFIG_LIBCRC32C=y
+# CONFIG_CRC8 is not set
+CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
+# CONFIG_RANDOM32_SELFTEST is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_XZ_DEC=y
+CONFIG_XZ_DEC_X86=y
+CONFIG_XZ_DEC_POWERPC=y
+CONFIG_XZ_DEC_IA64=y
+CONFIG_XZ_DEC_ARM=y
+CONFIG_XZ_DEC_ARMTHUMB=y
+CONFIG_XZ_DEC_SPARC=y
+CONFIG_XZ_DEC_BCJ=y
+# CONFIG_XZ_DEC_TEST is not set
+CONFIG_DECOMPRESS_XZ=y
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAS_DMA=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_DMA_DECLARE_COHERENT=y
+CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_SWIOTLB=y
+CONFIG_DMA_NONCOHERENT_MMAP=y
+CONFIG_DMA_REMAP=y
+CONFIG_DMA_DIRECT_REMAP=y
+# CONFIG_DMA_API_DEBUG is not set
+CONFIG_SGL_ALLOC=y
+CONFIG_CPU_RMAP=y
+CONFIG_DQL=y
+CONFIG_NLATTR=y
+CONFIG_IRQ_POLL=y
+CONFIG_LIBFDT=y
+CONFIG_UCS2_STRING=y
+CONFIG_HAVE_GENERIC_VDSO=y
+CONFIG_GENERIC_GETTIMEOFDAY=y
+CONFIG_FONT_SUPPORT=y
+CONFIG_FONT_8x16=y
+CONFIG_FONT_AUTOSELECT=y
+CONFIG_SG_POOL=y
+CONFIG_SBITMAP=y
+# CONFIG_STRING_SELFTEST is not set
+# end of Library routines
+
+#
+# Kernel hacking
+#
+
+#
+# printk and dmesg options
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_PRINTK_CALLER is not set
+CONFIG_CONSOLE_LOGLEVEL_DEFAULT=7
+CONFIG_CONSOLE_LOGLEVEL_QUIET=4
+CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
+# CONFIG_DYNAMIC_DEBUG is not set
+# CONFIG_SYMBOLIC_ERRNAME is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# end of printk and dmesg options
+
+#
+# Compile-time checks and compiler options
+#
+# CONFIG_ENABLE_MUST_CHECK is not set
+CONFIG_FRAME_WARN=2048
+# CONFIG_STRIP_ASM_SYMS is not set
+# CONFIG_HEADERS_INSTALL is not set
+# CONFIG_DEBUG_SECTION_MISMATCH is not set
+# CONFIG_SECTION_MISMATCH_WARN_ONLY is not set
+CONFIG_ARCH_WANT_FRAME_POINTERS=y
+CONFIG_FRAME_POINTER=y
+# end of Compile-time checks and compiler options
+
+#
+# Generic Kernel Debugging Instruments
+#
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_DEBUG_FS is not set
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
+# CONFIG_UBSAN is not set
+# end of Generic Kernel Debugging Instruments
+
+# CONFIG_DEBUG_KERNEL is not set
+
+#
+# Memory Debugging
+#
+# CONFIG_PAGE_EXTENSION is not set
+# CONFIG_PAGE_POISONING is not set
+# CONFIG_DEBUG_RODATA_TEST is not set
+CONFIG_GENERIC_PTDUMP=y
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
+CONFIG_DEBUG_MEMORY_INIT=y
+CONFIG_HAVE_ARCH_KASAN=y
+CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y
+CONFIG_CC_HAS_KASAN_GENERIC=y
+# CONFIG_KASAN is not set
+CONFIG_KASAN_STACK=1
+# end of Memory Debugging
+
+#
+# Debug Oops, Lockups and Hangs
+#
+# CONFIG_PANIC_ON_OOPS is not set
+CONFIG_PANIC_ON_OOPS_VALUE=0
+CONFIG_PANIC_TIMEOUT=0
+# CONFIG_TEST_LOCKUP is not set
+# end of Debug Oops, Lockups and Hangs
+
+#
+# Scheduler Debugging
+#
+# end of Scheduler Debugging
+
+# CONFIG_DEBUG_TIMEKEEPING is not set
+
+#
+# Lock Debugging (spinlocks, mutexes, etc...)
+#
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+# CONFIG_WW_MUTEX_SELFTEST is not set
+# end of Lock Debugging (spinlocks, mutexes, etc...)
+
+# CONFIG_STACKTRACE is not set
+# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
+CONFIG_HAVE_DEBUG_BUGVERBOSE=y
+
+#
+# Debug kernel data structures
+#
+# CONFIG_BUG_ON_DATA_CORRUPTION is not set
+# end of Debug kernel data structures
+
+#
+# RCU Debugging
+#
+CONFIG_RCU_CPU_STALL_TIMEOUT=21
+# end of RCU Debugging
+
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_TRACING_SUPPORT=y
+# CONFIG_FTRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_ARCH_HAS_DEVMEM_IS_ALLOWED=y
+
+#
+# arm64 Debugging
+#
+# CONFIG_PID_IN_CONTEXTIDR is not set
+# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set
+# CONFIG_DEBUG_WX is not set
+# CONFIG_CORESIGHT is not set
+# end of arm64 Debugging
+
+#
+# Kernel Testing and Coverage
+#
+# CONFIG_KUNIT is not set
+CONFIG_ARCH_HAS_KCOV=y
+CONFIG_CC_HAS_SANCOV_TRACE_PC=y
+# CONFIG_KCOV is not set
+# CONFIG_RUNTIME_TESTING_MENU is not set
+# CONFIG_MEMTEST is not set
+# end of Kernel Testing and Coverage
+# end of Kernel hacking
--
2.17.1






Re: [PATCH v2 0/4] Add extra pci roots support for Arm

Ni, Ray
 

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Jiahui Cen via groups.io
Sent: Friday, December 4, 2020 2:49 PM
To: devel@edk2.groups.io; lersek@...
Cc: Justen, Jordan L <jordan.l.justen@...>; ard.biesheuvel@...; leif@...; xieyingtai@...;
miaoyubo@...; xuxiaoyang2@...
Subject: Re: [edk2-devel] [PATCH v2 0/4] Add extra pci roots support for Arm

Hi Laszlo,

During the modification of this patch series, I got a confusing problem
that the EDK2's Alignment seems not fit with Linux on ARM.

EDK2, in CalculateResourceAperture, aligns the offset of child nodes
in descending order and uses the *Bridge's alignment* to align the
total length of Bridge.

However, Linux, in pbus_size_mem, would align the size of child nodes
and use *the half of max alignment of child nodes* to align the total
length of Bridge.

eg. A Root Bridge with Bus [d2]
-+-[0000:d2]---01.0-[d3]----01.0
where [d2:01.00] is a pcie-pci-bridge with BAR0 (mem, 64-bit, non-pref) [size=256]
[d3:01.00] is a PCI Device with BAR0 (mem, 64-bit, pref) [size=128K]
BAR4 (mem, 64-bit, pref) [size=64M]

In EDK2, the Resource Map would be:
PciBus: Resource Map for Root Bridge PciRoot(0xD2)
Type = Mem64; Base = 0x8004000000; Length = 0x4200000; Alignment = 0x3FFFFFF
Base = 0x8004000000; Length = 0x4100000; Alignment = 0x3FFFFFF; Owner = PPB [D2|01|00:**]; Type = PMem64
Base = 0x8008100000; Length = 0x100; Alignment = 0xFFF; Owner = PPB [D2|01|00:10]

PciBus: Resource Map for Bridge [D2|01|00]
Type = PMem64; Base = 0x8004000000; Length = 0x4100000; Alignment = 0x3FFFFFF
Base = 0x8004000000; Length = 0x4000000; Alignment = 0x3FFFFFF; Owner = PCI [D3|01|00:20]
Base = 0x8008000000; Length = 0x20000; Alignment = 0x1FFFF; Owner = PCI [D3|01|00:10]
Type = Mem64; Base = 0x8008100000; Length = 0x100; Alignment = 0xFFF

It shows that with EDK2's alignment [d2:01.00] only requires
a PMem64 resource range of 0x4100000.

However in Linux, [d2:01.00]'s BAR14 (Prefetchable Memory
Resource behind the Bridge) requires a PMem64 resource range
of 0x06000000, which comes from (0x4000000 + 0x20000) with
alignment=0x1FFFFFF the half of the max alignment 0x3FFFFFF.
How is 0x3FFFFFF calculated?
0x3FFFFFF = 0x8000000 / 2 - 1, and 0x8000000 is the minimum value that's
power of 2 and bigger than 0x6000000. Is my understanding correct?

I don't understand why this calculation method is chosen.
It seems a kernel bug to me.
I thought Linux doesn't handle the pci resource assignment but just use what was
assigned by firmware.


Furthermore, Linux Kernel will treat pcie-root-port as a hotplugable
bridge and try to require more resource. But EDK2 seems not support
hotplug padding for ARM?
Hotplug padding is supported through HotPlugInit protocol in edk2.


[PATCH V2] UefiCpuPkg/CpuFeature: reduce time complexty to calc CpuInfo.First

Ni, Ray
 

CpuInfo.First stores whether the current thread belongs to the first
package in the platform, first core in a package, first thread in a
core.

But the time complexity of original algorithm to calculate the
CpuInfo.First is O (n) * O (p) * O (c).
n: number of processors
p: number of packages
c: number of cores per package

The patch trades time with space by storing the first package, first
core per package, first thread per core in an array.
The time complexity becomes O (n).

Signed-off-by: Ray Ni <ray.ni@...>
Cc: Eric Dong <eric.dong@...>
Cc: Star Zeng <star.zeng@...>
Cc: Yun Lou <yun.lou@...>
Cc: Laszlo Ersek <lersek@...>
---
.../CpuFeaturesInitialize.c | 96 +++++++++----------
1 file changed, 47 insertions(+), 49 deletions(-)

diff --git a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitializ=
e.c b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
index d4a576385f..a1e972b1a2 100644
--- a/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
+++ b/UefiCpuPkg/Library/RegisterCpuFeaturesLib/CpuFeaturesInitialize.c
@@ -105,7 +105,10 @@ CpuInitDataInitialize (
EFI_CPU_PHYSICAL_LOCATION *Location;=0D
UINT32 PackageIndex;=0D
UINT32 CoreIndex;=0D
- UINT32 First;=0D
+ UINTN Pages;=0D
+ UINT32 FirstPackage;=0D
+ UINT32 *FirstCore;=0D
+ UINT32 *FirstThread;=0D
ACPI_CPU_DATA *AcpiCpuData;=0D
CPU_STATUS_INFORMATION *CpuStatus;=0D
UINT32 *ThreadCountPerPackage;=0D
@@ -236,74 +239,69 @@ CpuInitDataInitialize (
=0D
//=0D
// Initialize CpuFeaturesData->InitOrder[].CpuInfo.First=0D
+ // Use AllocatePages () instead of AllocatePool () because pool cannot b=
e freed in PEI phase but page can.=0D
//=0D
+ Pages =3D EFI_SIZE_TO_PAGES (CpuStatus->PackageCount * sizeof (UINT3=
2) + CpuStatus->PackageCount * CpuStatus->MaxCoreCount * sizeof (UINT32));=
=0D
+ FirstCore =3D AllocatePages (Pages);=0D
+ ASSERT (FirstCore !=3D NULL);=0D
+ FirstThread =3D FirstCore + CpuStatus->PackageCount;=0D
=0D
//=0D
- // Set First.Package for each thread belonging to the first package.=0D
+ // Set FirstPackage, FirstCore[], FirstThread[] to maximum package ID, c=
ore ID, thread ID.=0D
//=0D
- First =3D MAX_UINT32;=0D
+ FirstPackage =3D MAX_UINT32;=0D
+ SetMem32 (FirstCore, CpuStatus->PackageCount * sizeof (UINT32), MAX_UI=
NT32);=0D
+ SetMem32 (FirstThread, CpuStatus->PackageCount * CpuStatus->MaxCoreCount=
* sizeof (UINT32), MAX_UINT32);=0D
+=0D
for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorNum=
ber++) {=0D
Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Proc=
essorInfo.Location;=0D
- First =3D MIN (Location->Package, First);=0D
+=0D
+ //=0D
+ // Save the minimum package ID in the platform.=0D
+ //=0D
+ FirstPackage =3D MIN (Location->Package, FirstPackage)=
;=0D
+ =0D
+ //=0D
+ // Save the minimum core ID per package.=0D
+ //=0D
+ FirstCore[Location->Package] =3D MIN (Location->Core, FirstCore[Locati=
on->Package]);=0D
+ =0D
+ //=0D
+ // Save the minimum thread ID per core.=0D
+ //=0D
+ FirstThread[Location->Package * CpuStatus->MaxCoreCount + Location->Co=
re] =3D MIN (=0D
+ Location->Thread,=0D
+ FirstThread[Location->Package * CpuStatus->MaxCoreCount + Location->=
Core]=0D
+ );=0D
}=0D
+=0D
+ //=0D
+ // Update the First field.=0D
+ //=0D
for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorNum=
ber++) {=0D
Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Proc=
essorInfo.Location;=0D
- if (Location->Package =3D=3D First) {=0D
+=0D
+ if (Location->Package =3D=3D FirstPackage) {=0D
CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Package =
=3D 1;=0D
}=0D
- }=0D
=0D
- //=0D
- // Set First.Die/Tile/Module for each thread assuming:=0D
- // single Die under each package, single Tile under each Die, single Mo=
dule under each Tile=0D
- //=0D
- for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorNum=
ber++) {=0D
+ //=0D
+ // Set First.Die/Tile/Module for each thread assuming:=0D
+ // single Die under each package, single Tile under each Die, single =
Module under each Tile=0D
+ //=0D
CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Die =3D 1;=0D
CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Tile =3D 1;=
=0D
CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Module =3D 1=
;=0D
- }=0D
=0D
- for (PackageIndex =3D 0; PackageIndex < CpuStatus->PackageCount; Package=
Index++) {=0D
- //=0D
- // Set First.Core for each thread in the first core of each package.=0D
- //=0D
- First =3D MAX_UINT32;=0D
- for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorN=
umber++) {=0D
- Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Pr=
ocessorInfo.Location;=0D
- if (Location->Package =3D=3D PackageIndex) {=0D
- First =3D MIN (Location->Core, First);=0D
- }=0D
+ if (Location->Core =3D=3D FirstCore[Location->Package]) {=0D
+ CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Core =3D 1=
;=0D
}=0D
-=0D
- for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; ProcessorN=
umber++) {=0D
- Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.Pr=
ocessorInfo.Location;=0D
- if (Location->Package =3D=3D PackageIndex && Location->Core =3D=3D F=
irst) {=0D
- CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Core =3D=
1;=0D
- }=0D
+ if (Location->Thread =3D=3D FirstThread[Location->Package * CpuStatus-=
MaxCoreCount + Location->Core]) {=0D
+ CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Thread =3D=
1;=0D
}=0D
}=0D
=0D
- for (PackageIndex =3D 0; PackageIndex < CpuStatus->PackageCount; Package=
Index++) {=0D
- for (CoreIndex =3D 0; CoreIndex < CpuStatus->MaxCoreCount; CoreIndex++=
) {=0D
- //=0D
- // Set First.Thread for the first thread of each core.=0D
- //=0D
- First =3D MAX_UINT32;=0D
- for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; Processo=
rNumber++) {=0D
- Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.=
ProcessorInfo.Location;=0D
- if (Location->Package =3D=3D PackageIndex && Location->Core =3D=3D=
CoreIndex) {=0D
- First =3D MIN (Location->Thread, First);=0D
- }=0D
- }=0D
-=0D
- for (ProcessorNumber =3D 0; ProcessorNumber < NumberOfCpus; Processo=
rNumber++) {=0D
- Location =3D &CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.=
ProcessorInfo.Location;=0D
- if (Location->Package =3D=3D PackageIndex && Location->Core =3D=3D=
CoreIndex && Location->Thread =3D=3D First) {=0D
- CpuFeaturesData->InitOrder[ProcessorNumber].CpuInfo.First.Thread=
=3D 1;=0D
- }=0D
- }=0D
- }=0D
- }=0D
+ FreePages (FirstCore, Pages);=0D
}=0D
=0D
/**=0D
--=20
2.27.0.windows.1


[PATCH v2 1/1] ArmPlatformPkg: Fix Ecc error 8005

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@...>

This patch fixes the following Ecc reported error:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Indeed, according to the EDK II C Coding Standards
Specification, s5.6.2.2 "Enumerated Types" and
s4.3.4 Function and Data Names, elements of an
enumerated type shoud be a mixed upper- and
lower-case text.

A max element is also added, as adviced by
s5.6.2.2.3 of the same document.

Reference:
https://edk2-docs.gitbook.io/edk-ii-c-coding-standards-specification/

Signed-off-by: Pierre Gondois <Pierre.Gondois@...>
---
The changes can be seen at: https://github.com/PierreARM/edk2/tree/pg/1537_Ecc_ArmPlatformPkg_v2

Notes:
v2:
-Rename enum ELcd... to Lcd... [asked by Ard]

.../LcdGraphicsOutputBlt.c | 80 +++++++++----------
.../LcdGraphicsOutputDxe.c | 16 ++--
.../Include/Library/LcdPlatformLib.h | 19 ++---
3 files changed, 58 insertions(+), 57 deletions(-)

diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
index 07d2cb0d5dec..f91f4706ecbc 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c
@@ -61,7 +61,7 @@ VideoCopyNoHorizontalOverlap (

switch (BitsPerPixel) {

- case LCD_BITS_PER_PIXEL_24:
+ case LcdBitsPerPixel_24:

WidthInBytes = Width * 4;

@@ -79,9 +79,9 @@ VideoCopyNoHorizontalOverlap (
}
break;

- case LCD_BITS_PER_PIXEL_16_555:
- case LCD_BITS_PER_PIXEL_16_565:
- case LCD_BITS_PER_PIXEL_12_444:
+ case LcdBitsPerPixel_16_555:
+ case LcdBitsPerPixel_16_565:
+ case LcdBitsPerPixel_12_444:

WidthInBytes = Width * 2;

@@ -99,10 +99,10 @@ VideoCopyNoHorizontalOverlap (
}
break;

- case LCD_BITS_PER_PIXEL_8:
- case LCD_BITS_PER_PIXEL_4:
- case LCD_BITS_PER_PIXEL_2:
- case LCD_BITS_PER_PIXEL_1:
+ case LcdBitsPerPixel_8:
+ case LcdBitsPerPixel_4:
+ case LcdBitsPerPixel_2:
+ case LcdBitsPerPixel_1:
default:
// Can't handle this case
DEBUG((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
@@ -149,7 +149,7 @@ VideoCopyHorizontalOverlap (

switch (BitsPerPixel) {

- case LCD_BITS_PER_PIXEL_24:
+ case LcdBitsPerPixel_24:
// Allocate a temporary buffer

PixelBuffer32bit = (UINT32 *) AllocatePool((Height * Width) * sizeof(UINT32));
@@ -191,9 +191,9 @@ VideoCopyHorizontalOverlap (
break;


- case LCD_BITS_PER_PIXEL_16_555:
- case LCD_BITS_PER_PIXEL_16_565:
- case LCD_BITS_PER_PIXEL_12_444:
+ case LcdBitsPerPixel_16_555:
+ case LcdBitsPerPixel_16_565:
+ case LcdBitsPerPixel_12_444:
// Allocate a temporary buffer
PixelBuffer16bit = (UINT16 *) AllocatePool((Height * Width) * sizeof(UINT16));

@@ -236,10 +236,10 @@ VideoCopyHorizontalOverlap (
break;


- case LCD_BITS_PER_PIXEL_8:
- case LCD_BITS_PER_PIXEL_4:
- case LCD_BITS_PER_PIXEL_2:
- case LCD_BITS_PER_PIXEL_1:
+ case LcdBitsPerPixel_8:
+ case LcdBitsPerPixel_4:
+ case LcdBitsPerPixel_2:
+ case LcdBitsPerPixel_1:
default:
// Can't handle this case
DEBUG((DEBUG_ERROR, "ArmVeGraphics_Blt: EfiBltVideoToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
@@ -287,7 +287,7 @@ BltVideoFill (
LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);

switch (BitsPerPixel) {
- case LCD_BITS_PER_PIXEL_24:
+ case LcdBitsPerPixel_24:
WidthInBytes = Width * 4;

// Copy the SourcePixel into every pixel inside the target rectangle
@@ -303,7 +303,7 @@ BltVideoFill (
}
break;

- case LCD_BITS_PER_PIXEL_16_555:
+ case LcdBitsPerPixel_16_555:
// Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel
Pixel16bit = (UINT16) (
( (EfiSourcePixel->Red << 7) & PixelInformation->RedMask )
@@ -330,7 +330,7 @@ BltVideoFill (
}
break;

- case LCD_BITS_PER_PIXEL_16_565:
+ case LcdBitsPerPixel_16_565:
// Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel
Pixel16bit = (UINT16) (
( (EfiSourcePixel->Red << 8) & PixelInformation->RedMask )
@@ -356,7 +356,7 @@ BltVideoFill (
}
break;

- case LCD_BITS_PER_PIXEL_12_444:
+ case LcdBitsPerPixel_12_444:
// Convert the EFI pixel at the start of the BltBuffer(0,0) into a video display pixel
Pixel16bit = (UINT16) (
( (EfiSourcePixel->Red >> 4) & PixelInformation->RedMask )
@@ -382,10 +382,10 @@ BltVideoFill (
}
break;

- case LCD_BITS_PER_PIXEL_8:
- case LCD_BITS_PER_PIXEL_4:
- case LCD_BITS_PER_PIXEL_2:
- case LCD_BITS_PER_PIXEL_1:
+ case LcdBitsPerPixel_8:
+ case LcdBitsPerPixel_4:
+ case LcdBitsPerPixel_2:
+ case LcdBitsPerPixel_1:
default:
// Can't handle this case
DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoFill: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
@@ -443,7 +443,7 @@ BltVideoToBltBuffer (
LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);

switch (BitsPerPixel) {
- case LCD_BITS_PER_PIXEL_24:
+ case LcdBitsPerPixel_24:
WidthInBytes = Width * 4;

// Access each line inside the Video Memory
@@ -460,7 +460,7 @@ BltVideoToBltBuffer (
}
break;

- case LCD_BITS_PER_PIXEL_16_555:
+ case LcdBitsPerPixel_16_555:
// Access each pixel inside the Video Memory
for (SourceLine = SourceY, DestinationLine = DestinationY;
SourceLine < SourceY + Height;
@@ -487,7 +487,7 @@ BltVideoToBltBuffer (
}
break;

- case LCD_BITS_PER_PIXEL_16_565:
+ case LcdBitsPerPixel_16_565:
// Access each pixel inside the Video Memory
for (SourceLine = SourceY, DestinationLine = DestinationY;
SourceLine < SourceY + Height;
@@ -515,7 +515,7 @@ BltVideoToBltBuffer (
}
break;

- case LCD_BITS_PER_PIXEL_12_444:
+ case LcdBitsPerPixel_12_444:
// Access each pixel inside the Video Memory
for (SourceLine = SourceY, DestinationLine = DestinationY;
SourceLine < SourceY + Height;
@@ -542,10 +542,10 @@ BltVideoToBltBuffer (
}
break;

- case LCD_BITS_PER_PIXEL_8:
- case LCD_BITS_PER_PIXEL_4:
- case LCD_BITS_PER_PIXEL_2:
- case LCD_BITS_PER_PIXEL_1:
+ case LcdBitsPerPixel_8:
+ case LcdBitsPerPixel_4:
+ case LcdBitsPerPixel_2:
+ case LcdBitsPerPixel_1:
default:
// Can't handle this case
DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltVideoToBltBuffer: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
@@ -601,7 +601,7 @@ BltBufferToVideo (
LcdPlatformGetBpp (This->Mode->Mode,&BitsPerPixel);

switch (BitsPerPixel) {
- case LCD_BITS_PER_PIXEL_24:
+ case LcdBitsPerPixel_24:
WidthInBytes = Width * 4;

// Access each pixel inside the BltBuffer Memory
@@ -618,7 +618,7 @@ BltBufferToVideo (
}
break;

- case LCD_BITS_PER_PIXEL_16_555:
+ case LcdBitsPerPixel_16_555:
// Access each pixel inside the BltBuffer Memory
for (SourceLine = SourceY, DestinationLine = DestinationY;
SourceLine < SourceY + Height;
@@ -645,7 +645,7 @@ BltBufferToVideo (
}
break;

- case LCD_BITS_PER_PIXEL_16_565:
+ case LcdBitsPerPixel_16_565:
// Access each pixel inside the BltBuffer Memory
for (SourceLine = SourceY, DestinationLine = DestinationY;
SourceLine < SourceY + Height;
@@ -672,7 +672,7 @@ BltBufferToVideo (
}
break;

- case LCD_BITS_PER_PIXEL_12_444:
+ case LcdBitsPerPixel_12_444:
// Access each pixel inside the BltBuffer Memory
for (SourceLine = SourceY, DestinationLine = DestinationY;
SourceLine < SourceY + Height;
@@ -699,10 +699,10 @@ BltBufferToVideo (
}
break;

- case LCD_BITS_PER_PIXEL_8:
- case LCD_BITS_PER_PIXEL_4:
- case LCD_BITS_PER_PIXEL_2:
- case LCD_BITS_PER_PIXEL_1:
+ case LcdBitsPerPixel_8:
+ case LcdBitsPerPixel_4:
+ case LcdBitsPerPixel_2:
+ case LcdBitsPerPixel_1:
default:
// Can't handle this case
DEBUG((DEBUG_ERROR, "LcdGraphicsBlt: EfiBltBufferToVideo: INVALID Number of Bits Per Pixel: %d\n", BitsPerPixel));
diff --git a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
index bfd03d8f8425..ba83ecf700d6 100644
--- a/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
+++ b/ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
@@ -374,18 +374,18 @@ GetBytesPerPixel (
)
{
switch (Bpp) {
- case LCD_BITS_PER_PIXEL_24:
+ case LcdBitsPerPixel_24:
return 4;

- case LCD_BITS_PER_PIXEL_16_565:
- case LCD_BITS_PER_PIXEL_16_555:
- case LCD_BITS_PER_PIXEL_12_444:
+ case LcdBitsPerPixel_16_565:
+ case LcdBitsPerPixel_16_555:
+ case LcdBitsPerPixel_12_444:
return 2;

- case LCD_BITS_PER_PIXEL_8:
- case LCD_BITS_PER_PIXEL_4:
- case LCD_BITS_PER_PIXEL_2:
- case LCD_BITS_PER_PIXEL_1:
+ case LcdBitsPerPixel_8:
+ case LcdBitsPerPixel_4:
+ case LcdBitsPerPixel_2:
+ case LcdBitsPerPixel_1:
return 1;

default:
diff --git a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
index ba24487073bb..7d67e848f3a0 100644
--- a/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
+++ b/ArmPlatformPkg/Include/Library/LcdPlatformLib.h
@@ -1,6 +1,6 @@
/** @file

- Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2011-2020, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -197,14 +197,15 @@
Register
**/
typedef enum {
- LCD_BITS_PER_PIXEL_1 = 0,
- LCD_BITS_PER_PIXEL_2,
- LCD_BITS_PER_PIXEL_4,
- LCD_BITS_PER_PIXEL_8,
- LCD_BITS_PER_PIXEL_16_555,
- LCD_BITS_PER_PIXEL_24,
- LCD_BITS_PER_PIXEL_16_565,
- LCD_BITS_PER_PIXEL_12_444
+ LcdBitsPerPixel_1 = 0,
+ LcdBitsPerPixel_2,
+ LcdBitsPerPixel_4,
+ LcdBitsPerPixel_8,
+ LcdBitsPerPixel_16_555,
+ LcdBitsPerPixel_24,
+ LcdBitsPerPixel_16_565,
+ LcdBitsPerPixel_12_444,
+ LcdBitsPerPixel_Max
} LCD_BPP;

// Display timing settings.
--
2.17.1


Re: [PATCH] UefiCpuPkg/CpuFeature: reduce time complexty to calc CpuInfo.First

Ni, Ray
 

+ FirstPackage = MAX_UINT32;

+ for (PackageIndex = 0; PackageIndex < CpuStatus->PackageCount;
PackageIndex++) {

+ FirstCore[PackageIndex] = MAX_UINT32;

+ for (CoreIndex = 0; CoreIndex < CpuStatus->MaxCoreCount; CoreIndex++)
{

+ FirstThread[PackageIndex * CpuStatus->MaxCoreCount + CoreIndex] =
MAX_UINT32;

+ }

+ }
Could this code block be replaced by a SetMem32(xxx, xxx, MAX_UINT32) call?
Yes. it could. I thought the for loop is more readable. Maybe it doesn't help a lot
on the code readability. Let me send an updated version to use SetMem32.


[PATCH v2 edk2-platforms 2/2] Platform/ARM: Fix Ecc error 8005

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@...>

Following the Ecc reported error in the edk2 repository,
an enum and its elements have been renamed in:
ArmPlatformPkg/Include/Library/LcdPlatformLib.h

The Ecc error reported in edk2 is:
Variable name does not follow the rules:
1. First character should be upper case
2. Must contain lower case characters
3. No white space characters
4. Global variable name must start with a 'g'

Indeed, according to the EDK II C Coding Standards
Specification, s5.6.2.2 "Enumerated Types" and
s4.3.4 Function and Data Names, elements of an
enumerated type "shoud be a mixed upper- and
lower-case text".

Signed-off-by: Pierre Gondois <Pierre.Gondois@...>
---
The changes can be seen at: https://github.com/PierreARM/edk2-platforms/tree/pg/1537_Ecc_ArmPlatformPkg_v2

Notes:
v2:
-Rename enum ELcd... to Lcd... [asked by Ard]

.../Library/HdLcdArmJunoLib/HdLcdArmJuno.c | 4 +--
.../Library/HdLcdArmSgiLib/HdLcdArmSgi.c | 4 +--
.../Library/ArmMaliDpLib/ArmMaliDpLib.c | 4 +--
.../HdLcdArmVExpressLib/HdLcdArmVExpress.c | 4 +--
.../PL111LcdArmVExpress.c | 34 +++++++++----------
5 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c b/Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c
index 4b961b7a9f7f..30558878f068 100644
--- a/Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c
+++ b/Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c
@@ -1,6 +1,6 @@
/** @file

- Copyright (c) 2013-2018, ARM Ltd. All rights reserved.
+ Copyright (c) 2013 - 2020, Arm Limited. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -543,7 +543,7 @@ LcdPlatformGetBpp (

ASSERT (Bpp != NULL);

- *Bpp = LCD_BITS_PER_PIXEL_24;
+ *Bpp = LcdBitsPerPixel_24;

return EFI_SUCCESS;
}
diff --git a/Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c b/Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c
index 6f747d2545db..561f3f6747e8 100644
--- a/Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c
+++ b/Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c
@@ -1,6 +1,6 @@
/** @file
*
-* Copyright (c) 2018, ARM Limited. All rights reserved.
+* Copyright (c) 2018 - 2020, Arm Limited. All rights reserved.<BR>
*
* SPDX-License-Identifier: BSD-2-Clause-Patent
*
@@ -245,7 +245,7 @@ LcdPlatformGetBpp (

ASSERT (Bpp != NULL);

- *Bpp = LCD_BITS_PER_PIXEL_24;
+ *Bpp = LcdBitsPerPixel_24;

return EFI_SUCCESS;
}
diff --git a/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c b/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c
index aa55bc2e5bee..a62dce1331d9 100644
--- a/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c
+++ b/Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c
@@ -2,7 +2,7 @@

The file contains Arm Mali DP platform specific implementation.

- Copyright (c) 2017-2018, Arm Limited. All rights reserved.
+ Copyright (c) 2017 - 2020, Arm Limited. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -375,7 +375,7 @@ LcdPlatformGetBpp (
return EFI_INVALID_PARAMETER;
}

- *Bpp = LCD_BITS_PER_PIXEL_24;
+ *Bpp = LcdBitsPerPixel_24;

return EFI_SUCCESS;
}
diff --git a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
index c4b163d35f18..919ef30019ec 100644
--- a/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
@@ -1,6 +1,6 @@
/** @file

- Copyright (c) 2012-2018, ARM Ltd. All rights reserved.
+ Copyright (c) 2012 - 2020, Arm Limited. All rights reserved.<BR>

SPDX-License-Identifier: BSD-2-Clause-Patent

@@ -361,7 +361,7 @@ LcdPlatformGetBpp (
return EFI_INVALID_PARAMETER;
}

- *Bpp = LCD_BITS_PER_PIXEL_24;
+ *Bpp = LcdBitsPerPixel_24;

return EFI_SUCCESS;
}
diff --git a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
index b7396a87bd05..87b82e9f97dc 100644
--- a/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
+++ b/Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
@@ -1,6 +1,6 @@
/** @file

- Copyright (c) 2011-2018, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2011 - 2020, Arm Limited. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent

**/
@@ -33,97 +33,97 @@ typedef struct {
**/
STATIC DISPLAY_MODE mDisplayModes[] = {
{ // Mode 0 : VGA : 640 x 480 x 24 bpp
- VGA, LCD_BITS_PER_PIXEL_24,
+ VGA, LcdBitsPerPixel_24,
VGA_OSC_FREQUENCY,
{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
},
{ // Mode 1 : SVGA : 800 x 600 x 24 bpp
- SVGA, LCD_BITS_PER_PIXEL_24,
+ SVGA, LcdBitsPerPixel_24,
SVGA_OSC_FREQUENCY,
{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
},
{ // Mode 2 : XGA : 1024 x 768 x 24 bpp
- XGA, LCD_BITS_PER_PIXEL_24,
+ XGA, LcdBitsPerPixel_24,
XGA_OSC_FREQUENCY,
{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
},
{ // Mode 3 : SXGA : 1280 x 1024 x 24 bpp
- SXGA, LCD_BITS_PER_PIXEL_24,
+ SXGA, LcdBitsPerPixel_24,
(SXGA_OSC_FREQUENCY/2),
{SXGA_H_RES_PIXELS, SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH},
{SXGA_V_RES_PIXELS, SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH}
},
{ // Mode 4 : UXGA : 1600 x 1200 x 24 bpp
- UXGA, LCD_BITS_PER_PIXEL_24,
+ UXGA, LcdBitsPerPixel_24,
(UXGA_OSC_FREQUENCY/2),
{UXGA_H_RES_PIXELS, UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH},
{UXGA_V_RES_PIXELS, UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH}
},
{ // Mode 5 : HD : 1920 x 1080 x 24 bpp
- HD, LCD_BITS_PER_PIXEL_24,
+ HD, LcdBitsPerPixel_24,
(HD_OSC_FREQUENCY/2),
{HD_H_RES_PIXELS, HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH},
{HD_V_RES_PIXELS, HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH}
},
{ // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode)
- VGA, LCD_BITS_PER_PIXEL_16_565,
+ VGA, LcdBitsPerPixel_16_565,
VGA_OSC_FREQUENCY,
{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
},
{ // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode)
- SVGA, LCD_BITS_PER_PIXEL_16_565,
+ SVGA, LcdBitsPerPixel_16_565,
SVGA_OSC_FREQUENCY,
{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
},
{ // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode)
- XGA, LCD_BITS_PER_PIXEL_16_565,
+ XGA, LcdBitsPerPixel_16_565,
XGA_OSC_FREQUENCY,
{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
},
{ // Mode 9 : VGA : 640 x 480 x 15 bpp
- VGA, LCD_BITS_PER_PIXEL_16_555,
+ VGA, LcdBitsPerPixel_16_555,
VGA_OSC_FREQUENCY,
{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
},
{ // Mode 10 : SVGA : 800 x 600 x 15 bpp
- SVGA, LCD_BITS_PER_PIXEL_16_555,
+ SVGA, LcdBitsPerPixel_16_555,
SVGA_OSC_FREQUENCY,
{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
},
{ // Mode 11 : XGA : 1024 x 768 x 15 bpp
- XGA, LCD_BITS_PER_PIXEL_16_555,
+ XGA, LcdBitsPerPixel_16_555,
XGA_OSC_FREQUENCY,
{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
},
{ // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings
- XGA, LCD_BITS_PER_PIXEL_16_555,
+ XGA, LcdBitsPerPixel_16_555,
63500000,
{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
},
{ // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode)
- VGA, LCD_BITS_PER_PIXEL_12_444,
+ VGA, LcdBitsPerPixel_12_444,
VGA_OSC_FREQUENCY,
{VGA_H_RES_PIXELS, VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH},
{VGA_V_RES_PIXELS, VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH}
},
{ // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode)
- SVGA, LCD_BITS_PER_PIXEL_12_444,
+ SVGA, LcdBitsPerPixel_12_444,
SVGA_OSC_FREQUENCY,
{SVGA_H_RES_PIXELS, SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH},
{SVGA_V_RES_PIXELS, SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH}
},
{ // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode)
- XGA, LCD_BITS_PER_PIXEL_12_444,
+ XGA, LcdBitsPerPixel_12_444,
XGA_OSC_FREQUENCY,
{XGA_H_RES_PIXELS, XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH},
{XGA_V_RES_PIXELS, XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH}
--
2.17.1


[PATCH v2 edk2-platforms 1/2] Platform/ARM/VExpressPkg: Remove LcdPlatformLib.h

PierreGondois
 

From: Pierre Gondois <Pierre.Gondois@...>

LcdPlatformLib.h was introduced by 8ad58788b5c3 as a duplicate
of the edk2 original file at:
edk2/ArmPlatformPkg/Include/Library/LcdPlatformLib.h

The list of files in edk2-plarforms currently using LcdPlatformLib.h
is the following:
Platform/ARM/SgiPkg/Library/HdLcdArmSgiLib/HdLcdArmSgi.c:11
Platform/ARM/VExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
Platform/ARM/VExpressPkg/Library/HdLcdArmVExpressLib/HdLcdArmVExpress.c
Platform/ARM/VExpressPkg/Library/ArmMaliDpLib/ArmMaliDpLib.c
Platform/ARM/JunoPkg/Library/HdLcdArmJunoLib/HdLcdArmJuno.c

They are all using the SCAN_TIMINGS structure. However, this structure
is only defined in the original file in the edk2 repository. Thus,
the edk2-platforms is un-used and can be safely removed.

The build system prefers the edk2 version of the file over its
edk2-platforms copy due to the .dec files order in
each .inf file where the the library is used.

Signed-off-by: Pierre Gondois <Pierre.Gondois@...>
---
The changes can be seen at: https://github.com/PierreARM/edk2-platforms/tree/pg/1537_Ecc_ArmPlatformPkg_v2

Notes:
v2:
-Remove reference to LcdPlatformLib.h in .dec file
[asked by Ard]

Platform/ARM/VExpressPkg/ArmVExpressPkg.dec | 3 +-
.../Include/Library/LcdPlatformLib.h | 215 ------------------
2 files changed, 1 insertion(+), 217 deletions(-)
delete mode 100644 Platform/ARM/VExpressPkg/Include/Library/LcdPlatformLib.h

diff --git a/Platform/ARM/VExpressPkg/ArmVExpressPkg.dec b/Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
index f78c5ce7c764..848510bff17e 100644
--- a/Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
+++ b/Platform/ARM/VExpressPkg/ArmVExpressPkg.dec
@@ -1,7 +1,7 @@
#/** @file
# Arm Versatile Express package.
#
-# Copyright (c) 2012-2018, ARM Limited. All rights reserved.
+# Copyright (c) 2012-2020, Arm Limited. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -27,7 +27,6 @@ [Includes.common]

[LibraryClasses]
ArmPlatformSysConfigLib|Include/Library/ArmPlatformSysConfigLib.h
- LcdPlatformLib|Include/Library/LcdPlatformLib.h

[Guids.common]
gArmVExpressTokenSpaceGuid = { 0x9c0aaed4, 0x74c5, 0x4043, { 0xb4, 0x17, 0xa3, 0x22, 0x38, 0x14, 0xce, 0x76 } }
diff --git a/Platform/ARM/VExpressPkg/Include/Library/LcdPlatformLib.h b/Platform/ARM/VExpressPkg/Include/Library/LcdPlatformLib.h
deleted file mode 100644
index 5591147313ac..000000000000
--- a/Platform/ARM/VExpressPkg/Include/Library/LcdPlatformLib.h
+++ /dev/null
@@ -1,215 +0,0 @@
-/** @file
-
- Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
- SPDX-License-Identifier: BSD-2-Clause-Patent
-
- **/
-
-#ifndef __LCDPLATFORMLIB_H
-#define __LCDPLATFORMLIB_H
-
-#include <Protocol/GraphicsOutput.h>
-
-#define LCD_VRAM_SIZE SIZE_8MB
-
-//
-// Modes definitions
-//
-#define VGA 0
-#define SVGA 1
-#define XGA 2
-#define SXGA 3
-#define WSXGA 4
-#define UXGA 5
-#define HD 6
-
-//
-// VGA Mode: 640 x 480
-//
-#define VGA_H_RES_PIXELS 640
-#define VGA_V_RES_PIXELS 480
-#define VGA_OSC_FREQUENCY 23750000 /* 0x016A6570 */
-
-#define VGA_H_SYNC ( 80 - 1)
-#define VGA_H_FRONT_PORCH ( 16 - 1)
-#define VGA_H_BACK_PORCH ( 64 - 1)
-
-#define VGA_V_SYNC ( 4 - 1)
-#define VGA_V_FRONT_PORCH ( 3 - 1)
-#define VGA_V_BACK_PORCH ( 13 - 1)
-
-//
-// SVGA Mode: 800 x 600
-//
-#define SVGA_H_RES_PIXELS 800
-#define SVGA_V_RES_PIXELS 600
-#define SVGA_OSC_FREQUENCY 38250000 /* 0x0247A610 */
-
-#define SVGA_H_SYNC ( 80 - 1)
-#define SVGA_H_FRONT_PORCH ( 32 - 1)
-#define SVGA_H_BACK_PORCH (112 - 1)
-
-#define SVGA_V_SYNC ( 4 - 1)
-#define SVGA_V_FRONT_PORCH ( 3 - 1)
-#define SVGA_V_BACK_PORCH ( 17 - 1)
-
-//
-// XGA Mode: 1024 x 768
-//
-#define XGA_H_RES_PIXELS 1024
-#define XGA_V_RES_PIXELS 768
-#define XGA_OSC_FREQUENCY 63500000 /* 0x03C8EEE0 */
-
-#define XGA_H_SYNC (104 - 1)
-#define XGA_H_FRONT_PORCH ( 48 - 1)
-#define XGA_H_BACK_PORCH (152 - 1)
-
-#define XGA_V_SYNC ( 4 - 1)
-#define XGA_V_FRONT_PORCH ( 3 - 1)
-#define XGA_V_BACK_PORCH ( 23 - 1)
-
-//
-// SXGA Mode: 1280 x 1024
-//
-#define SXGA_H_RES_PIXELS 1280
-#define SXGA_V_RES_PIXELS 1024
-#define SXGA_OSC_FREQUENCY 109000000 /* 0x067F3540 */
-
-#define SXGA_H_SYNC (136 - 1)
-#define SXGA_H_FRONT_PORCH ( 80 - 1)
-#define SXGA_H_BACK_PORCH (216 - 1)
-
-#define SXGA_V_SYNC ( 7 - 1)
-#define SXGA_V_FRONT_PORCH ( 3 - 1)
-#define SXGA_V_BACK_PORCH ( 29 - 1)
-
-//
-// WSXGA+ Mode: 1680 x 1050
-//
-#define WSXGA_H_RES_PIXELS 1680
-#define WSXGA_V_RES_PIXELS 1050
-#define WSXGA_OSC_FREQUENCY 147000000 /* 0x08C30AC0 */
-
-#define WSXGA_H_SYNC (170 - 1)
-#define WSXGA_H_FRONT_PORCH (104 - 1)
-#define WSXGA_H_BACK_PORCH (274 - 1)
-
-#define WSXGA_V_SYNC ( 5 - 1)
-#define WSXGA_V_FRONT_PORCH ( 4 - 1)
-#define WSXGA_V_BACK_PORCH ( 41 - 1)
-
-//
-// UXGA Mode: 1600 x 1200
-//
-#define UXGA_H_RES_PIXELS 1600
-#define UXGA_V_RES_PIXELS 1200
-#define UXGA_OSC_FREQUENCY 161000000 /* 0x0998AA40 */
-
-#define UXGA_H_SYNC (168 - 1)
-#define UXGA_H_FRONT_PORCH (112 - 1)
-#define UXGA_H_BACK_PORCH (280 - 1)
-
-#define UXGA_V_SYNC ( 4 - 1)
-#define UXGA_V_FRONT_PORCH ( 3 - 1)
-#define UXGA_V_BACK_PORCH ( 38 - 1)
-
-//
-// HD Mode: 1920 x 1080
-//
-#define HD_H_RES_PIXELS 1920
-#define HD_V_RES_PIXELS 1080
-#define HD_OSC_FREQUENCY 165000000 /* 0x09D5B340 */
-
-#define HD_H_SYNC ( 79 - 1)
-#define HD_H_FRONT_PORCH (128 - 1)
-#define HD_H_BACK_PORCH (328 - 1)
-
-#define HD_V_SYNC ( 5 - 1)
-#define HD_V_FRONT_PORCH ( 3 - 1)
-#define HD_V_BACK_PORCH ( 32 - 1)
-
-//
-// Colour Masks
-//
-
-#define LCD_24BPP_RED_MASK 0x00FF0000
-#define LCD_24BPP_GREEN_MASK 0x0000FF00
-#define LCD_24BPP_BLUE_MASK 0x000000FF
-#define LCD_24BPP_RESERVED_MASK 0xFF000000
-
-#define LCD_16BPP_555_RED_MASK 0x00007C00
-#define LCD_16BPP_555_GREEN_MASK 0x000003E0
-#define LCD_16BPP_555_BLUE_MASK 0x0000001F
-#define LCD_16BPP_555_RESERVED_MASK 0x00000000
-
-#define LCD_16BPP_565_RED_MASK 0x0000F800
-#define LCD_16BPP_565_GREEN_MASK 0x000007E0
-#define LCD_16BPP_565_BLUE_MASK 0x0000001F
-#define LCD_16BPP_565_RESERVED_MASK 0x00008000
-
-#define LCD_12BPP_444_RED_MASK 0x00000F00
-#define LCD_12BPP_444_GREEN_MASK 0x000000F0
-#define LCD_12BPP_444_BLUE_MASK 0x0000000F
-#define LCD_12BPP_444_RESERVED_MASK 0x0000F000
-
-
-// The enumeration indexes maps the PL111 LcdBpp values used in the LCD Control Register
-typedef enum {
- LCD_BITS_PER_PIXEL_1 = 0,
- LCD_BITS_PER_PIXEL_2,
- LCD_BITS_PER_PIXEL_4,
- LCD_BITS_PER_PIXEL_8,
- LCD_BITS_PER_PIXEL_16_555,
- LCD_BITS_PER_PIXEL_24,
- LCD_BITS_PER_PIXEL_16_565,
- LCD_BITS_PER_PIXEL_12_444
-} LCD_BPP;
-
-
-EFI_STATUS
-LcdPlatformInitializeDisplay (
- IN EFI_HANDLE Handle
- );
-
-EFI_STATUS
-LcdPlatformGetVram (
- OUT EFI_PHYSICAL_ADDRESS* VramBaseAddress,
- OUT UINTN* VramSize
- );
-
-UINT32
-LcdPlatformGetMaxMode (
- VOID
- );
-
-EFI_STATUS
-LcdPlatformSetMode (
- IN UINT32 ModeNumber
- );
-
-EFI_STATUS
-LcdPlatformQueryMode (
- IN UINT32 ModeNumber,
- OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info
- );
-
-EFI_STATUS
-LcdPlatformGetTimings (
- IN UINT32 ModeNumber,
- OUT UINT32* HRes,
- OUT UINT32* HSync,
- OUT UINT32* HBackPorch,
- OUT UINT32* HFrontPorch,
- OUT UINT32* VRes,
- OUT UINT32* VSync,
- OUT UINT32* VBackPorch,
- OUT UINT32* VFrontPorch
- );
-
-EFI_STATUS
-LcdPlatformGetBpp (
- IN UINT32 ModeNumber,
- OUT LCD_BPP* Bpp
- );
-
-#endif
--
2.17.1