Date   

[PATCH 0/9] SEV-ES guest support fixes and cleanup

Lendacky, Thomas
 

From: Tom Lendacky <thomas.lendacky@...>

This patch series provides some fixes, updates and cleanup to the SEV-ES
guest support:

The first patch updates the calculation of the qword offset of fields
within the GHCB. Specifically, it removes the hardcoding of the offsets
and uses the OFFSET_OF () and sizeof () functions to calculate the
values, removes unused values and add values that will be used in later
patches.

The next five patches set the SwExitCode/SwExitInfo1/SwExitInfo2/SwScratch
valid bits in the GHCB ValidBitmap area when these fields are set at
VMGEXIT.

The next two patches update the Qemu flash drive services support to
add SEV-ES support to erasing blocks and to disable interrupts when using
the GHCB.

Finally, the last patch uses the processor number for setting the AP stack
pointer instead of the APIC ID (using GetProcessorNumber()).

---

These patches are based on commit:
ae511331e0fb ("BaseTools Build_Rule: Add the missing ASM16_FLAGS for ASM16 source file")

Cc: Ard Biesheuvel <ard.biesheuvel@...>
Cc: Eric Dong <eric.dong@...>
Cc: Laszlo Ersek <lersek@...>
Cc: Liming Gao <gaoliming@...>
Cc: Jordan Justen <jordan.l.justen@...>
Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Rahul Kumar <rahul1.kumar@...>
Cc: Zhiguang Liu <zhiguang.liu@...>
Cc: Ray Ni <ray.ni@...>
Cc: Tom Lendacky <thomas.lendacky@...>
Cc: Brijesh Singh <brijesh.singh@...>

Tom Lendacky (9):
OvmfPkg/VmgExitLib: Update ValidBitmap settings
OvmfPkg/VmgExitLib: Set the SW exit fields when performing VMGEXIT
OvmfPkg/VmgExitLib: Set the SwScratch valid bit for IOIO events
OvmfPkg/VmgExitLib: Set the SwScratch valid bit for MMIO events
UefiCpuPkg/MpInitLib: Set the SW exit fields when performing VMGEXIT
OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Set the SwScratch valid bit
OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Fix erase blocks for SEV-ES
OvmfPkg/QemuFlashFvbServicesRuntimeDxe: Disable interrupts when using
GHCB
UefiCpuPkg/MpInitLib: For SEV-ES guest set stack based on processor
number

MdePkg/Include/Register/Amd/Ghcb.h | 48 ++++++++------------
OvmfPkg/Library/VmgExitLib/VmgExitLib.c | 30 ++++++++++++
OvmfPkg/Library/VmgExitLib/VmgExitVcHandler.c | 10 +++-
OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlash.c | 4 +-
OvmfPkg/QemuFlashFvbServicesRuntimeDxe/QemuFlashDxe.c | 21 +++++++++
UefiCpuPkg/Library/MpInitLib/MpLib.c | 7 ++-
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 6 +++
7 files changed, 91 insertions(+), 35 deletions(-)

--
2.28.0


Re: [PATCH] BaseTools: Add EDKII_DSC_PLATFORM_GUID MACRO

Bob Feng
 

Yunhua, Please complete the description sentence, for example "Add EDKII_DSC_PLATFORM_GUID MACRO to AutoGen.h and AutoGen.c".

After changing the description, Reviewed-by: Bob Feng <bob.c.feng@...>

-----Original Message-----
From: fengyunhua <fengyunhua@...>
Sent: Saturday, October 10, 2020 11:07 AM
To: devel@edk2.groups.io
Cc: gaoliming@...; Feng, Bob C <bob.c.feng@...>
Subject: [PATCH] BaseTools: Add EDKII_DSC_PLATFORM_GUID MACRO

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2969

Add EDKII_DSC_PLATFORM_GUID MACRO

Cc: Bob Feng <bob.c.feng@...>
Cc: Liming Gao <gaoliming@...>
Signed-off-by: Yunhua Feng <fengyunhua@...>
---
BaseTools/Source/Python/AutoGen/GenC.py | 3 +++
1 file changed, 3 insertions(+)

diff --git a/BaseTools/Source/Python/AutoGen/GenC.py b/BaseTools/Source/Python/AutoGen/GenC.py
index 5e0d11e165..5b63d278be 100755
--- a/BaseTools/Source/Python/AutoGen/GenC.py
+++ b/BaseTools/Source/Python/AutoGen/GenC.py
@@ -1980,12 +1980,14 @@ def CreateHeaderCode(Info, AutoGenC, AutoGenH):
AutoGenH.Append("#include <Library/PcdLib.h>\n")

AutoGenH.Append('\nextern GUID gEfiCallerIdGuid;')
+ AutoGenH.Append('\nextern GUID gEdkiiDscPlatformGuid;')
AutoGenH.Append('\nextern CHAR8 *gEfiCallerBaseName;\n\n')

if Info.IsLibrary:
return

AutoGenH.Append("#define EFI_CALLER_ID_GUID \\\n %s\n" % GuidStringToGuidStructureString(Info.Guid))
+ AutoGenH.Append("#define EDKII_DSC_PLATFORM_GUID \\\n %s\n" % GuidStringToGuidStructureString(Info.PlatformInfo.Guid))

if Info.IsLibrary:
return
@@ -2002,6 +2004,7 @@ def CreateHeaderCode(Info, AutoGenC, AutoGenH):
# Publish the CallerId Guid
#
AutoGenC.Append('\nGLOBAL_REMOVE_IF_UNREFERENCED GUID gEfiCallerIdGuid = %s;\n' % GuidStringToGuidStructureString(Info.Guid))
+ AutoGenC.Append('\nGLOBAL_REMOVE_IF_UNREFERENCED GUID gEdkiiDscPlatformGuid = %s;\n' % GuidStringToGuidStructureString(Info.PlatformInfo.Guid))
AutoGenC.Append('\nGLOBAL_REMOVE_IF_UNREFERENCED CHAR8 *gEfiCallerBaseName = "%s";\n' % Info.Name)

## Create common code for header file
--
2.27.0.windows.1


回复: [edk2-devel] [PATCH v2 0/2] UEFI memmap workaround for hiding page-access caps from OSes hides SP and CRYPTO caps too

gaoliming
 

Meg:
Pull Request is created https://github.com/tianocore/edk2/pull/999

Thanks
Liming

-----邮件原件-----
发件人: bounce+27952+66058+4905953+8761045@groups.io
<bounce+27952+66058+4905953+8761045@groups.io> 代表 gaoliming
发送时间: 2020年10月9日 17:30
收件人: devel@edk2.groups.io; jacek.kukiello@...; 'Rothman, Michael
A' <michael.a.rothman@...>
抄送: 'Kinney, Michael D' <michael.d.kinney@...>; 'Wang, Jian J'
<jian.j.wang@...>; 'Wu, Hao A' <hao.a.wu@...>; 'Bi, Dandan'
<dandan.bi@...>; 'Liu, Zhiguang' <zhiguang.liu@...>; 'Oleksiy
Yakovlev' <oleksiyy@...>; 'Ard Biesheuvel' <ard.biesheuvel@...>
主题: 回复: [edk2-devel] [PATCH v2 0/2] UEFI memmap workaround for
hiding page-access caps from OSes hides SP and CRYPTO caps too

Meg:
Thanks for your detail information. I understand this problem now.
I agree your patch to revert the change introduced by previous
3bd5c994c879f78e8e3d5346dc3b627f199291aa.

Reviewed-by: Liming Gao <gaoliming@...>

If no other comments, I will merge this patch set tomorrow.

Thanks
Liming
-----邮件原件-----
发件人: bounce+27952+66053+4905953+8761045@groups.io
<bounce+27952+66053+4905953+8761045@groups.io> 代表 Malgorzata
Kukiello
发送时间: 2020年10月9日 14:01
收件人: devel@edk2.groups.io; Kukiello, Malgorzata
<jacek.kukiello@...>; gaoliming@...; Rothman, Michael
A
<michael.a.rothman@...>
抄送: Kinney, Michael D <michael.d.kinney@...>; Wang, Jian J
<jian.j.wang@...>; Wu, Hao A <hao.a.wu@...>; Bi, Dandan
<dandan.bi@...>; Liu, Zhiguang <zhiguang.liu@...>; 'Oleksiy
Yakovlev' <oleksiyy@...>; 'Ard Biesheuvel'
<ard.biesheuvel@...>
主题: Re: [edk2-devel] [PATCH v2 0/2] UEFI memmap workaround for
hiding
page-access caps from OSes hides SP and CRYPTO caps too

Liming,
Any update/comment? It's pretty urgent from my perspective.
Thanks
Meg

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
Malgorzata Kukiello
Sent: Friday, October 2, 2020 2:52 PM
To: devel@edk2.groups.io; gaoliming@...; Rothman, Michael A
<michael.a.rothman@...>
Cc: Kinney, Michael D <michael.d.kinney@...>; Wang, Jian J
<jian.j.wang@...>; Wu, Hao A <hao.a.wu@...>; Bi, Dandan
<dandan.bi@...>; Liu, Zhiguang <zhiguang.liu@...>; 'Oleksiy
Yakovlev' <oleksiyy@...>; 'Ard Biesheuvel'
<ard.biesheuvel@...>
Subject: Re: [edk2-devel] [PATCH v2 0/2] UEFI memmap workaround for
hiding page-access caps from OSes hides SP and CRYPTO caps too

Liming,
I am trying to enable a crypto technology, that requires handling on the OS
side (implemented in the kernel.org patch), generally speaking I mark in
memory map all regions that can be encrypted using the before mentioned
tech. Then OS checks that attribute and decides whether or not to enable
that.
So the real problem is that currently all my attributes are overwritten and
cleared.
Thanks
Meg

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
gaoliming
Sent: Tuesday, September 29, 2020 3:13 AM
To: devel@edk2.groups.io; Kukiello, Malgorzata <jacek.kukiello@...>;
Rothman, Michael A <michael.a.rothman@...>
Cc: Kinney, Michael D <michael.d.kinney@...>; Wang, Jian J
<jian.j.wang@...>; Wu, Hao A <hao.a.wu@...>; Bi, Dandan
<dandan.bi@...>; Liu, Zhiguang <zhiguang.liu@...>; 'Oleksiy
Yakovlev' <oleksiyy@...>; 'Ard Biesheuvel'
<ard.biesheuvel@...>
Subject: 回复: [edk2-devel] [PATCH v2 0/2] UEFI memmap workaround for
hiding page-access caps from OSes hides SP and CRYPTO caps too

Meg:
What real problem do you meet with? What purpose is for this change?
And,
I also include UEFI Arch Rothman.

Rothman:
Can you help clarify what OS (Windows or Linux) behavior is expected for
UEFI SP and CRYPTO memory attribute?

Thanks
Liming
-----邮件原件-----
发件人: bounce+27952+65683+4905953+8761045@groups.io
<bounce+27952+65683+4905953+8761045@groups.io> 代表
Malgorzata
Kukiello
发送时间: 2020年9月28日 23:39
收件人: devel@edk2.groups.io; gaoliming@...
抄送: Kinney, Michael D <michael.d.kinney@...>; Wang, Jian J
<jian.j.wang@...>; Wu, Hao A <hao.a.wu@...>; Bi, Dandan
<dandan.bi@...>; Liu, Zhiguang <zhiguang.liu@...>;
'Oleksiy Yakovlev' <oleksiyy@...>; 'Ard Biesheuvel'
<ard.biesheuvel@...>
主题: Re: [edk2-devel] [PATCH v2 0/2] UEFI memmap workaround for
hiding
page-access caps from OSes hides SP and CRYPTO caps too

Liming,
As for mktme there is a change commited:
https://patchwork.kernel.org/patch/10935909/
As for SP I can't find anything specific.
Thanks
Meg

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
gaoliming
Sent: Friday, September 25, 2020 10:55 AM
To: devel@edk2.groups.io; Kukiello, Malgorzata
<jacek.kukiello@...>
Cc: Kinney, Michael D <michael.d.kinney@...>; Wang, Jian J
<jian.j.wang@...>; Wu, Hao A <hao.a.wu@...>; Bi, Dandan
<dandan.bi@...>; Liu, Zhiguang <zhiguang.liu@...>;
'Oleksiy Yakovlev' <oleksiyy@...>; 'Ard Biesheuvel'
<ard.biesheuvel@...>
Subject: 回复: [edk2-devel] [PATCH v2 0/2] UEFI memmap workaround
for
hiding page-access caps from OSes hides SP and CRYPTO caps too

Malgorzata:
How do know OS (Windows or Linux) behavior for SP and CRYPTO
attribute?
Is there the public document to describe this behavior?

Thanks
Liming
-----邮件原件-----
发件人: bounce+27952+65566+4905953+8761045@groups.io
<bounce+27952+65566+4905953+8761045@groups.io> 代表
Malgorzata
Kukiello
发送时间: 2020年9月24日 18:22
收件人: devel@edk2.groups.io
抄送: Malgorzata Kukiello <jacek.kukiello@...>; Michael D
Kinney
<michael.d.kinney@...>; Jian J Wang <jian.j.wang@...>;
Hao A Wu <hao.a.wu@...>; Dandan Bi <dandan.bi@...>;
Liming Gao <gaoliming@...>; Zhiguang Liu
<zhiguang.liu@...>; Oleksiy Yakovlev <oleksiyy@...>; Ard
Biesheuvel <ard.biesheuvel@...>
主题: [edk2-devel] [PATCH v2 0/2] UEFI memmap workaround for
hiding
page-access caps from OSes hides SP and CRYPTO caps too

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2982

The workaround in the UEFI memmap construction, near the end of the
function CoreGetMemoryMap()
[MdeModulePkg/Core/Dxe/Mem/Page.c]
should
not clear the SP and CRYPTO bits, because OSes do (apparently)
correctly interpret SP and CRYPTO as capabilities, and not as
currently set attributes (upon which the OSes should set their page
tables). For this reason, the SP and CRYPTO bits should be separated
from the bitmask that we use for hiding the page-access attributes,
in the workaround

Signed-off-by: Malgorzata Kukiello <jacek.kukiello@...>
Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Jian J Wang <jian.j.wang@...>
Cc: Hao A Wu <hao.a.wu@...>
Cc: Dandan Bi <dandan.bi@...>
Cc: Liming Gao <gaoliming@...>
Cc: Zhiguang Liu <zhiguang.liu@...>
Cc: Oleksiy Yakovlev <oleksiyy@...>
Cc: Ard Biesheuvel (ARM address) <ard.biesheuvel@...>

MdeModulePkg/Core/Dxe/Mem/Page.c | 12 ++++++------
MdePkg/Include/Uefi/UefiSpec.h | 3 ++-
2 files changed, 8 insertions(+), 7 deletions(-)
--------------------------------------------------------------------
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Wydzia Gospodarczy Krajowego Rejestru Sdowego - KRS 101882 | NIP
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Ta wiadomo wraz z zacznikami jest przeznaczona dla okrelonego adresata
i moe zawiera informacje poufne. W razie przypadkowego otrzymania tej
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---------------------------------------------------------------------
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ul. Sowackiego 173 | 80-298 Gdask | Sd Rejonowy Gdask Pnoc | VII Wydzia
Gospodarczy Krajowego Rejestru Sdowego - KRS 101882 | NIP
957-07-52-316
| Kapita zakadowy 200.000 PLN.
Ta wiadomo wraz z zacznikami jest przeznaczona dla okrelonego adresata i
moe zawiera informacje poufne. W razie przypadkowego otrzymania tej
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jakiekolwiek przegldanie lub rozpowszechnianie jest zabronione.
This e-mail and any attachments may contain confidential material for the
sole use of the intended recipient(s). If you are not the intended recipient,
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by
others is strictly prohibited.






---------------------------------------------------------------------
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ul. Sowackiego 173 | 80-298 Gdask | Sd Rejonowy Gdask Pnoc | VII Wydzia
Gospodarczy Krajowego Rejestru Sdowego - KRS 101882 | NIP
957-07-52-316
| Kapita zakadowy 200.000 PLN.
Ta wiadomo wraz z zacznikami jest przeznaczona dla okrelonego adresata i
moe zawiera informacje poufne. W razie przypadkowego otrzymania tej
wiadomoci, prosimy o powiadomienie nadawcy oraz trwae jej usunicie;
jakiekolwiek przegldanie lub rozpowszechnianie jest zabronione.
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回复: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".

gaoliming
 

-----邮件原件-----
发件人: bounce+27952+66090+4905953+8761045@groups.io
<bounce+27952+66090+4905953+8761045@groups.io> 代表 gaoliming
发送时间: 2020年10月10日 10:33
收件人: 'Liu, Zhiguang' <zhiguang.liu@...>; devel@edk2.groups.io
抄送: 'Wang, Sanyo' <sanyo.wang@...>; 'Kinney, Michael D'
<michael.d.kinney@...>; 'Gao, Zhichao' <zhichao.gao@...>;
'Sean Brogan' <spbrogan@...>
主题: 回复: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding
DDR5 definitions".

The pull request needs rebase. I will submit new pull request today.

Thanks
Liming
-----邮件原件-----
发件人: Liu, Zhiguang <zhiguang.liu@...>
发送时间: 2020年10月10日 8:49
收件人: gaoliming <gaoliming@...>; devel@edk2.groups.io
抄送: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Gao, Zhichao <zhichao.gao@...>;
'Sean Brogan' <spbrogan@...>
主题: RE: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding
DDR5
definitions".

Hi Liming

In pull request https://github.com/tianocore/edk2/pull/996
Merge failed because
tanocore.PatchCheck Failing after 34s — Build #20201009.4 failed

Detail:
The commit message format is not valid:
* Missing Signed-off-by! (Note: this must be added by the code
contributor!)
https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-For
mat

However, I abstract the patch from Outlook and run PatchCheck to check it
in
my local machine, the result is ok.

Detail:
E:\edk2\BaseTools\Scripts>py PatchCheck.py
0001-MdePkg-SMBIOS-3.4.0-Update-adding-DDR5-definitions-.patch
Checking patch file:
0001-MdePkg-SMBIOS-3.4.0-Update-adding-DDR5-definitions-.patch
[PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".
The commit message format passed all checks.
The code passed all checks.

Do you know why?

Thanks
Zhiguang
-----Original Message-----
From: gaoliming <gaoliming@...>
Sent: Friday, October 9, 2020 5:21 PM
To: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@...>
Cc: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Gao, Zhichao <zhichao.gao@...>;
'Sean
Brogan' <spbrogan@...>
Subject: 回复: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5 definitions".

https://github.com/tianocore/edk2/pull/996 is created.

-----邮件原件-----
发件人: bounce+27952+66054+4905953+8761045@groups.io
<bounce+27952+66054+4905953+8761045@groups.io> 代表
Zhiguang
Liu
发送时间: 2020年10月9日 15:24
收件人: devel@edk2.groups.io; gaoliming@...
抄送: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Gao, Zhichao <zhichao.gao@...>;
Sean Brogan <spbrogan@...>
主题: Re: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding
DDR5
definitions".

Hi Liming,
This patch also gets R-B from Sean Brogan.
Please help merge this patch.

Thanks
Zhiguang

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
gaoliming
Sent: Wednesday, September 30, 2020 8:45 AM
To: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@...>
Cc: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>
Subject: 回复: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5 definitions".

Reviewed-by: Liming Gao <gaoliming@...>

-----邮件原件-----
发件人: bounce+27952+65712+4905953+8761045@groups.io
<bounce+27952+65712+4905953+8761045@groups.io> 代表
Zhiguang
Liu
发送时间: 2020年9月29日 16:12
收件人: devel@edk2.groups.io; Liu, Zhiguang
<zhiguang.liu@...>
抄送: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Liming Gao
<gaoliming@...>
主题: Re: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5
definitions".


Reviewed-by: Zhiguang Liu <zhiguang.liu@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf
Of
Zhiguang
Liu
Sent: Tuesday, September 29, 2020 4:09 PM
To: devel@edk2.groups.io
Cc: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Liming Gao
<gaoliming@...>
Subject: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5 definitions".

From: "Wang, Sanyo" <sanyo.wang@...>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2352

SMBIOS 3.4 spec adds new memory device types (DDR5, LPDDR5)

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Liming Gao <gaoliming@...>
Cc: Zhiguang Liu <zhiguang.liu@...>
Signed-off-by: Sanyo Wang <sanyo.wang@...>
---
MdePkg/Include/IndustryStandard/SmBios.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
b/MdePkg/Include/IndustryStandard/SmBios.h
index ea23685851..f2db11f947 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1718,7 +1718,9 @@ typedef enum {
MemoryTypeLpddr4 = 0x1E,

MemoryTypeLogicalNonVolatileDevice = 0x1F,

MemoryTypeHBM = 0x20,

- MemoryTypeHBM2 = 0x21

+ MemoryTypeHBM2 = 0x21,

+ MemoryTypeDdr5 = 0x22,

+ MemoryTypeLpddr5 = 0x23

} MEMORY_DEVICE_TYPE;



///

--
2.25.1.windows.1



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[PATCH] BaseTools: Add EDKII_DSC_PLATFORM_GUID MACRO

fengyunhua <fengyunhua@...>
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2969

Add EDKII_DSC_PLATFORM_GUID MACRO

Cc: Bob Feng <bob.c.feng@...>
Cc: Liming Gao <gaoliming@...>
Signed-off-by: Yunhua Feng <fengyunhua@...>
---
BaseTools/Source/Python/AutoGen/GenC.py | 3 +++
1 file changed, 3 insertions(+)

diff --git a/BaseTools/Source/Python/AutoGen/GenC.py b/BaseTools/Source/Python/AutoGen/GenC.py
index 5e0d11e165..5b63d278be 100755
--- a/BaseTools/Source/Python/AutoGen/GenC.py
+++ b/BaseTools/Source/Python/AutoGen/GenC.py
@@ -1980,12 +1980,14 @@ def CreateHeaderCode(Info, AutoGenC, AutoGenH):
AutoGenH.Append("#include <Library/PcdLib.h>\n")

AutoGenH.Append('\nextern GUID gEfiCallerIdGuid;')
+ AutoGenH.Append('\nextern GUID gEdkiiDscPlatformGuid;')
AutoGenH.Append('\nextern CHAR8 *gEfiCallerBaseName;\n\n')

if Info.IsLibrary:
return

AutoGenH.Append("#define EFI_CALLER_ID_GUID \\\n %s\n" % GuidStringToGuidStructureString(Info.Guid))
+ AutoGenH.Append("#define EDKII_DSC_PLATFORM_GUID \\\n %s\n" % GuidStringToGuidStructureString(Info.PlatformInfo.Guid))

if Info.IsLibrary:
return
@@ -2002,6 +2004,7 @@ def CreateHeaderCode(Info, AutoGenC, AutoGenH):
# Publish the CallerId Guid
#
AutoGenC.Append('\nGLOBAL_REMOVE_IF_UNREFERENCED GUID gEfiCallerIdGuid = %s;\n' % GuidStringToGuidStructureString(Info.Guid))
+ AutoGenC.Append('\nGLOBAL_REMOVE_IF_UNREFERENCED GUID gEdkiiDscPlatformGuid = %s;\n' % GuidStringToGuidStructureString(Info.PlatformInfo.Guid))
AutoGenC.Append('\nGLOBAL_REMOVE_IF_UNREFERENCED CHAR8 *gEfiCallerBaseName = "%s";\n' % Info.Name)

## Create common code for header file
--
2.27.0.windows.1


[PATCH] BaseMemoryLibSse2: Take advantage of write combining buffers

Compostella, Jeremy
 

The current SSE2 implementation of the ZeroMem(), SetMem(),
SetMem16(), SetMem32() and SetMem64() functions is writing 16 bytes
per 16 bytes. It hurts the performances so bad that this is even
slower than a simple 'rep stos' (4% slower) in regular RAM.

To take full advantages of the 'movntdq' instruction it is better to
"queue" a total of 64 bytes in the write combining buffers. This
patch implements such a change. Below is a table where I measured
(with 'rdtsc') the time to write an entire 100MB RAM buffer. These
functions operate almost twice faster.

| Function | Arch | Untouched | 64 bytes | Result |
|----------+------+-----------+----------+--------|
| ZeroMem | Ia32 | 17765947 | 9136062 | 1.945x |
| ZeroMem | X64 | 17525170 | 9233391 | 1.898x |
| SetMem | Ia32 | 17522291 | 9137272 | 1.918x |
| SetMem | X64 | 17949261 | 9176978 | 1.956x |
| SetMem16 | Ia32 | 18219673 | 9372062 | 1.944x |
| SetMem16 | X64 | 17523331 | 9275184 | 1.889x |
| SetMem32 | Ia32 | 18495036 | 9273053 | 1.994x |
| SetMem32 | X64 | 17368864 | 9285885 | 1.870x |
| SetMem64 | Ia32 | 18564473 | 9241362 | 2.009x |
| SetMem64 | X64 | 17506951 | 9280148 | 1.886x |

Signed-off-by: Jeremy Compostella <jeremy.compostella@...>
---
.../BaseMemoryLibSse2/Ia32/SetMem.nasm | 11 ++++++----
.../BaseMemoryLibSse2/Ia32/SetMem16.nasm | 11 ++++++----
.../BaseMemoryLibSse2/Ia32/SetMem32.nasm | 9 ++++++---
.../BaseMemoryLibSse2/Ia32/SetMem64.nasm | 20 +++++++++++++++----
.../BaseMemoryLibSse2/Ia32/ZeroMem.nasm | 11 ++++++----
.../Library/BaseMemoryLibSse2/X64/SetMem.nasm | 9 ++++++---
.../BaseMemoryLibSse2/X64/SetMem16.nasm | 11 ++++++----
.../BaseMemoryLibSse2/X64/SetMem32.nasm | 9 ++++++---
.../BaseMemoryLibSse2/X64/SetMem64.nasm | 19 ++++++++++++++----
.../BaseMemoryLibSse2/X64/ZeroMem.nasm | 13 +++++++-----
10 files changed, 85 insertions(+), 38 deletions(-)

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.nasm
index 24313cb4b3..a8744300c6 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.nasm
@@ -34,7 +34,7 @@ ASM_PFX(InternalMemSetMem):
mov al, [esp + 16] ; al <- Value
xor ecx, ecx
sub ecx, edi
- and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ and ecx, 63 ; ecx + edi aligns on 16-byte boundary
jz .0
cmp ecx, edx
cmova ecx, edx
@@ -42,8 +42,8 @@ ASM_PFX(InternalMemSetMem):
rep stosb
.0:
mov ecx, edx
- and edx, 15
- shr ecx, 4 ; ecx <- # of DQwords to set
+ and edx, 63
+ shr ecx, 6 ; ecx <- # of DQwords to set
jz @SetBytes
mov ah, al ; ax <- Value | (Value << 8)
add esp, -16
@@ -53,7 +53,10 @@ ASM_PFX(InternalMemSetMem):
movlhps xmm0, xmm0 ; xmm0 <- Value repeats 16 times
.1:
movntdq [edi], xmm0 ; edi should be 16-byte aligned
- add edi, 16
+ movntdq [edi + 16], xmm0
+ movntdq [edi + 32], xmm0
+ movntdq [edi + 48], xmm0
+ add edi, 64
loop .1
mfence
movdqu xmm0, [esp] ; restore xmm0
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.nasm
index 6e308b5594..d461ee086c 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.nasm
@@ -33,7 +33,7 @@ ASM_PFX(InternalMemSetMem16):
mov edi, [esp + 8]
xor ecx, ecx
sub ecx, edi
- and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ and ecx, 63 ; ecx + edi aligns on 16-byte boundary
mov eax, [esp + 16]
jz .0
shr ecx, 1
@@ -43,15 +43,18 @@ ASM_PFX(InternalMemSetMem16):
rep stosw
.0:
mov ecx, edx
- and edx, 7
- shr ecx, 3
+ and edx, 31
+ shr ecx, 5
jz @SetWords
movd xmm0, eax
pshuflw xmm0, xmm0, 0
movlhps xmm0, xmm0
.1:
movntdq [edi], xmm0 ; edi should be 16-byte aligned
- add edi, 16
+ movntdq [edi + 16], xmm0
+ movntdq [edi + 32], xmm0
+ movntdq [edi + 48], xmm0
+ add edi, 64
loop .1
mfence
@SetWords:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.nasm
index 2cfc8cb0dd..3ffdcd07d7 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.nasm
@@ -43,14 +43,17 @@ ASM_PFX(InternalMemSetMem32):
rep stosd
.0:
mov ecx, edx
- and edx, 3
- shr ecx, 2
+ and edx, 15
+ shr ecx, 4
jz @SetDwords
movd xmm0, eax
pshufd xmm0, xmm0, 0
.1:
movntdq [edi], xmm0
- add edi, 16
+ movntdq [edi + 16], xmm0
+ movntdq [edi + 32], xmm0
+ movntdq [edi + 48], xmm0
+ add edi, 64
loop .1
mfence
@SetDwords:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.nasm
index e153495a68..cd000648ae 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.nasm
@@ -38,17 +38,29 @@ ASM_PFX(InternalMemSetMem64):
add edx, 8
dec ecx
.0:
- shr ecx, 1
+ push ebx
+ mov ebx, ecx
+ and ebx, 7
+ shr ecx, 3
jz @SetQwords
movlhps xmm0, xmm0
.1:
movntdq [edx], xmm0
- lea edx, [edx + 16]
+ movntdq [edx + 16], xmm0
+ movntdq [edx + 32], xmm0
+ movntdq [edx + 48], xmm0
+ lea edx, [edx + 64]
loop .1
mfence
@SetQwords:
- jnc .2
+ test ebx, ebx
+ jz .3
+ mov ecx, ebx
+.2
movq qword [edx], xmm0
-.2:
+ lea edx, [edx + 8]
+ loop .2
+.3:
+ pop ebx
ret

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.nasm
index cd34006f59..0e0828551b 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.nasm
@@ -33,7 +33,7 @@ ASM_PFX(InternalMemZeroMem):
xor ecx, ecx
sub ecx, edi
xor eax, eax
- and ecx, 15
+ and ecx, 63
jz .0
cmp ecx, edx
cmova ecx, edx
@@ -41,13 +41,16 @@ ASM_PFX(InternalMemZeroMem):
rep stosb
.0:
mov ecx, edx
- and edx, 15
- shr ecx, 4
+ and edx, 63
+ shr ecx, 6
jz @ZeroBytes
pxor xmm0, xmm0
.1:
movntdq [edi], xmm0
- add edi, 16
+ movntdq [edi + 16], xmm0
+ movntdq [edi + 32], xmm0
+ movntdq [edi + 48], xmm0
+ add edi, 64
loop .1
mfence
@ZeroBytes:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.nasm
index 5bd1c2262d..28b11ee586 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.nasm
@@ -42,8 +42,8 @@ ASM_PFX(InternalMemSetMem):
rep stosb
.0:
mov rcx, rdx
- and rdx, 15
- shr rcx, 4
+ and rdx, 63
+ shr rcx, 6
jz @SetBytes
mov ah, al ; ax <- Value repeats twice
movdqa [rsp + 0x10], xmm0 ; save xmm0
@@ -52,7 +52,10 @@ ASM_PFX(InternalMemSetMem):
movlhps xmm0, xmm0 ; xmm0 <- Value repeats 16 times
.1:
movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
- add rdi, 16
+ movntdq [rdi + 16], xmm0
+ movntdq [rdi + 32], xmm0
+ movntdq [rdi + 48], xmm0
+ add rdi, 64
loop .1
mfence
movdqa xmm0, [rsp + 0x10] ; restore xmm0
diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.nasm
index 90d159820a..375be19313 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.nasm
@@ -33,7 +33,7 @@ ASM_PFX(InternalMemSetMem16):
mov r9, rdi
xor rcx, rcx
sub rcx, rdi
- and rcx, 15
+ and rcx, 63
mov rax, r8
jz .0
shr rcx, 1
@@ -43,15 +43,18 @@ ASM_PFX(InternalMemSetMem16):
rep stosw
.0:
mov rcx, rdx
- and edx, 7
- shr rcx, 3
+ and edx, 31
+ shr rcx, 5
jz @SetWords
movd xmm0, eax
pshuflw xmm0, xmm0, 0
movlhps xmm0, xmm0
.1:
movntdq [rdi], xmm0
- add rdi, 16
+ movntdq [rdi + 16], xmm0
+ movntdq [rdi + 32], xmm0
+ movntdq [rdi + 48], xmm0
+ add rdi, 64
loop .1
mfence
@SetWords:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.nasm
index 928e086889..5d12beaa9a 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.nasm
@@ -43,14 +43,17 @@ ASM_PFX(InternalMemSetMem32):
rep stosd
.0:
mov rcx, rdx
- and edx, 3
- shr rcx, 2
+ and edx, 15
+ shr rcx, 4
jz @SetDwords
movd xmm0, eax
pshufd xmm0, xmm0, 0
.1:
movntdq [rdi], xmm0
- add rdi, 16
+ movntdq [rdi + 16], xmm0
+ movntdq [rdi + 32], xmm0
+ movntdq [rdi + 48], xmm0
+ add rdi, 64
loop .1
mfence
@SetDwords:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.nasm
index d771810542..265983d5ad 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.nasm
@@ -37,17 +37,28 @@ ASM_PFX(InternalMemSetMem64):
add rdx, 8
dec rcx
.0:
- shr rcx, 1
+ push rbx
+ mov rbx, rcx
+ and rbx, 7
+ shr rcx, 3
jz @SetQwords
movlhps xmm0, xmm0
.1:
movntdq [rdx], xmm0
- lea rdx, [rdx + 16]
+ movntdq [rdx + 16], xmm0
+ movntdq [rdx + 32], xmm0
+ movntdq [rdx + 48], xmm0
+ lea rdx, [rdx + 64]
loop .1
mfence
@SetQwords:
- jnc .2
- mov [rdx], r8
+ push rdi
+ mov rcx, rbx
+ mov rax, r8
+ mov rdi, rdx
+ rep stosq
+ pop rdi
.2:
+ pop rbx
ret

diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm
index 5ddcae9ca5..21f504e3b7 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm
@@ -32,7 +32,7 @@ ASM_PFX(InternalMemZeroMem):
xor rcx, rcx
xor eax, eax
sub rcx, rdi
- and rcx, 15
+ and rcx, 63
mov r8, rdi
jz .0
cmp rcx, rdx
@@ -41,13 +41,16 @@ ASM_PFX(InternalMemZeroMem):
rep stosb
.0:
mov rcx, rdx
- and edx, 15
- shr rcx, 4
+ and edx, 63
+ shr rcx, 6
jz @ZeroBytes
pxor xmm0, xmm0
.1:
- movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
- add rdi, 16
+ movntdq [rdi], xmm0
+ movntdq [rdi + 16], xmm0
+ movntdq [rdi + 32], xmm0
+ movntdq [rdi + 48], xmm0
+ add rdi, 64
loop .1
mfence
@ZeroBytes:
--
2.25.3


[PATCH] BaseMemoryLibSse2: Take advantage of write combining buffers

Compostella, Jeremy <jeremy.compostella@...>
 

The current SSE2 implementation of the ZeroMem(), SetMem(),
SetMem16(), SetMem32 and SetMem64 functions is writing 16 bytes per 16
bytes. It hurts the performances so bad that this is even slower than
a simple 'rep stos' (4% slower) in regular DRAM.

To take full advantages of the 'movntdq' instruction it is better to
"queue" a total of 64 bytes in the write combining buffers. This
patch implement such a change. Below is a table where I measured
(with 'rdtsc') the time to write an entire 100MB RAM buffer. These
functions operate almost two times faster.

| Function | Arch | Untouched | 64 bytes | Result |
|----------+------+-----------+----------+--------|
| ZeroMem | Ia32 | 17765947 | 9136062 | 1.945x |
| ZeroMem | X64 | 17525170 | 9233391 | 1.898x |
| SetMem | Ia32 | 17522291 | 9137272 | 1.918x |
| SetMem | X64 | 17949261 | 9176978 | 1.956x |
| SetMem16 | Ia32 | 18219673 | 9372062 | 1.944x |
| SetMem16 | X64 | 17523331 | 9275184 | 1.889x |
| SetMem32 | Ia32 | 18495036 | 9273053 | 1.994x |
| SetMem32 | X64 | 17368864 | 9285885 | 1.870x |
| SetMem64 | Ia32 | 18564473 | 9241362 | 2.009x |
| SetMem64 | X64 | 17506951 | 9280148 | 1.886x |

Signed-off-by: Jeremy Compostella <jeremy.compostella@...>
---
.../BaseMemoryLibSse2/Ia32/SetMem.nasm | 11 ++++++----
.../BaseMemoryLibSse2/Ia32/SetMem16.nasm | 11 ++++++----
.../BaseMemoryLibSse2/Ia32/SetMem32.nasm | 9 ++++++---
.../BaseMemoryLibSse2/Ia32/SetMem64.nasm | 20 +++++++++++++++----
.../BaseMemoryLibSse2/Ia32/ZeroMem.nasm | 11 ++++++----
.../Library/BaseMemoryLibSse2/X64/SetMem.nasm | 9 ++++++---
.../BaseMemoryLibSse2/X64/SetMem16.nasm | 11 ++++++----
.../BaseMemoryLibSse2/X64/SetMem32.nasm | 9 ++++++---
.../BaseMemoryLibSse2/X64/SetMem64.nasm | 19 ++++++++++++++----
.../BaseMemoryLibSse2/X64/ZeroMem.nasm | 13 +++++++-----
10 files changed, 85 insertions(+), 38 deletions(-)

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.nasm
index 24313cb4b3..a8744300c6 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem.nasm
@@ -34,7 +34,7 @@ ASM_PFX(InternalMemSetMem):
mov al, [esp + 16] ; al <- Value
xor ecx, ecx
sub ecx, edi
- and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ and ecx, 63 ; ecx + edi aligns on 16-byte boundary
jz .0
cmp ecx, edx
cmova ecx, edx
@@ -42,8 +42,8 @@ ASM_PFX(InternalMemSetMem):
rep stosb
.0:
mov ecx, edx
- and edx, 15
- shr ecx, 4 ; ecx <- # of DQwords to set
+ and edx, 63
+ shr ecx, 6 ; ecx <- # of DQwords to set
jz @SetBytes
mov ah, al ; ax <- Value | (Value << 8)
add esp, -16
@@ -53,7 +53,10 @@ ASM_PFX(InternalMemSetMem):
movlhps xmm0, xmm0 ; xmm0 <- Value repeats 16 times
.1:
movntdq [edi], xmm0 ; edi should be 16-byte aligned
- add edi, 16
+ movntdq [edi + 16], xmm0
+ movntdq [edi + 32], xmm0
+ movntdq [edi + 48], xmm0
+ add edi, 64
loop .1
mfence
movdqu xmm0, [esp] ; restore xmm0
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.nasm
index 6e308b5594..d461ee086c 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem16.nasm
@@ -33,7 +33,7 @@ ASM_PFX(InternalMemSetMem16):
mov edi, [esp + 8]
xor ecx, ecx
sub ecx, edi
- and ecx, 15 ; ecx + edi aligns on 16-byte boundary
+ and ecx, 63 ; ecx + edi aligns on 16-byte boundary
mov eax, [esp + 16]
jz .0
shr ecx, 1
@@ -43,15 +43,18 @@ ASM_PFX(InternalMemSetMem16):
rep stosw
.0:
mov ecx, edx
- and edx, 7
- shr ecx, 3
+ and edx, 31
+ shr ecx, 5
jz @SetWords
movd xmm0, eax
pshuflw xmm0, xmm0, 0
movlhps xmm0, xmm0
.1:
movntdq [edi], xmm0 ; edi should be 16-byte aligned
- add edi, 16
+ movntdq [edi + 16], xmm0
+ movntdq [edi + 32], xmm0
+ movntdq [edi + 48], xmm0
+ add edi, 64
loop .1
mfence
@SetWords:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.nasm
index 2cfc8cb0dd..3ffdcd07d7 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem32.nasm
@@ -43,14 +43,17 @@ ASM_PFX(InternalMemSetMem32):
rep stosd
.0:
mov ecx, edx
- and edx, 3
- shr ecx, 2
+ and edx, 15
+ shr ecx, 4
jz @SetDwords
movd xmm0, eax
pshufd xmm0, xmm0, 0
.1:
movntdq [edi], xmm0
- add edi, 16
+ movntdq [edi + 16], xmm0
+ movntdq [edi + 32], xmm0
+ movntdq [edi + 48], xmm0
+ add edi, 64
loop .1
mfence
@SetDwords:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.nasm
index e153495a68..cd000648ae 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/SetMem64.nasm
@@ -38,17 +38,29 @@ ASM_PFX(InternalMemSetMem64):
add edx, 8
dec ecx
.0:
- shr ecx, 1
+ push ebx
+ mov ebx, ecx
+ and ebx, 7
+ shr ecx, 3
jz @SetQwords
movlhps xmm0, xmm0
.1:
movntdq [edx], xmm0
- lea edx, [edx + 16]
+ movntdq [edx + 16], xmm0
+ movntdq [edx + 32], xmm0
+ movntdq [edx + 48], xmm0
+ lea edx, [edx + 64]
loop .1
mfence
@SetQwords:
- jnc .2
+ test ebx, ebx
+ jz .3
+ mov ecx, ebx
+.2
movq qword [edx], xmm0
-.2:
+ lea edx, [edx + 8]
+ loop .2
+.3:
+ pop ebx
ret

diff --git a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.nasm b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.nasm
index cd34006f59..0e0828551b 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/Ia32/ZeroMem.nasm
@@ -33,7 +33,7 @@ ASM_PFX(InternalMemZeroMem):
xor ecx, ecx
sub ecx, edi
xor eax, eax
- and ecx, 15
+ and ecx, 63
jz .0
cmp ecx, edx
cmova ecx, edx
@@ -41,13 +41,16 @@ ASM_PFX(InternalMemZeroMem):
rep stosb
.0:
mov ecx, edx
- and edx, 15
- shr ecx, 4
+ and edx, 63
+ shr ecx, 6
jz @ZeroBytes
pxor xmm0, xmm0
.1:
movntdq [edi], xmm0
- add edi, 16
+ movntdq [edi + 16], xmm0
+ movntdq [edi + 32], xmm0
+ movntdq [edi + 48], xmm0
+ add edi, 64
loop .1
mfence
@ZeroBytes:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.nasm
index 5bd1c2262d..28b11ee586 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem.nasm
@@ -42,8 +42,8 @@ ASM_PFX(InternalMemSetMem):
rep stosb
.0:
mov rcx, rdx
- and rdx, 15
- shr rcx, 4
+ and rdx, 63
+ shr rcx, 6
jz @SetBytes
mov ah, al ; ax <- Value repeats twice
movdqa [rsp + 0x10], xmm0 ; save xmm0
@@ -52,7 +52,10 @@ ASM_PFX(InternalMemSetMem):
movlhps xmm0, xmm0 ; xmm0 <- Value repeats 16 times
.1:
movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
- add rdi, 16
+ movntdq [rdi + 16], xmm0
+ movntdq [rdi + 32], xmm0
+ movntdq [rdi + 48], xmm0
+ add rdi, 64
loop .1
mfence
movdqa xmm0, [rsp + 0x10] ; restore xmm0
diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.nasm
index 90d159820a..375be19313 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem16.nasm
@@ -33,7 +33,7 @@ ASM_PFX(InternalMemSetMem16):
mov r9, rdi
xor rcx, rcx
sub rcx, rdi
- and rcx, 15
+ and rcx, 63
mov rax, r8
jz .0
shr rcx, 1
@@ -43,15 +43,18 @@ ASM_PFX(InternalMemSetMem16):
rep stosw
.0:
mov rcx, rdx
- and edx, 7
- shr rcx, 3
+ and edx, 31
+ shr rcx, 5
jz @SetWords
movd xmm0, eax
pshuflw xmm0, xmm0, 0
movlhps xmm0, xmm0
.1:
movntdq [rdi], xmm0
- add rdi, 16
+ movntdq [rdi + 16], xmm0
+ movntdq [rdi + 32], xmm0
+ movntdq [rdi + 48], xmm0
+ add rdi, 64
loop .1
mfence
@SetWords:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.nasm
index 928e086889..5d12beaa9a 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem32.nasm
@@ -43,14 +43,17 @@ ASM_PFX(InternalMemSetMem32):
rep stosd
.0:
mov rcx, rdx
- and edx, 3
- shr rcx, 2
+ and edx, 15
+ shr rcx, 4
jz @SetDwords
movd xmm0, eax
pshufd xmm0, xmm0, 0
.1:
movntdq [rdi], xmm0
- add rdi, 16
+ movntdq [rdi + 16], xmm0
+ movntdq [rdi + 32], xmm0
+ movntdq [rdi + 48], xmm0
+ add rdi, 64
loop .1
mfence
@SetDwords:
diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.nasm
index d771810542..265983d5ad 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/SetMem64.nasm
@@ -37,17 +37,28 @@ ASM_PFX(InternalMemSetMem64):
add rdx, 8
dec rcx
.0:
- shr rcx, 1
+ push rbx
+ mov rbx, rcx
+ and rbx, 7
+ shr rcx, 3
jz @SetQwords
movlhps xmm0, xmm0
.1:
movntdq [rdx], xmm0
- lea rdx, [rdx + 16]
+ movntdq [rdx + 16], xmm0
+ movntdq [rdx + 32], xmm0
+ movntdq [rdx + 48], xmm0
+ lea rdx, [rdx + 64]
loop .1
mfence
@SetQwords:
- jnc .2
- mov [rdx], r8
+ push rdi
+ mov rcx, rbx
+ mov rax, r8
+ mov rdi, rdx
+ rep stosq
+ pop rdi
.2:
+ pop rbx
ret

diff --git a/MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm b/MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm
index 5ddcae9ca5..21f504e3b7 100644
--- a/MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm
+++ b/MdePkg/Library/BaseMemoryLibSse2/X64/ZeroMem.nasm
@@ -32,7 +32,7 @@ ASM_PFX(InternalMemZeroMem):
xor rcx, rcx
xor eax, eax
sub rcx, rdi
- and rcx, 15
+ and rcx, 63
mov r8, rdi
jz .0
cmp rcx, rdx
@@ -41,13 +41,16 @@ ASM_PFX(InternalMemZeroMem):
rep stosb
.0:
mov rcx, rdx
- and edx, 15
- shr rcx, 4
+ and edx, 63
+ shr rcx, 6
jz @ZeroBytes
pxor xmm0, xmm0
.1:
- movntdq [rdi], xmm0 ; rdi should be 16-byte aligned
- add rdi, 16
+ movntdq [rdi], xmm0
+ movntdq [rdi + 16], xmm0
+ movntdq [rdi + 32], xmm0
+ movntdq [rdi + 48], xmm0
+ add rdi, 64
loop .1
mfence
@ZeroBytes:
--
2.25.3


Re: [PATCH v1 1/1] ShellPkg/UefiShellAcpiViewCommandLib: acpi version update for GTDT

Shashi Mallela
 

Hi Lief,

The macro has only been updated to reflect the latest ACPI version 6.3 and stay in sync with the edk2-platform gtdt updates made for sbsa platform
based on the same ACPI version 6.3.

Thanks
Shashi


Re: [PATCH v1 1/1] ShellPkg/UefiShellAcpiViewCommandLib: acpi version update for GTDT

Shashi Mallela
 

Hi Lief,

The macro is only updated to reflect the latest ACPI version being considered for GTDT.Since i had updated the edk2-platform code to use the latest structure definitions from EFI_ACPI_6_3,did the same
here for version number consistency.

Thanks
Shashi


回复: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".

gaoliming
 

The pull request needs rebase. I will submit new pull request today.

Thanks
Liming

-----邮件原件-----
发件人: Liu, Zhiguang <zhiguang.liu@...>
发送时间: 2020年10月10日 8:49
收件人: gaoliming <gaoliming@...>; devel@edk2.groups.io
抄送: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Gao, Zhichao <zhichao.gao@...>;
'Sean Brogan' <spbrogan@...>
主题: RE: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5
definitions".

Hi Liming

In pull request https://github.com/tianocore/edk2/pull/996
Merge failed because
tanocore.PatchCheck Failing after 34s — Build #20201009.4 failed

Detail:
The commit message format is not valid:
* Missing Signed-off-by! (Note: this must be added by the code contributor!)
https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-For
mat

However, I abstract the patch from Outlook and run PatchCheck to check it in
my local machine, the result is ok.

Detail:
E:\edk2\BaseTools\Scripts>py PatchCheck.py
0001-MdePkg-SMBIOS-3.4.0-Update-adding-DDR5-definitions-.patch
Checking patch file:
0001-MdePkg-SMBIOS-3.4.0-Update-adding-DDR5-definitions-.patch
[PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".
The commit message format passed all checks.
The code passed all checks.

Do you know why?

Thanks
Zhiguang
-----Original Message-----
From: gaoliming <gaoliming@...>
Sent: Friday, October 9, 2020 5:21 PM
To: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@...>
Cc: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Gao, Zhichao <zhichao.gao@...>;
'Sean
Brogan' <spbrogan@...>
Subject: 回复: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5 definitions".

https://github.com/tianocore/edk2/pull/996 is created.

-----邮件原件-----
发件人: bounce+27952+66054+4905953+8761045@groups.io
<bounce+27952+66054+4905953+8761045@groups.io> 代表 Zhiguang
Liu
发送时间: 2020年10月9日 15:24
收件人: devel@edk2.groups.io; gaoliming@...
抄送: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Gao, Zhichao <zhichao.gao@...>;
Sean Brogan <spbrogan@...>
主题: Re: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding
DDR5
definitions".

Hi Liming,
This patch also gets R-B from Sean Brogan.
Please help merge this patch.

Thanks
Zhiguang

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
gaoliming
Sent: Wednesday, September 30, 2020 8:45 AM
To: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@...>
Cc: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>
Subject: 回复: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5 definitions".

Reviewed-by: Liming Gao <gaoliming@...>

-----邮件原件-----
发件人: bounce+27952+65712+4905953+8761045@groups.io
<bounce+27952+65712+4905953+8761045@groups.io> 代表
Zhiguang
Liu
发送时间: 2020年9月29日 16:12
收件人: devel@edk2.groups.io; Liu, Zhiguang
<zhiguang.liu@...>
抄送: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Liming Gao
<gaoliming@...>
主题: Re: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5
definitions".


Reviewed-by: Zhiguang Liu <zhiguang.liu@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
Zhiguang
Liu
Sent: Tuesday, September 29, 2020 4:09 PM
To: devel@edk2.groups.io
Cc: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Liming Gao
<gaoliming@...>
Subject: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5 definitions".

From: "Wang, Sanyo" <sanyo.wang@...>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2352

SMBIOS 3.4 spec adds new memory device types (DDR5, LPDDR5)

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Liming Gao <gaoliming@...>
Cc: Zhiguang Liu <zhiguang.liu@...>
Signed-off-by: Sanyo Wang <sanyo.wang@...>
---
MdePkg/Include/IndustryStandard/SmBios.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
b/MdePkg/Include/IndustryStandard/SmBios.h
index ea23685851..f2db11f947 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1718,7 +1718,9 @@ typedef enum {
MemoryTypeLpddr4 = 0x1E,

MemoryTypeLogicalNonVolatileDevice = 0x1F,

MemoryTypeHBM = 0x20,

- MemoryTypeHBM2 = 0x21

+ MemoryTypeHBM2 = 0x21,

+ MemoryTypeDdr5 = 0x22,

+ MemoryTypeLpddr5 = 0x23

} MEMORY_DEVICE_TYPE;



///

--
2.25.1.windows.1



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Re: [edk2-rfc] [edk2-devel] [RFC] Support Both MM Traditional and Standalone Drivers with One MM Core

Siyuan, Fu
 

Hi, Jiewen/Laszlo

Thanks for your comments on this.

Hi, Ard/Sami/Supreeth

Since ARM based platforms are currently the major user of the MM Core in StandaloneMmPkg, I would like to hear you idea about this change. Do you have any concern about adding MM Traditional driver support to the Standalone MM Core?

Best Regards
Siyuan

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Laszlo Ersek
Sent: 2020年10月9日 21:08
To: Yao, Jiewen <jiewen.yao@...>; rfc@edk2.groups.io;
devel@edk2.groups.io; Fu, Siyuan <siyuan.fu@...>
Cc: Dong, Eric <eric.dong@...>; Ni, Ray <ray.ni@...>;
ard.biesheuvel@...; sami.mujawar@...;
supreeth.venkatesh@...
Subject: Re: [edk2-rfc] [edk2-devel] [RFC] Support Both MM Traditional and
Standalone Drivers with One MM Core

On 10/09/20 14:23, Yao, Jiewen wrote:
IMHO, StandaloneMm (in StandaloneMmPkg) should be the long term
direction to replace the traditional MM (in MdeModulePkg).

If we want to do some enhancement, I prefer #2 to update the one in
StandaloneMmPkg.
Once we retire transitional MM, we can delete the PiSmmCore in
MdeModulePkg.

This is a good idea -- when we think we are ready to retire PiSmmCore in
MdeModulePkg, because we think that StandaloneMmPkg can fully replace
it, platforms can evaluate the latter (hopefully with some simple DSC /
FDF modifications), and report back whether they see regressions or
whether StandaloneMmPkg behaves as a drop-in replacement indeed, for
PiSmmCore in MdeModulePkg.

Thanks
Laszlo


If we choose #1, the EDKII will have two standaloneMm Cores (the one in
StandaloneMmPkg and the one in MdeModulePkg), which may bring lots of
confusing and we may need merge them later.

Thank you
Yao Jiewen

-----Original Message-----
From: rfc@edk2.groups.io <rfc@edk2.groups.io> On Behalf Of Laszlo Ersek
Sent: Friday, October 9, 2020 7:56 PM
To: devel@edk2.groups.io; Fu, Siyuan <siyuan.fu@...>;
rfc@edk2.groups.io
Cc: Dong, Eric <eric.dong@...>; Ni, Ray <ray.ni@...>;
ard.biesheuvel@...; sami.mujawar@...; Yao, Jiewen
<jiewen.yao@...>; supreeth.venkatesh@...
Subject: Re: [edk2-rfc] [edk2-devel] [RFC] Support Both MM Traditional and
Standalone Drivers with One MM Core

On 10/09/20 07:22, Siyuan, Fu wrote:
Hi, All

This email is to collect feedback about making one common EDK2 MM Core
driver to support both MM Traditional drivers and MM Standalone drivers.

We know that PI Spec defines two types of MM-related drivers: MM
Traditional Drivers and MM Standalone Drivers. There are two MM Core
modules exist in EDK2 but each of them can only support one single type of
MM
drivers:
- PiSmmCore in MdeModulePkg supports MM Traditional driver dispatch.
It
doesn't have FV parsing logic and relies on EFI Firmware Volume2 Protocol
for
driver discovery. It doesn't support MM Standalone driver.
- StandaloneMmCore in StandaloneMmPkg supports MM Standalone
driver
dispatch. It has FV parsing and decompress logic but only limited to one single
firmware volume (called standalone BFV in code). It doesn't support MM
Traditional driver.

However, a platform may want to have both of the two types of MM drivers
coexist in its firmware, for example, when it tries to transfer from Traditional
MM mode to Standalone MM mode, in a stage by stage manner. However,
it's
not possible with current EDK2 MM Core because of above limitations. Thus,
here we propose to have a common MM Core module in EDK2, which could:
- Support both MM Traditional drivers and MM Standalone drivers.
- Use shared Depex evaluation when dispatching all the MM drivers.
- Use a shared MM System Table when invoking all the MM drivers' entry
point, which mean handle/protocol database is shared.
- Have self-contained FV parsing and driver discovery capability.

We realized there could be 2 possible options to make this happen:
- Option 1: Update the MdeModulePkg Core. In this approach, we will
need
to add the FV decompress, driver discovery and MM Standalone driver
dispatcher to the PiSmmCore module in MdeModulePkg.
- Option 2: Update the StandaloneMmPkg Core. Which means adding MM
Traditional dispatcher and multiple FV support to existing standalone Core in
StandaloneMmPkg. Will also need to add PEI/DXE IPL module to invoke the
Standalone MM Core and pass UEFI System Table to it.

The option 1 will have less impact to those platforms which only use MM
Standalone drivers currently, because those platforms can stay with the
unchanged Standalone MM Core. While option 2 looks more like a clean
solution because it could support all the cases (Traditional MM only,
Standalone
MM only, and mix-used platform). So I'd like to hear the community's
feedback
about which option is preferred, and let me know if you have any concerns
with
this change. Thanks!

Which method is the least risky with regard to regressions, in your opinion?

I tend to prefer #2. Either option is neutral for ArmVirtPkg at the
moment, and option#2 is safer for OvmfPkg (no risk of regression). Thus
far, there has not been any need (that I know of) for OVMF to support
standalone MM drivers.

Furthermore, if we wanted to add Management Mode support to ArmVirtPkg
at some (later) point, I believe (?) we'd just use StandaloneMmPkg right
from the start.

I.e., from my perspective, mixing MM module types, for some kind of
transition for a platform from one MM mode to another, is not
immediately useful; so my goal is to minimize the risk of regressions.

Thanks
Laszlo








Re: [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".

Zhiguang Liu
 

Hi Liming

In pull request https://github.com/tianocore/edk2/pull/996
Merge failed because
tanocore.PatchCheck Failing after 34s — Build #20201009.4 failed

Detail:
The commit message format is not valid:
* Missing Signed-off-by! (Note: this must be added by the code contributor!)
https://github.com/tianocore/tianocore.github.io/wiki/Commit-Message-Format

However, I abstract the patch from Outlook and run PatchCheck to check it in my local machine, the result is ok.

Detail:
E:\edk2\BaseTools\Scripts>py PatchCheck.py 0001-MdePkg-SMBIOS-3.4.0-Update-adding-DDR5-definitions-.patch
Checking patch file: 0001-MdePkg-SMBIOS-3.4.0-Update-adding-DDR5-definitions-.patch
[PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5 definitions".
The commit message format passed all checks.
The code passed all checks.

Do you know why?

Thanks
Zhiguang

-----Original Message-----
From: gaoliming <gaoliming@...>
Sent: Friday, October 9, 2020 5:21 PM
To: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@...>
Cc: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Gao, Zhichao <zhichao.gao@...>; 'Sean
Brogan' <spbrogan@...>
Subject: 回复: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding
DDR5 definitions".

https://github.com/tianocore/edk2/pull/996 is created.

-----邮件原件-----
发件人: bounce+27952+66054+4905953+8761045@groups.io
<bounce+27952+66054+4905953+8761045@groups.io> 代表 Zhiguang Liu
发送时间: 2020年10月9日 15:24
收件人: devel@edk2.groups.io; gaoliming@...
抄送: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Gao, Zhichao <zhichao.gao@...>;
Sean Brogan <spbrogan@...>
主题: Re: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding DDR5
definitions".

Hi Liming,
This patch also gets R-B from Sean Brogan.
Please help merge this patch.

Thanks
Zhiguang

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
gaoliming
Sent: Wednesday, September 30, 2020 8:45 AM
To: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@...>
Cc: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>
Subject: 回复: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5 definitions".

Reviewed-by: Liming Gao <gaoliming@...>

-----邮件原件-----
发件人: bounce+27952+65712+4905953+8761045@groups.io
<bounce+27952+65712+4905953+8761045@groups.io> 代表 Zhiguang
Liu
发送时间: 2020年9月29日 16:12
收件人: devel@edk2.groups.io; Liu, Zhiguang <zhiguang.liu@...>
抄送: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Liming Gao
<gaoliming@...>
主题: Re: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update "adding
DDR5
definitions".


Reviewed-by: Zhiguang Liu <zhiguang.liu@...>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of
Zhiguang
Liu
Sent: Tuesday, September 29, 2020 4:09 PM
To: devel@edk2.groups.io
Cc: Wang, Sanyo <sanyo.wang@...>; Kinney, Michael D
<michael.d.kinney@...>; Liming Gao
<gaoliming@...>
Subject: [edk2-devel] [PATCH] MdePkg: SMBIOS 3.4.0 Update
"adding
DDR5 definitions".

From: "Wang, Sanyo" <sanyo.wang@...>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2352

SMBIOS 3.4 spec adds new memory device types (DDR5, LPDDR5)

Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Liming Gao <gaoliming@...>
Cc: Zhiguang Liu <zhiguang.liu@...>
Signed-off-by: Sanyo Wang <sanyo.wang@...>
---
MdePkg/Include/IndustryStandard/SmBios.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/MdePkg/Include/IndustryStandard/SmBios.h
b/MdePkg/Include/IndustryStandard/SmBios.h
index ea23685851..f2db11f947 100644
--- a/MdePkg/Include/IndustryStandard/SmBios.h
+++ b/MdePkg/Include/IndustryStandard/SmBios.h
@@ -1718,7 +1718,9 @@ typedef enum {
MemoryTypeLpddr4 = 0x1E,

MemoryTypeLogicalNonVolatileDevice = 0x1F,

MemoryTypeHBM = 0x20,

- MemoryTypeHBM2 = 0x21

+ MemoryTypeHBM2 = 0x21,

+ MemoryTypeDdr5 = 0x22,

+ MemoryTypeLpddr5 = 0x23

} MEMORY_DEVICE_TYPE;



///

--
2.25.1.windows.1



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回复: [edk2-devel] 回复: [Patch V5 1/1] Tools\FitGen: Add extra parameter to input the Top Flash Address

gaoliming
 

Merge @ 4a53dbd24e11332767a1c20577f260bfb6feb702 on edk2-platforms.

-----邮件原件-----
发件人: bounce+27952+66060+4905953+8761045@groups.io
<bounce+27952+66060+4905953+8761045@groups.io> 代表 gaoliming
发送时间: 2020年10月9日 18:02
收件人: 'cbduggap' <chinni.b.duggapu@...>; devel@edk2.groups.io
抄送: 'Bob Feng' <bob.c.feng@...>
主题: [edk2-devel] 回复: [Patch V5 1/1] Tools\FitGen: Add extra parameter
to input the Top Flash Address

Reviewed-by: Liming Gao <gaoliming@...>

-----邮件原件-----
发件人: cbduggap <chinni.b.duggapu@...>
发送时间: 2020年10月5日 22:13
收件人: devel@edk2.groups.io
抄送: cbduggap <chinni.b.duggapu@...>; Bob Feng
<bob.c.feng@...>; Liming Gao <gaoliming@...>
主题: [Patch V5 1/1] Tools\FitGen: Add extra parameter to input the Top
Flash
Address

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=2981

Add extra parameter to the Fit Gen Tool to input the Top Flash Address.
Default Address should be 4GB and if some one inputs new address,
tool must consume that address instead of Default address (4GB).

Signed-off-by: cbduggap <chinni.b.duggapu@...>
Cc: Bob Feng <bob.c.feng@...>
Cc: Liming Gao <gaoliming@...>

Signed-off-by: cbduggap <chinni.b.duggapu@...>
---
Silicon/Intel/Tools/FitGen/FitGen.c | 23 +++++++++++++++++++++--
1 file changed, 21 insertions(+), 2 deletions(-)

diff --git a/Silicon/Intel/Tools/FitGen/FitGen.c
b/Silicon/Intel/Tools/FitGen/FitGen.c
index c4006e69c8..cb60a3c324 100644
--- a/Silicon/Intel/Tools/FitGen/FitGen.c
+++ b/Silicon/Intel/Tools/FitGen/FitGen.c
@@ -209,10 +209,12 @@ typedef struct {
#define DEFAULT_FIT_TABLE_POINTER_OFFSET 0x40

#define DEFAULT_FIT_ENTRY_VERSION 0x0100



+#define TOP_FLASH_ADDRESS
(gFitTableContext.TopFlashAddressRemapValue)

+

#define MEMORY_TO_FLASH(FileBuffer, FvBuffer, FvSize) \

- (UINTN)(0x100000000 - ((UINTN)(FvBuffer) +
(UINTN)(FvSize) - (UINTN)(FileBuffer)))

+ (UINTN)(TOP_FLASH_ADDRESS - ((UINTN)(FvBuffer) +
(UINTN)(FvSize) - (UINTN)(FileBuffer)))

#define FLASH_TO_MEMORY(Address, FvBuffer, FvSize) \

- (VOID *)(UINTN)((UINTN)(FvBuffer) + (UINTN)(FvSize)
-
(0x100000000 - (UINTN)(Address)))

+ (VOID *)(UINTN)((UINTN)(FvBuffer) + (UINTN)(FvSize)
-
(TOP_FLASH_ADDRESS - (UINTN)(Address)))



#define FIT_TABLE_TYPE_HEADER 0

#define FIT_TABLE_TYPE_MICROCODE 1

@@ -268,6 +270,7 @@ typedef struct {
UINT32 MicrocodeVersion;

FIT_TABLE_CONTEXT_ENTRY
OptionalModule[MAX_OPTIONAL_ENTRY];

FIT_TABLE_CONTEXT_ENTRY PortModule[MAX_PORT_ENTRY];

+ UINT64 TopFlashAddressRemapValue;

} FIT_TABLE_CONTEXT;



FIT_TABLE_CONTEXT gFitTableContext = {0};

@@ -330,6 +333,7 @@ Returns:
"\t[-F <FitTablePointerOffset>] [-F <FitTablePointerOffset>]
[-V
<FitHeaderVersion>]\n"

"\t[-NA]\n"

"\t[-A <MicrocodeAlignment>]\n"

+ "\t[-REMAP <TopFlashAddress>\n"

"\t[-CLEAR]\n"

"\t[-L <MicrocodeSlotSize> <MicrocodeFfsGuid>]\n"

"\t[-I <BiosInfoGuid>]\n"

@@ -986,6 +990,21 @@ Returns:
Index += 2;

}



+ if ((Index >= argc) ||

+ ((strcmp (argv[Index], "-REMAP") == 0) ||

+ (strcmp (argv[Index], "-remap") == 0)) ) {

+ //

+ // by pass

+ //

+ gFitTableContext.TopFlashAddressRemapValue = xtoi (argv[Index +
1]);

+ Index += 2;

+ } else {

+ //

+ // no remapping

+ //

+ gFitTableContext.TopFlashAddressRemapValue = 0x100000000;

+ }

+ printf ("Top Flash Address Value : 0x%llx\n",
gFitTableContext.TopFlashAddressRemapValue);

//

// 0.4 Clear FIT table related memory

//

--
2.26.2.windows.1






回复: [edk2-devel] [PATCH] IntelFsp2Pkg/GenCfgOpt: skip unnecessarily header/BSF recreating.

gaoliming
 

Chasel:
This change fixes the issue reported in BZ 2967. Reviewed-by: Liming Gao
<gaoliming@...>

Thanks
Liming
-----邮件原件-----
发件人: bounce+27952+65775+4905953+8761045@groups.io
<bounce+27952+65775+4905953+8761045@groups.io> 代表 Chiu, Chasel
发送时间: 2020年10月1日 10:12
收件人: devel@edk2.groups.io
抄送: Chasel Chiu <chasel.chiu@...>; Maurice Ma
<maurice.ma@...>; Nate DeSimone
<nathaniel.l.desimone@...>; Star Zeng <star.zeng@...>
主题: [edk2-devel] [PATCH] IntelFsp2Pkg/GenCfgOpt: skip unnecessarily
header/BSF recreating.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2967

When no change in FSP UPD DSC files, GenCfgOpt.py should skip
recreating UPD header and BSF files.
This patch added a check to handle this case.

Cc: Maurice Ma <maurice.ma@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Star Zeng <star.zeng@...>
Signed-off-by: Chasel Chiu <chasel.chiu@...>
---
IntelFsp2Pkg/Tools/GenCfgOpt.py | 60
++++++++++++++++++++++++++++++++++++++++++------------------
1 file changed, 42 insertions(+), 18 deletions(-)

diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py
b/IntelFsp2Pkg/Tools/GenCfgOpt.py
index bcced590ce..af7e14a10a 100644
--- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
+++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
@@ -810,6 +810,17 @@ EndList
SubItem['value'] = valuestr

return Error



+ def NoDscFileChange (self, OutPutFile):

+ NoFileChange = True

+ if not os.path.exists(OutPutFile):

+ NoFileChange = False

+ else:

+ DscTime = os.path.getmtime(self._DscFile)

+ OutputTime = os.path.getmtime(OutPutFile)

+ if DscTime > OutputTime:

+ NoFileChange = False

+ return NoFileChange

+

def CreateSplitUpdTxt (self, UpdTxtFile):

GuidList =
['FSP_T_UPD_TOOL_GUID','FSP_M_UPD_TOOL_GUID','FSP_S_UPD_TOOL_G
UID']

SignatureList = ['0x545F', '0x4D5F','0x535F'] # _T, _M,
and _S signature for FSPT, FSPM, FSPS

@@ -823,16 +834,7 @@ EndList
if UpdTxtFile == '':

UpdTxtFile = os.path.join(FvDir,
self._MacroDict[GuidList[Index]] + '.txt')



- ReCreate = False

- if not os.path.exists(UpdTxtFile):

- ReCreate = True

- else:

- DscTime = os.path.getmtime(self._DscFile)

- TxtTime = os.path.getmtime(UpdTxtFile)

- if DscTime > TxtTime:

- ReCreate = True

-

- if not ReCreate:

+ if (self.NoDscFileChange (UpdTxtFile)):

# DSC has not been modified yet

# So don't have to re-generate other files

self.Error = 'No DSC file change, skip to create UPD TXT
file'

@@ -1056,7 +1058,11 @@ EndList
HeaderFile = os.path.join(FvDir, HeaderFileName)



# Check if header needs to be recreated

- ReCreate = False

+ if (self.NoDscFileChange (HeaderFile)):

+ # DSC has not been modified yet

+ # So don't have to re-generate other files

+ self.Error = 'No DSC file change, skip to create UPD header
file'

+ return 256



TxtBody = []

for Item in self._CfgItemList:

@@ -1382,6 +1388,12 @@ EndList
self.Error = "BSF output file '%s' is invalid" % BsfFile

return 1



+ if (self.NoDscFileChange (BsfFile)):

+ # DSC has not been modified yet

+ # So don't have to re-generate other files

+ self.Error = 'No DSC file change, skip to create UPD BSF
file'

+ return 256

+

Error = 0

OptionDict = {}

BsfFd = open(BsfFile, "w")

@@ -1467,7 +1479,7 @@ EndList




def Usage():

- print ("GenCfgOpt Version 0.55")

+ print ("GenCfgOpt Version 0.56")

print ("Usage:")

print (" GenCfgOpt UPDTXT PlatformDscFile BuildFvDir
[-D Macros]")

print (" GenCfgOpt HEADER PlatformDscFile BuildFvDir
InputHFile [-D Macros]")

@@ -1529,13 +1541,25 @@ def Main():
print ("ERROR: %s !" % (GenCfgOpt.Error))

return Ret

elif sys.argv[1] == "HEADER":

- if GenCfgOpt.CreateHeaderFile(OutFile) != 0:

- print ("ERROR: %s !" % GenCfgOpt.Error)

- return 8

+ Ret = GenCfgOpt.CreateHeaderFile(OutFile)

+ if Ret != 0:

+ # No change is detected

+ if Ret == 256:

+ print ("INFO: %s !" % (GenCfgOpt.Error))

+ else :

+ print ("ERROR: %s !" % (GenCfgOpt.Error))

+ return 8

+ return Ret

elif sys.argv[1] == "GENBSF":

- if GenCfgOpt.GenerateBsfFile(OutFile) != 0:

- print ("ERROR: %s !" % GenCfgOpt.Error)

- return 9

+ Ret = GenCfgOpt.GenerateBsfFile(OutFile)

+ if Ret != 0:

+ # No change is detected

+ if Ret == 256:

+ print ("INFO: %s !" % (GenCfgOpt.Error))

+ else :

+ print ("ERROR: %s !" % (GenCfgOpt.Error))

+ return 9

+ return Ret

else:

if argc < 5:

Usage()

--
2.28.0.windows.1



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EdkRepo Preview Release 2020-10-09

Nate DeSimone
 

Hi Everyone,

I have updated the pre-built EdkRepo binaries on my GitHub fork:

https://github.com/nate-desimone/edk2-staging/releases/tag/EdkRepo-preview-2020-10-09

They are gotten quite stale since the last build. Hopefully this will be helpful to those interested in giving some of the newer EdkRepo features a try!

Thanks,
Nate


Re: [edk2-staging/EdkRepo] [PATCH v2] EdkRepo: Adding performance option

Nate DeSimone
 

-----Original Message-----
From: Erik Bjorge <erik.c.bjorge@...>
Sent: Monday, October 5, 2020 2:55 PM
To: devel@edk2.groups.io
Cc: Desimone, Ashley E <ashley.e.desimone@...>; Desimone,
Nathaniel L <nathaniel.l.desimone@...>; Pandya, Puja
<puja.pandya@...>; Bret Barkelew <Bret.Barkelew@...>;
Agyeman, Prince <prince.agyeman@...>
Subject: [edk2-staging/EdkRepo] [PATCH v2] EdkRepo: Adding performance
option

This new option will display the execution time of a successful command.

Cc: Ashley E Desimone <ashley.e.desimone@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Puja Pandya <puja.pandya@...>
Cc: Bret Barkelew <Bret.Barkelew@...>
Cc: Prince Agyeman <prince.agyeman@...>
Cc: Erik Bjorge <erik.c.bjorge@...>
Signed-off-by: Erik Bjorge <erik.c.bjorge@...>
---
edkrepo/commands/arguments/edkrepo_cmd_args.py | 3 ++-
edkrepo/commands/composite_command.py | 4 +++-
edkrepo/commands/edkrepo_command.py | 7 ++++++-
edkrepo/edkrepo_cli.py | 4 ++++
4 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/edkrepo/commands/arguments/edkrepo_cmd_args.py
b/edkrepo/commands/arguments/edkrepo_cmd_args.py
index e8a6138..2fab8c1 100644
--- a/edkrepo/commands/arguments/edkrepo_cmd_args.py
+++ b/edkrepo/commands/arguments/edkrepo_cmd_args.py
@@ -3,7 +3,7 @@
## @file
# argument_strings.py
#
-# Copyright (c) 2017- 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017- 2020, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent #

@@ -17,3 +17,4 @@ OVERRIDE_HELP = 'Ignore warnings'
SUBMODULE_SKIP_HELP = 'Skip the pull or sync of any submodules.'
COLOR_HELP = 'Force color output (useful with \'less -r\')'
SOURCE_MANIFEST_REPO_HELP = "The name of the workspace's source
global manifest repository"
+PERFORMANCE_HELP = 'Displays performance timing data for successful
commands'
diff --git a/edkrepo/commands/composite_command.py
b/edkrepo/commands/composite_command.py
index ff53d3b..72cb029 100644
--- a/edkrepo/commands/composite_command.py
+++ b/edkrepo/commands/composite_command.py
@@ -7,7 +7,8 @@
# SPDX-License-Identifier: BSD-2-Clause-Patent #

-from edkrepo.commands.edkrepo_command import VerboseArgument
+from edkrepo.commands.edkrepo_command import VerboseArgument,
+PerformanceArgument
+

class CompositeCommand(object):
def __init__(self):
@@ -21,6 +22,7 @@ class CompositeCommand(object):
if command.get_metadata()['name'] == command_name:
metadata = command.get_metadata()
args = metadata['arguments']
+ args.append(PerformanceArgument)
args.append(VerboseArgument)
metadata['arguments'] = args
return metadata
diff --git a/edkrepo/commands/edkrepo_command.py
b/edkrepo/commands/edkrepo_command.py
index edd29a9..320dd9c 100644
--- a/edkrepo/commands/edkrepo_command.py
+++ b/edkrepo/commands/edkrepo_command.py
@@ -3,7 +3,7 @@
## @file
# edkrepo_command.py
#
-# Copyright (c) 2017- 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017- 2020, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent #

@@ -54,3 +54,8 @@ SourceManifestRepoArgument = {'name' : 'source-
manifest-repo',
'required' : False,
'action' : 'store',
'help-text' : arguments.SOURCE_MANIFEST_REPO_HELP}
+
+PerformanceArgument = {'name': 'performance',
+ 'positional': False,
+ 'required': False,
+ 'help-text': arguments.PERFORMANCE_HELP}
diff --git a/edkrepo/edkrepo_cli.py b/edkrepo/edkrepo_cli.py index
03061c9..4e7ff16 100644
--- a/edkrepo/edkrepo_cli.py
+++ b/edkrepo/edkrepo_cli.py
@@ -20,6 +20,7 @@ import site
import inspect
import imp
import importlib.util
+import datetime as dt

from git.exc import GitCommandError

@@ -157,6 +158,7 @@ def
generate_command_completion_script(script_filename, parser):
f.write(' complete -F _edkrepo_completions edkrepo\nfi\n')

def main():
+ start_time = dt.datetime.now()
command = command_factory.create_composite_command()
config = {}
try:
@@ -207,6 +209,8 @@ def main():
traceback.print_exc()
print("Error: {}".format(str(e)))
return 1
+ if parsed_args.performance:
+ print('\nExecution Time: {}'.format(dt.datetime.now() -
+ start_time))
return 0

if __name__ == "__main__":
--
2.21.0.windows.1


Re: [edk2-staging/EdkRepo] [PATCH v2] EdkRepo: Adding performance option

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: Erik Bjorge <erik.c.bjorge@...>
Sent: Monday, October 5, 2020 2:55 PM
To: devel@edk2.groups.io
Cc: Desimone, Ashley E <ashley.e.desimone@...>; Desimone,
Nathaniel L <nathaniel.l.desimone@...>; Pandya, Puja
<puja.pandya@...>; Bret Barkelew <Bret.Barkelew@...>;
Agyeman, Prince <prince.agyeman@...>
Subject: [edk2-staging/EdkRepo] [PATCH v2] EdkRepo: Adding performance
option

This new option will display the execution time of a successful command.

Cc: Ashley E Desimone <ashley.e.desimone@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Puja Pandya <puja.pandya@...>
Cc: Bret Barkelew <Bret.Barkelew@...>
Cc: Prince Agyeman <prince.agyeman@...>
Cc: Erik Bjorge <erik.c.bjorge@...>
Signed-off-by: Erik Bjorge <erik.c.bjorge@...>
---
edkrepo/commands/arguments/edkrepo_cmd_args.py | 3 ++-
edkrepo/commands/composite_command.py | 4 +++-
edkrepo/commands/edkrepo_command.py | 7 ++++++-
edkrepo/edkrepo_cli.py | 4 ++++
4 files changed, 15 insertions(+), 3 deletions(-)

diff --git a/edkrepo/commands/arguments/edkrepo_cmd_args.py
b/edkrepo/commands/arguments/edkrepo_cmd_args.py
index e8a6138..2fab8c1 100644
--- a/edkrepo/commands/arguments/edkrepo_cmd_args.py
+++ b/edkrepo/commands/arguments/edkrepo_cmd_args.py
@@ -3,7 +3,7 @@
## @file
# argument_strings.py
#
-# Copyright (c) 2017- 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017- 2020, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent #

@@ -17,3 +17,4 @@ OVERRIDE_HELP = 'Ignore warnings'
SUBMODULE_SKIP_HELP = 'Skip the pull or sync of any submodules.'
COLOR_HELP = 'Force color output (useful with \'less -r\')'
SOURCE_MANIFEST_REPO_HELP = "The name of the workspace's source
global manifest repository"
+PERFORMANCE_HELP = 'Displays performance timing data for successful
commands'
diff --git a/edkrepo/commands/composite_command.py
b/edkrepo/commands/composite_command.py
index ff53d3b..72cb029 100644
--- a/edkrepo/commands/composite_command.py
+++ b/edkrepo/commands/composite_command.py
@@ -7,7 +7,8 @@
# SPDX-License-Identifier: BSD-2-Clause-Patent #

-from edkrepo.commands.edkrepo_command import VerboseArgument
+from edkrepo.commands.edkrepo_command import VerboseArgument,
+PerformanceArgument
+

class CompositeCommand(object):
def __init__(self):
@@ -21,6 +22,7 @@ class CompositeCommand(object):
if command.get_metadata()['name'] == command_name:
metadata = command.get_metadata()
args = metadata['arguments']
+ args.append(PerformanceArgument)
args.append(VerboseArgument)
metadata['arguments'] = args
return metadata
diff --git a/edkrepo/commands/edkrepo_command.py
b/edkrepo/commands/edkrepo_command.py
index edd29a9..320dd9c 100644
--- a/edkrepo/commands/edkrepo_command.py
+++ b/edkrepo/commands/edkrepo_command.py
@@ -3,7 +3,7 @@
## @file
# edkrepo_command.py
#
-# Copyright (c) 2017- 2019, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2017- 2020, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent #

@@ -54,3 +54,8 @@ SourceManifestRepoArgument = {'name' : 'source-
manifest-repo',
'required' : False,
'action' : 'store',
'help-text' : arguments.SOURCE_MANIFEST_REPO_HELP}
+
+PerformanceArgument = {'name': 'performance',
+ 'positional': False,
+ 'required': False,
+ 'help-text': arguments.PERFORMANCE_HELP}
diff --git a/edkrepo/edkrepo_cli.py b/edkrepo/edkrepo_cli.py index
03061c9..4e7ff16 100644
--- a/edkrepo/edkrepo_cli.py
+++ b/edkrepo/edkrepo_cli.py
@@ -20,6 +20,7 @@ import site
import inspect
import imp
import importlib.util
+import datetime as dt

from git.exc import GitCommandError

@@ -157,6 +158,7 @@ def
generate_command_completion_script(script_filename, parser):
f.write(' complete -F _edkrepo_completions edkrepo\nfi\n')

def main():
+ start_time = dt.datetime.now()
command = command_factory.create_composite_command()
config = {}
try:
@@ -207,6 +209,8 @@ def main():
traceback.print_exc()
print("Error: {}".format(str(e)))
return 1
+ if parsed_args.performance:
+ print('\nExecution Time: {}'.format(dt.datetime.now() -
+ start_time))
return 0

if __name__ == "__main__":
--
2.21.0.windows.1


Re: [PATCH] IntelFsp2Pkg/GenCfgOpt: skip unnecessarily header/BSF recreating.

Nate DeSimone
 

Reviewed-by: Nate DeSimone <nathaniel.l.desimone@...>

-----Original Message-----
From: Chasel Chiu <chasel.chiu@...>
Sent: Wednesday, September 30, 2020 7:12 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Ma, Maurice
<maurice.ma@...>; Desimone, Nathaniel L
<nathaniel.l.desimone@...>; Zeng, Star <star.zeng@...>
Subject: [PATCH] IntelFsp2Pkg/GenCfgOpt: skip unnecessarily header/BSF
recreating.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2967

When no change in FSP UPD DSC files, GenCfgOpt.py should skip recreating
UPD header and BSF files.
This patch added a check to handle this case.

Cc: Maurice Ma <maurice.ma@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Star Zeng <star.zeng@...>
Signed-off-by: Chasel Chiu <chasel.chiu@...>
---
IntelFsp2Pkg/Tools/GenCfgOpt.py | 60
++++++++++++++++++++++++++++++++++++++++++------------------
1 file changed, 42 insertions(+), 18 deletions(-)

diff --git a/IntelFsp2Pkg/Tools/GenCfgOpt.py
b/IntelFsp2Pkg/Tools/GenCfgOpt.py index bcced590ce..af7e14a10a 100644
--- a/IntelFsp2Pkg/Tools/GenCfgOpt.py
+++ b/IntelFsp2Pkg/Tools/GenCfgOpt.py
@@ -810,6 +810,17 @@ EndList
SubItem['value'] = valuestr return Error + def NoDscFileChange
(self, OutPutFile):+ NoFileChange = True+ if not
os.path.exists(OutPutFile):+ NoFileChange = False+ else:+
DscTime = os.path.getmtime(self._DscFile)+ OutputTime =
os.path.getmtime(OutPutFile)+ if DscTime > OutputTime:+
NoFileChange = False+ return NoFileChange+ def CreateSplitUpdTxt
(self, UpdTxtFile): GuidList =
['FSP_T_UPD_TOOL_GUID','FSP_M_UPD_TOOL_GUID','FSP_S_UPD_TOOL_
GUID'] SignatureList = ['0x545F', '0x4D5F','0x535F'] # _T, _M, and _S
signature for FSPT, FSPM, FSPS@@ -823,16 +834,7 @@ EndList
if UpdTxtFile == '': UpdTxtFile = os.path.join(FvDir,
self._MacroDict[GuidList[Index]] + '.txt') - ReCreate = False- if not
os.path.exists(UpdTxtFile):- ReCreate = True- else:-
DscTime = os.path.getmtime(self._DscFile)- TxtTime =
os.path.getmtime(UpdTxtFile)- if DscTime > TxtTime:-
ReCreate = True-- if not ReCreate:+ if (self.NoDscFileChange
(UpdTxtFile)): # DSC has not been modified yet # So don't
have to re-generate other files self.Error = 'No DSC file change, skip
to create UPD TXT file'@@ -1056,7 +1058,11 @@ EndList
HeaderFile = os.path.join(FvDir, HeaderFileName) # Check if header
needs to be recreated- ReCreate = False+ if (self.NoDscFileChange
(HeaderFile)):+ # DSC has not been modified yet+ # So don't have
to re-generate other files+ self.Error = 'No DSC file change, skip to
create UPD header file'+ return 256 TxtBody = [] for Item in
self._CfgItemList:@@ -1382,6 +1388,12 @@ EndList
self.Error = "BSF output file '%s' is invalid" % BsfFile return 1 +
if (self.NoDscFileChange (BsfFile)):+ # DSC has not been modified yet+
# So don't have to re-generate other files+ self.Error = 'No DSC file
change, skip to create UPD BSF file'+ return 256+ Error = 0
OptionDict = {} BsfFd = open(BsfFile, "w")@@ -1467,7 +1479,7 @@
EndList
def Usage():- print ("GenCfgOpt Version 0.55")+ print ("GenCfgOpt
Version 0.56") print ("Usage:") print (" GenCfgOpt UPDTXT
PlatformDscFile BuildFvDir [-D Macros]") print (" GenCfgOpt
HEADER PlatformDscFile BuildFvDir InputHFile [-D Macros]")@@ -1529,13
+1541,25 @@ def Main():
print ("ERROR: %s !" % (GenCfgOpt.Error)) return Ret elif
sys.argv[1] == "HEADER":- if GenCfgOpt.CreateHeaderFile(OutFile) !=
0:- print ("ERROR: %s !" % GenCfgOpt.Error)- return 8+
Ret = GenCfgOpt.CreateHeaderFile(OutFile)+ if Ret != 0:+ # No
change is detected+ if Ret == 256:+ print ("INFO: %s !" %
(GenCfgOpt.Error))+ else :+ print ("ERROR: %s !" %
(GenCfgOpt.Error))+ return 8+ return Ret elif sys.argv[1]
== "GENBSF":- if GenCfgOpt.GenerateBsfFile(OutFile) != 0:-
print ("ERROR: %s !" % GenCfgOpt.Error)- return 9+ Ret =
GenCfgOpt.GenerateBsfFile(OutFile)+ if Ret != 0:+ # No change
is detected+ if Ret == 256:+ print ("INFO: %s !" %
(GenCfgOpt.Error))+ else :+ print ("ERROR: %s !" %
(GenCfgOpt.Error))+ return 9+ return Ret else: if
argc < 5: Usage()--
2.28.0.windows.1


Re: [edk2-staging/EdkRepo] [PATCH V3 0/2] EdkRepo: Add support for SUBST drives

Nate DeSimone
 

Series pushed: 0e3fb4b~..04b701e

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate
DeSimone
Sent: Friday, September 25, 2020 6:28 PM
To: devel@edk2.groups.io
Cc: Desimone, Ashley E <ashley.e.desimone@...>; Pandya, Puja
<puja.pandya@...>; Bret Barkelew <Bret.Barkelew@...>;
Agyeman, Prince <prince.agyeman@...>; Bjorge, Erik C
<erik.c.bjorge@...>
Subject: [edk2-devel] [edk2-staging/EdkRepo] [PATCH V3 0/2] EdkRepo: Add
support for SUBST drives

Changes in V3:
- Changed loop for finding subst drive to single if statement

Changes in V2:
- Changed get_subst_drive_list() to get_subst_drive_dict()

EdkRepo currently does not handle virtual drives created using the SUBST
command.
Specifically, when cloning or syncing a project to a subst drive the includeIf
statements that redirect submodule fetches to mirror servers will be
generated with the subst drive information. This causes git to not activate
the includeif since it specifies the subst path and not the actual path.

To resolve this, EdkRepo will now enumerate the virtual drives created by
SUBST and if the current workspace is on a SUBST virtual drive EdkRepo will
convert the workspace path to the path on the real volume.

Cc: Ashley E Desimone <ashley.e.desimone@...>
Cc: Puja Pandya <puja.pandya@...>
Cc: Bret Barkelew <Bret.Barkelew@...>
Cc: Prince Agyeman <prince.agyeman@...>
Cc: Erik Bjorge <erik.c.bjorge@...>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@...>

Nate DeSimone (2):
EdkRepo: Add function to enumerate subst drives
EdkRepo: Add support for subst drives

edkrepo/commands/clone_command.py | 8 +++++
edkrepo/common/pathfix.py | 50
++++++++++++++++++++++++++++++-
edkrepo/config/config_factory.py | 10 ++++++-
3 files changed, 66 insertions(+), 2 deletions(-)

--
2.27.0.windows.1





Re: [PATCH v2 1/2] CryptoPkg/OpensslLib: Add native instruction support for X64

Zurcher, Christopher J
 

Here is the error message:
[...]/OpensslLibX64/OUTPUT/X64/crypto/aes/aesni-mb-x86_64.iii:1746: error: symbol `..imagebase' undefined
[cut 18 lines]
[...]/OpensslLibX64/OUTPUT/X64/crypto/aes/aesni-mb-x86_64.iii:1775: error: symbol `..imagebase' undefined
GNUmakefile:3390: recipe for target '[...]OpensslLibX64/OUTPUT/X64/crypto/aes/aesni-mb-x86_64.obj' failed
make: *** [[...]/OpensslLibX64/OUTPUT/X64/crypto/aes/aesni-mb-x86_64.obj] Error 1

The functionality is described here in "7.6.1 win64: Writing Position-Independent Code" and "7.6.2 win64: Structured Exception Handling"
https://www.nasm.us/xdoc/2.13.02rc3/html/nasmdoc7.html

The x86_64 implementation in OpenSSL seems to assume that building with NASM guarantees a Windows toolchain and Windows execution environment.

Thanks,
Christopher Zurcher

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Laszlo Ersek
Sent: Friday, October 9, 2020 04:37
To: Zurcher, Christopher J <christopher.j.zurcher@...>;
devel@edk2.groups.io; Yao, Jiewen <jiewen.yao@...>; Jiang, Guomin
<guomin.jiang@...>
Cc: Wang, Jian J <jian.j.wang@...>; Lu, XiaoyuX <xiaoyux.lu@...>;
Ard Biesheuvel (ARM address) <ard.biesheuvel@...>
Subject: Re: [edk2-devel] [PATCH v2 1/2] CryptoPkg/OpensslLib: Add native
instruction support for X64

On 10/08/20 21:56, Zurcher, Christopher J wrote:
Laszlo, thanks for sharing this explanation and history. I have found that
in addition to the "common" declaration, OpenSSL's Structured Exception
Handling functionality also breaks the GCC build by including "wrt
..imagebase" statements. Since we cannot implement functional changes in the
current 1.1.1x versions of OpenSSL, my proposal is to go ahead with this
patch only supporting VS and LLVM toolchains for now.

Could you include the error message with the "wrt ..imagebase" string?

I found the string in "crypto/perlasm/x86_64-xlate.pl" but don't really
understand what it's about.

I'd just like us to make one attempt to resolve that problem; otherwise
personally I'm OK if this new feature is not enabled for GCC at first.

Thanks
Laszlo


Thanks,
Christopher Zurcher

-----Original Message-----
From: Laszlo Ersek <lersek@...>
Sent: Thursday, October 1, 2020 05:58
To: devel@edk2.groups.io; Zurcher, Christopher J
<christopher.j.zurcher@...>; Yao, Jiewen <jiewen.yao@...>;
Jiang,
Guomin <guomin.jiang@...>
Cc: Wang, Jian J <jian.j.wang@...>; Lu, XiaoyuX
<xiaoyux.lu@...>;
Ard Biesheuvel (ARM address) <ard.biesheuvel@...>
Subject: Re: [edk2-devel] [PATCH v2 1/2] CryptoPkg/OpensslLib: Add native
instruction support for X64

(refreshing Ard's address, comments below)

On 09/29/20 23:08, Zurcher, Christopher J wrote:
The GCC build fails with this error:

`OPENSSL_ia32cap_P' referenced in section `.text.OPENSSL_cpuid_setup'
of /tmp/ccIIRAYs.ltrans20.ltrans.o: defined in discarded section
`COMMON' of
/mnt/c/mssql/tiano/Build/OvmfX64/DEBUG_GCC5/X64/CryptoPkg/Library/OpensslLib/
OpensslLibX64/OUTPUT/OpensslLibX64.lib(x86_64cpuid.obj)

The code in question is here:
section .CRT$XCU rdata align=8
DQ OPENSSL_cpuid_setup

common OPENSSL_ia32cap_P 16
For the X64 arch, OPENSSL_cpuid_setup() is implemented in

CryptoPkg/Library/OpensslLib/openssl/crypto/cryptlib.c

It makes references to:

extern unsigned int OPENSSL_ia32cap_P[4];

The variable is defined in generated assembly source code.

There seem to be multiple generators (for various assemblers):

(1) crypto/perlasm/x86gas.pl -- likely for the GNU assembler:

my $tmp=".comm\t${nmdecor}OPENSSL_ia32cap_P,16";
(2) crypto/perlasm/x86nasm.pl -- likely for NASM:

${drdecor}common ${nmdecor}OPENSSL_ia32cap_P 16
(3) crypto/x86_64cpuid.pl -- likely for... ???

.comm OPENSSL_ia32cap_P,16,4
They all put the variable in the "common" section.

Tracking the NASM generator through a number of "git blame" commands,
I've ended up at historical commit 10e7d6d52650 ("Support for IA-32 SSE2
instruction set.", 2004-05-06). This commit introduced "OPENSSL_ia32cap"
at once in the common section -- see "crypto/perlasm/x86unix.pl".

Now, the NASM manual says the following about the common section:

6.7. 'COMMON': Defining Common Data Areas
=========================================

The 'COMMON' directive is used to declare _common variables_. A common
variable is much like a global variable declared in the uninitialized
data section, so that

common intvar 4

is similar in function to

global intvar
section .bss

intvar resd 1

The difference is that if more than one module defines the same
common variable, then at link time those variables will be _merged_, and
references to 'intvar' in all modules will point at the same piece of
memory.
The common section is a *really* bad idea for C language projects,
because if there are multiple external definitions of an object in a
program, then that should (per C language standard) prevent the
successful linking of the program, rather than undergo silent definition
merging.

This has caused actual, inexplicable bugs in edk2 -- identically named,
but differently sized, and entirely independently inteded, variables
with external linkage and static storage duration got silently merged,
rather than breaking the build. In the end, we tracked those down and
marked them all STATIC. But in order to prevent such nonsense in the
future, we also forbade the common section altogether. Let me find that
commit...

Yes, please see 214a3b79417f ("BaseTools GCC: avoid the use of COMMON
symbols", 2015-12-08).

So, my guess is that this interferes with OpenSSL's placing of
"OPENSSL_ia32cap_P" in the common section.

Without knowing more, I'd hazard that this is a bug in OpenSSL. Unless
they have a strong reason for it, I think we should try to contribute a
patch that removes "common".

The code should provide exactly one definition (in the generated
assembly source), provide one central (extern) declaration too, in a
header file, then let all users include the declaration via the header
file. The object file built from the generated assembly source should be
linked into each final executable.

For example, "CryptoPkg/Library/OpensslLib/openssl/crypto/cryptlib.c"
already correctly declares the variable as "extern".

Otherwise, as last resort, I guess we could attempt working it around by
adding back "-fcommon" to the OpensslLib build flags. :/

Thanks,
Laszlo