Date   

[PATCH edk2-platforms v2 7/9] Silicon/NXP: Add LX2160A Soc package

Pankaj Bansal
 

From: Pankaj Bansal <pankaj.bansal@...>

LX2160A is QorIq Layerscape multicore communications processor with
sixteen Arm Cortex-A72 cores.
This SOC is based on Layerscape Chassis v3.2.

Signed-off-by: Pankaj Bansal <pankaj.bansal@...>
---

Notes:
V2:
- No change

Silicon/NXP/LX2160A/LX2160A.dec | 13 ++++
Silicon/NXP/LX2160A/LX2160A.dsc.inc | 50 ++++++++++++
Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf | 27 +++++++
Silicon/NXP/LX2160A/Include/Soc.h | 38 ++++++++++
Silicon/NXP/LX2160A/Library/SocLib/SocLib.c | 80 ++++++++++++++++++++
5 files changed, 208 insertions(+)

diff --git a/Silicon/NXP/LX2160A/LX2160A.dec b/Silicon/NXP/LX2160A/LX2160A.dec
new file mode 100644
index 000000000000..50481c0f2ebd
--- /dev/null
+++ b/Silicon/NXP/LX2160A/LX2160A.dec
@@ -0,0 +1,13 @@
+# LX2160A.dec
+#
+# Copyright 2018, 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+ DEC_SPECIFICATION = 0x0001001A
+
+[Includes]
+ Include
diff --git a/Silicon/NXP/LX2160A/LX2160A.dsc.inc b/Silicon/NXP/LX2160A/LX2160A.dsc.inc
new file mode 100644
index 000000000000..af22b4dd973c
--- /dev/null
+++ b/Silicon/NXP/LX2160A/LX2160A.dsc.inc
@@ -0,0 +1,50 @@
+# LX2160A.dsc
+# LX2160A Soc package.
+#
+# Copyright 2018-2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+!include Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc
+
+[LibraryClasses.common]
+ SocLib|Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf
+
+ PL011UartLib|ArmPlatformPkg/Library/PL011UartLib/PL011UartLib.inf
+ SerialPortLib|ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+ PL011UartClockLib|Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+[PcdsDynamicDefault.common]
+ #
+ # ARM General Interrupt Controller
+ gArmTokenSpaceGuid.PcdGicDistributorBase|0x6000000
+ gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x6200000
+ gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0xC0C0000
+
+[PcdsFixedAtBuild.common]
+ gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x23A0000
+ gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2390000
+ gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|91
+
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultReceiveFifoDepth|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x21C0000
+
+[PcdsFeatureFlag]
+ gNxpQoriqLsTokenSpaceGuid.PcdI2cErratumA009203|TRUE
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+ ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf
+
+##
diff --git a/Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf
new file mode 100644
index 000000000000..421072b88019
--- /dev/null
+++ b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf
@@ -0,0 +1,27 @@
+# @file
+#
+# Copyright 2018-2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = SocLib
+ FILE_GUID = 3b233a6a-0ee1-42a3-a7f7-c285b5ba80dc
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = SocLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Silicon/NXP/Chassis3V2/Chassis3V2.dec
+ Silicon/NXP/LX2160A/LX2160A.dec
+ Silicon/NXP/NxpQoriqLs.dec
+
+[LibraryClasses]
+ ChassisLib
+ DebugLib
+
+[Sources.common]
+ SocLib.c
diff --git a/Silicon/NXP/LX2160A/Include/Soc.h b/Silicon/NXP/LX2160A/Include/Soc.h
new file mode 100644
index 000000000000..52674ee5f32c
--- /dev/null
+++ b/Silicon/NXP/LX2160A/Include/Soc.h
@@ -0,0 +1,38 @@
+/** @file
+
+ Copyright 2018-2020 NXP
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef SOC_H__
+#define SOC_H__
+
+#include <Chassis.h>
+
+/**
+ Soc Memory Map
+**/
+#define LX2160A_DRAM0_PHYS_ADDRESS (BASE_2GB)
+#define LX2160A_DRAM0_SIZE (SIZE_2GB)
+#define LX2160A_DRAM1_PHYS_ADDRESS (BASE_128GB + BASE_2GB)
+#define LX2160A_DRAM1_SIZE (SIZE_128GB - SIZE_2GB) // 126 GB
+#define LX2160A_DRAM2_PHYS_ADDRESS (BASE_256GB + BASE_128GB)
+#define LX2160A_DRAM2_SIZE (SIZE_128GB)
+
+#define LX2160A_CCSR_PHYS_ADDRESS (BASE_16MB)
+#define LX2160A_CCSR_SIZE (SIZE_256MB - SIZE_16MB) // 240MB
+
+#define LX2160A_FSPI0_PHYS_ADDRESS (BASE_512MB)
+#define LX2160A_FSPI0_SIZE (SIZE_256MB)
+
+#define LX2160A_DCFG_ADDRESS NXP_LAYERSCAPE_CHASSIS3V2_DCFG_ADDRESS
+
+/**
+ Reset Control Word (RCW) Bits
+**/
+#define SYS_PLL_RAT(x) (((x) & 0x7c) >> 2) // Bits 2-6
+
+typedef NXP_LAYERSCAPE_CHASSIS3V2_DEVICE_CONFIG LX2160A_DEVICE_CONFIG;
+
+#endif // SOC_H__
diff --git a/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c
new file mode 100644
index 000000000000..6f774eb7dc6c
--- /dev/null
+++ b/Silicon/NXP/LX2160A/Library/SocLib/SocLib.c
@@ -0,0 +1,80 @@
+/** @Soc.c
+ SoC specific Library containg functions to initialize various SoC components
+
+ Copyright 2018-2020 NXP
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Base.h>
+#include <Library/ChassisLib.h>
+#include <Library/DebugLib.h>
+#include <Library/SocLib.h>
+#include <Soc.h>
+
+/**
+ Return the input clock frequency to an IP Module.
+ This function reads the RCW bits and calculates the PLL multiplier/divider
+ values to be applied to various IP modules.
+ If a module is disabled or doesn't exist on platform, then return zero.
+
+ @param[in] BaseClock Base clock to which PLL multiplier/divider values is
+ to be applied.
+ @param[in] ClockType Variable of Type NXP_IP_CLOCK. Indicates which IP clock
+ is to be retrieved.
+ @param[in] Args Variable argument list which is parsed based on
+ ClockType. e.g. if the ClockType is NXP_I2C_CLOCK, then
+ the second argument will be interpreted as controller
+ number. e.g. if there are four i2c controllers in SOC,
+ then this value can be 0, 1, 2, 3
+ e.g. if ClockType is NXP_CORE_CLOCK, then second
+ argument is interpreted as cluster number and third
+ argument is interpreted as core number (within the
+ cluster)
+
+ @return Actual Clock Frequency. Return value 0 should be
+ interpreted as clock not being provided to IP.
+**/
+UINT64
+SocGetClock (
+ IN UINT64 BaseClock,
+ IN NXP_IP_CLOCK ClockType,
+ IN VA_LIST Args
+ )
+{
+ LX2160A_DEVICE_CONFIG *Dcfg;
+ UINT32 RcwSr;
+ UINT64 ReturnValue;
+
+ ReturnValue = 0;
+ Dcfg = (LX2160A_DEVICE_CONFIG *)LX2160A_DCFG_ADDRESS;
+
+ switch (ClockType) {
+ case NXP_UART_CLOCK:
+ RcwSr = DcfgRead32 ((UINTN)&Dcfg->RcwSr[0]);
+ ReturnValue = (BaseClock * SYS_PLL_RAT (RcwSr)) >> 3;
+ break;
+ case NXP_I2C_CLOCK:
+ RcwSr = DcfgRead32 ((UINTN)&Dcfg->RcwSr[0]);
+ ReturnValue = (BaseClock * SYS_PLL_RAT (RcwSr)) >> 4;
+ break;
+ default:
+ break;
+ }
+
+ return ReturnValue;
+}
+
+/**
+ Function to initialize SoC specific constructs
+ **/
+VOID
+SocInit (
+ VOID
+ )
+{
+ ChassisInit ();
+
+ return;
+}
--
2.17.1


[PATCH edk2-platforms v2 6/9] Silicon/NXP: Add Chassis3V2 Package

Pankaj Bansal
 

From: Pankaj Bansal <pankaj.bansal@...>

Chassis3V2 is the new chassis on which LS1028A and LX2160A SOCs
are based.
Add the Chassis3V2 package.

Signed-off-by: Pankaj Bansal <pankaj.bansal@...>
---

Notes:
V2:
- No change

Silicon/NXP/Chassis3V2/Chassis3V2.dec | 22 ++++++
Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc | 10 +++
Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf | 33 +++++++++
Silicon/NXP/Chassis3V2/Include/Chassis.h | 26 +++++++
Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.c | 71 ++++++++++++++++++++
5 files changed, 162 insertions(+)

diff --git a/Silicon/NXP/Chassis3V2/Chassis3V2.dec b/Silicon/NXP/Chassis3V2/Chassis3V2.dec
new file mode 100644
index 000000000000..f7269e6bf6de
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Chassis3V2.dec
@@ -0,0 +1,22 @@
+# @file
+# NXP Layerscape processor package.
+#
+# Copyright 2017, 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+ DEC_SPECIFICATION = 1.27
+ PACKAGE_VERSION = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+#
+################################################################################
+[Includes.common]
+ Include # Root include for the package
diff --git a/Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc b/Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc
new file mode 100644
index 000000000000..b9f388a59f2a
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc
@@ -0,0 +1,10 @@
+# @file
+#
+# Copyright 2018-2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[LibraryClasses.common]
+ ChassisLib|Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf
diff --git a/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf b/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf
new file mode 100644
index 000000000000..75b68cc4ca2d
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf
@@ -0,0 +1,33 @@
+# @file
+#
+# Copyright 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+
+[Defines]
+ INF_VERSION = 1.27
+ BASE_NAME = Chassis3V2Lib
+ FILE_GUID = fae0d077-5fc2-494f-b8e1-c51a3023ee3e
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ChassisLib
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ MdePkg/MdePkg.dec
+ Silicon/NXP/Chassis3V2/Chassis3V2.dec
+ Silicon/NXP/NxpQoriqLs.dec
+
+[LibraryClasses]
+ IoAccessLib
+ IoLib
+ PcdLib
+ SerialPortLib
+
+[Sources.common]
+ ChassisLib.c
+
+[FeaturePcd]
+ gNxpQoriqLsTokenSpaceGuid.PcdDcfgBigEndian
diff --git a/Silicon/NXP/Chassis3V2/Include/Chassis.h b/Silicon/NXP/Chassis3V2/Include/Chassis.h
new file mode 100644
index 000000000000..0fd70132d897
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Include/Chassis.h
@@ -0,0 +1,26 @@
+/** @file
+
+ Copyright 2018-2020 NXP
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef CHASSIS_H__
+#define CHASSIS_H__
+
+#include <Uefi.h>
+
+#define NXP_LAYERSCAPE_CHASSIS3V2_DCFG_ADDRESS 0x1E00000
+
+/**
+ The Device Configuration Unit provides general purpose configuration and
+ status for the device. These registers only support 32-bit accesses.
+**/
+#pragma pack(1)
+typedef struct {
+ UINT8 Reserved0[0x100 - 0x0];
+ UINT32 RcwSr[32]; // Reset Control Word Status Register
+} NXP_LAYERSCAPE_CHASSIS3V2_DEVICE_CONFIG;
+#pragma pack()
+
+#endif // CHASSIS_H__
diff --git a/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.c b/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.c
new file mode 100644
index 000000000000..30f8f945b233
--- /dev/null
+++ b/Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.c
@@ -0,0 +1,71 @@
+/** @file
+ Chassis specific functions common to all SOCs based on a specific Chessis
+
+ Copyright 2018-2020 NXP
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <Chassis.h>
+#include <Uefi.h>
+#include <Library/IoAccessLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
+
+/**
+ Read Dcfg register
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+**/
+UINT32
+EFIAPI
+DcfgRead32 (
+ IN UINTN Address
+ )
+{
+ MMIO_OPERATIONS *DcfgOps;
+
+ DcfgOps = GetMmioOperations (FeaturePcdGet (PcdDcfgBigEndian));
+
+ return DcfgOps->Read32 (Address);
+}
+
+/**
+ Write Dcfg register
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+ @return Value.
+**/
+UINT32
+EFIAPI
+DcfgWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ )
+{
+ MMIO_OPERATIONS *DcfgOps;
+
+ DcfgOps = GetMmioOperations (FeaturePcdGet (PcdDcfgBigEndian));
+
+ return DcfgOps->Write32 (Address, Value);
+}
+
+/**
+ Function to initialize Chassis Specific functions
+ **/
+VOID
+ChassisInit (
+ VOID
+ )
+{
+ //
+ // Early init serial Port to get board information.
+ //
+ SerialPortInitialize ();
+}
--
2.17.1


[PATCH edk2-platforms v2 5/9] Silicon/NXP: Implement PL011UartClockLib for NXP platforms

Pankaj Bansal
 

From: Pankaj Bansal <pankaj.bansal@...>

In NXP SOCs the UART clock is derived from System clock after PLL
multiplication. Therefore, add the PL011UartClockLib implementation
for NXP platforms.

Signed-off-by: Pankaj Bansal <pankaj.bansal@...>
---

Notes:
V2:
- No change

Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf | 24 ++++++++++++++++++++
Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c | 22 ++++++++++++++++++
2 files changed, 46 insertions(+)

diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf
new file mode 100644
index 000000000000..b771dba7697f
--- /dev/null
+++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf
@@ -0,0 +1,24 @@
+#/* @file
+# Copyright 2018, 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = PL011UartClockLib
+ FILE_GUID = af8fef24-afbb-472a-b8b7-13101a79703c
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PL011UartClockLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ Silicon/NXP/NxpQoriqLs.dec
+
+[Sources.common]
+ PL011UartClockLib.c
+
+[LibraryClasses]
+ ArmPlatformLib
diff --git a/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c
new file mode 100644
index 000000000000..3814685585eb
--- /dev/null
+++ b/Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c
@@ -0,0 +1,22 @@
+/** @file
+*
+* Copyright 2018, 2020 NXP
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Base.h>
+#include <Ppi/NxpPlatformGetClock.h>
+
+/**
+ Return clock in for PL011 Uart IP
+**/
+UINT32
+EFIAPI
+PL011UartClockGetFreq (
+ VOID
+ )
+{
+ return gPlatformGetClockPpi.PlatformGetClock (NXP_UART_CLOCK, 0);
+}
--
2.17.1


[PATCH edk2-platforms v2 4/9] Platform/NXP/LX2160ARDB: Add ArmPlatformLib

Pankaj Bansal
 

From: Pankaj Bansal <pankaj.bansal@...>

Add ArmPlatformLib for LX2160ARDB platform that is based on
ArmPlatformPkg/Library/ArmPlatformLibNull.

Apart from the the interfaces exposed by ArmPlatformLibNull, this
library also implements gPlatformGetClockPpi, which is specific to NXP
SOCs' based platforms.

Refer edk2-platforms/Silicon/NXP/Include/Ppi/NxpPlatformGetClock.h for
the details.

Signed-off-by: Pankaj Bansal <pankaj.bansal@...>
---

Notes:
V2:
- New commit
- split Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ in two parts
part containing gPlatformGetClockPpi is put before PL011UartClockLib
implementation.

Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf | 39 ++++++
Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c | 145 ++++++++++++++++++++
Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c | 28 ++++
Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S | 45 ++++++
4 files changed, 257 insertions(+)

diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
new file mode 100644
index 000000000000..743836e57141
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
@@ -0,0 +1,39 @@
+#/* @file
+# Copyright 2018, 2020 NXP
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#*/
+
+[Defines]
+ INF_VERSION = 0x0001001A
+ BASE_NAME = PlatformLib
+ FILE_GUID = d1361285-8a47-421c-9efd-6b262c9093fc
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = ArmPlatformLib
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ Silicon/NXP/NxpQoriqLs.dec
+
+[LibraryClasses]
+ ArmLib
+ DebugLib
+
+[Sources.common]
+ ArmPlatformLib.c
+ ArmPlatformLibMem.c
+
+[Sources.AArch64]
+ AArch64/ArmPlatformHelper.S
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdArmPrimaryCoreMask
+ gArmTokenSpaceGuid.PcdArmPrimaryCore
+
+[Ppis]
+ gArmMpCoreInfoPpiGuid
diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
new file mode 100644
index 000000000000..806cfd180bee
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
@@ -0,0 +1,145 @@
+/** @file
+*
+* Copyright 2018-2020 NXP
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmLib.h>
+#include <Library/ArmPlatformLib.h>
+
+#include <Ppi/ArmMpCoreInfo.h>
+#include <Ppi/NxpPlatformGetClock.h>
+
+ARM_CORE_INFO mLX2160aMpCoreInfoTable[] = {
+ {
+ // Cluster 0, Core 0
+ 0x0, 0x0,
+
+ // MP Core MailBox Set/Get/Clear Addresses and Clear Value
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (EFI_PHYSICAL_ADDRESS)0,
+ (UINT64)0xFFFFFFFF
+ }
+};
+
+/**
+ Return the current Boot Mode
+
+ This function returns the boot reason on the platform
+
+**/
+EFI_BOOT_MODE
+ArmPlatformGetBootMode (
+ VOID
+ )
+{
+ return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+/**
+ Get the clocks supplied by Platform(Board) to NXP Layerscape SOC IPs
+
+ @param[in] ClockType Variable of Type NXP_IP_CLOCK. Indicates which IP clock
+ is to be retrieved.
+ @param[in] ... Variable argument list which is parsed based on
+ ClockType. e.g. if the ClockType is NXP_I2C_CLOCK, then
+ the second argument will be interpreted as controller
+ number.
+ if ClockType is NXP_CORE_CLOCK, then second argument
+ is interpreted as cluster number and third argument is
+ interpreted as core number (within the cluster)
+
+ @return Actual Clock Frequency. Return value 0 should be
+ interpreted as clock not being provided to IP.
+**/
+UINT64
+EFIAPI
+NxpPlatformGetClock(
+ IN UINT32 ClockType,
+ ...
+ )
+{
+ UINT64 Clock;
+ VA_LIST Args;
+
+ Clock = 0;
+
+ VA_START (Args, ClockType);
+
+ switch (ClockType) {
+ case NXP_SYSTEM_CLOCK:
+ Clock = 100 * 1000 * 1000; // 100 MHz
+ break;
+ case NXP_I2C_CLOCK:
+ case NXP_UART_CLOCK:
+ Clock = NxpPlatformGetClock (NXP_SYSTEM_CLOCK);
+ break;
+ default:
+ break;
+ }
+
+ VA_END (Args);
+
+ return Clock;
+}
+
+/**
+ Initialize controllers that must setup in the normal world
+
+ This function is called by the ArmPlatformPkg/PrePi or ArmPlatformPkg/PlatformPei
+ in the PEI phase.
+
+**/
+EFI_STATUS
+ArmPlatformInitialize (
+ IN UINTN MpId
+ )
+{
+ //TODO: Implement me
+
+ return EFI_SUCCESS;
+}
+
+EFI_STATUS
+PrePeiCoreGetMpCoreInfo (
+ OUT UINTN *CoreCount,
+ OUT ARM_CORE_INFO **ArmCoreTable
+ )
+{
+ if (ArmIsMpCore()) {
+ *CoreCount = sizeof(mLX2160aMpCoreInfoTable) / sizeof(ARM_CORE_INFO);
+ *ArmCoreTable = mLX2160aMpCoreInfoTable;
+ return EFI_SUCCESS;
+ } else {
+ return EFI_UNSUPPORTED;
+ }
+}
+
+ARM_MP_CORE_INFO_PPI mMpCoreInfoPpi = { PrePeiCoreGetMpCoreInfo };
+NXP_PLATFORM_GET_CLOCK_PPI gPlatformGetClockPpi = { NxpPlatformGetClock };
+
+EFI_PEI_PPI_DESCRIPTOR gPlatformPpiTable[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &gArmMpCoreInfoPpiGuid,
+ &mMpCoreInfoPpi
+ }
+};
+
+VOID
+ArmPlatformGetPlatformPpiList (
+ OUT UINTN *PpiListSize,
+ OUT EFI_PEI_PPI_DESCRIPTOR **PpiList
+ )
+{
+ if (ArmIsMpCore()) {
+ *PpiListSize = sizeof(gPlatformPpiTable);
+ *PpiList = gPlatformPpiTable;
+ } else {
+ *PpiListSize = 0;
+ *PpiList = NULL;
+ }
+}
diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
new file mode 100644
index 000000000000..ad6862dd81eb
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
@@ -0,0 +1,28 @@
+/** @file
+*
+* Copyright 2018, 2020 NXP
+*
+* SPDX-License-Identifier: BSD-2-Clause-Patent
+*
+**/
+
+#include <Library/ArmPlatformLib.h>
+#include <Library/DebugLib.h>
+
+/**
+ Return the Virtual Memory Map of your platform
+
+ This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
+
+ @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
+ Virtual Memory mapping. This array must be ended by a zero-filled
+ entry
+
+**/
+VOID
+ArmPlatformGetVirtualMemoryMap (
+ IN ARM_MEMORY_REGION_DESCRIPTOR** VirtualMemoryMap
+ )
+{
+ ASSERT(0);
+}
diff --git a/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
new file mode 100644
index 000000000000..b7c6dbdc2e61
--- /dev/null
+++ b/Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
@@ -0,0 +1,45 @@
+//
+// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//
+
+#include <AsmMacroIoLibV8.h>
+#include <Library/ArmLib.h>
+
+ASM_FUNC(ArmPlatformPeiBootAction)
+ ret
+
+//UINTN
+//ArmPlatformGetCorePosition (
+// IN UINTN MpId
+// );
+// With this function: CorePos = (ClusterId * 4) + CoreId
+ASM_FUNC(ArmPlatformGetCorePosition)
+ and x1, x0, #ARM_CORE_MASK
+ and x0, x0, #ARM_CLUSTER_MASK
+ add x0, x1, x0, LSR #6
+ ret
+
+//UINTN
+//ArmPlatformGetPrimaryCoreMpId (
+// VOID
+// );
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
+ ret
+
+//UINTN
+//ArmPlatformIsPrimaryCore (
+// IN UINTN MpId
+// );
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
+ and x0, x0, x1
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
+ cmp w0, w1
+ mov x0, #1
+ mov x1, #0
+ csel x0, x0, x1, eq
+ ret
--
2.17.1


[PATCH edk2-platforms v2 3/9] Silicon/NXP: Use edk2 recommended compilation flags

Pankaj Bansal
 

From: Pankaj Bansal <pankaj.bansal@...>

edk2 recommends to use MDEPKG_NDEBUG for release builds and to use
DISABLE_NEW_DEPRECATED_INTERFACES for all new platforms.

Therefore, enable these flags for NXP platforms as well

Signed-off-by: Pankaj Bansal <pankaj.bansal@...>
---

Notes:
V2:
- No change

Silicon/NXP/NxpQoriqLs.dsc.inc | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/Silicon/NXP/NxpQoriqLs.dsc.inc b/Silicon/NXP/NxpQoriqLs.dsc.inc
index 12e2b89fac58..ee639d552483 100644
--- a/Silicon/NXP/NxpQoriqLs.dsc.inc
+++ b/Silicon/NXP/NxpQoriqLs.dsc.inc
@@ -173,7 +173,12 @@
NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf

[BuildOptions]
- RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu cortex-a9
+ GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+
+ #
+ # Disable deprecated APIs.
+ #
+ GCC:*_*_*_CC_FLAGS = -DDISABLE_NEW_DEPRECATED_INTERFACES

[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]
GCC:*_*_ARM_DLINK_FLAGS = -z common-page-size=0x1000
--
2.17.1


[PATCH edk2-platforms v2 2/9] Platform/NXP: Use Monotonic counter from MdeModulePkg

Pankaj Bansal
 

From: Pankaj Bansal <pankaj.bansal@...>

Monotonic counter module from EmbeddedPkg doesn't treat the
high 32 bit as non volatile, which is needed as per spec.

Therefore, use Monotonic counter module from MdeModulePkg

Signed-off-by: Pankaj Bansal <pankaj.bansal@...>
---

Notes:
V2:
- No change

Silicon/NXP/NxpQoriqLs.dsc.inc | 2 +-
Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/Silicon/NXP/NxpQoriqLs.dsc.inc b/Silicon/NXP/NxpQoriqLs.dsc.inc
index 54236e19531c..12e2b89fac58 100644
--- a/Silicon/NXP/NxpQoriqLs.dsc.inc
+++ b/Silicon/NXP/NxpQoriqLs.dsc.inc
@@ -337,7 +337,7 @@
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
- EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
+ MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf

# FDT installation
MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
diff --git a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
index fede51ced10e..49d8885477c7 100644
--- a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
+++ b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
@@ -98,7 +98,7 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
- INF EmbeddedPkg/EmbeddedMonotonicCounter/EmbeddedMonotonicCounter.inf
+ INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf

--
2.17.1


[PATCH edk2-platforms v2 1/9] Silicon/NXP: Use Metronome implementation from MdeModulePkg

Pankaj Bansal
 

From: Pankaj Bansal <pankaj.bansal@...>

There are two implementations of Metronome protocol.

EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
MdeModulePkg/Universal/Metronome/Metronome.inf

Although nowhere it has been specified, which one to use, but we are
going by the general practice of preferring MdeModulePkg/MdePkg over
EmbeddedPkg.

Signed-off-by: Pankaj Bansal <pankaj.bansal@...>
---

Notes:
V2:
- No change

Silicon/NXP/NxpQoriqLs.dsc.inc | 4 +---
Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 2 +-
2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/Silicon/NXP/NxpQoriqLs.dsc.inc b/Silicon/NXP/NxpQoriqLs.dsc.inc
index 03759c7cee7c..54236e19531c 100644
--- a/Silicon/NXP/NxpQoriqLs.dsc.inc
+++ b/Silicon/NXP/NxpQoriqLs.dsc.inc
@@ -218,8 +218,6 @@
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|10

[PcdsFixedAtBuild.common]
- gEmbeddedTokenSpaceGuid.PcdMetronomeTickPeriod|1000
- gEmbeddedTokenSpaceGuid.PcdTimerPeriod|10000 # expressed in 100ns units, 100,000 x 100 ns = 10,000,000 ns = 10 ms
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxAuthVariableSize|0x2800
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
@@ -348,7 +346,7 @@
MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
- EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ MdeModulePkg/Universal/Metronome/Metronome.inf
ArmPkg/Drivers/TimerDxe/TimerDxe.inf
ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf
diff --git a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
index 931d0bb14f9b..fede51ced10e 100644
--- a/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
+++ b/Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf
@@ -115,7 +115,7 @@ READ_LOCK_STATUS = TRUE
INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf

- INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
+ INF MdeModulePkg/Universal/Metronome/Metronome.inf
INF EmbeddedPkg/SimpleTextInOutSerial/SimpleTextInOutSerial.inf

#
--
2.17.1


[PATCH edk2-platforms v2 0/9] Add LX2160ARDB Platform

Pankaj Bansal
 

From: Pankaj Bansal <pankaj.bansal@...>

LX2160A Reference Design Board (RDB) is a high-performance development
platform that supports the QorIQ LX2160A Layerscape Architecture SOCs.

This Platform is based on Layerscape Chassis3V2.

The code structure is same as Chassis2 and LS1043A SOC and LS1043ARDB
platform.

v1 of this series can be referred here:
https://edk2.groups.io/g/devel/message/59923

Pankaj Bansal (9):
Silicon/NXP: Use Metronome implementation from MdeModulePkg
Platform/NXP: Use Monotonic counter from MdeModulePkg
Silicon/NXP: Use edk2 recommended compilation flags
Platform/NXP/LX2160ARDB: Add ArmPlatformLib
Silicon/NXP: Implement PL011UartClockLib for NXP platforms
Silicon/NXP: Add Chassis3V2 Package
Silicon/NXP: Add LX2160A Soc package
Platform/NXP: Add LX2160ARDB Platform
Platform/NXP/LX2160aRdbPkg: Add VarStore

Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec | 23 +++
Silicon/NXP/Chassis3V2/Chassis3V2.dec | 22 +++
Silicon/NXP/LX2160A/LX2160A.dec | 13 ++
Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc | 10 ++
Silicon/NXP/LX2160A/LX2160A.dsc.inc | 50 ++++++
Silicon/NXP/NxpQoriqLs.dsc.inc | 13 +-
Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc | 46 ++++++
Platform/NXP/LS1043aRdbPkg/LS1043aRdbPkg.fdf | 4 +-
.../LX2160aRdbPkg.fdf} | 33 ++--
.../Library/ArmPlatformLib/ArmPlatformLib.inf | 42 +++++
.../Library/ChassisLib/ChassisLib.inf | 33 ++++
Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf | 27 ++++
.../PL011UartClockLib/PL011UartClockLib.inf | 24 +++
Silicon/NXP/Chassis3V2/Include/Chassis.h | 26 ++++
Silicon/NXP/LX2160A/Include/Soc.h | 38 +++++
.../Library/ArmPlatformLib/ArmPlatformLib.c | 147 ++++++++++++++++++
.../ArmPlatformLib/ArmPlatformLibMem.c | 80 ++++++++++
.../Library/ChassisLib/ChassisLib.c | 71 +++++++++
Silicon/NXP/LX2160A/Library/SocLib/SocLib.c | 80 ++++++++++
.../PL011UartClockLib/PL011UartClockLib.c | 22 +++
.../AArch64/ArmPlatformHelper.S | 45 ++++++
Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc | 91 +++++++++++
22 files changed, 913 insertions(+), 27 deletions(-)
create mode 100644 Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dec
create mode 100644 Silicon/NXP/Chassis3V2/Chassis3V2.dec
create mode 100644 Silicon/NXP/LX2160A/LX2160A.dec
create mode 100644 Silicon/NXP/Chassis3V2/Chassis3V2.dsc.inc
create mode 100644 Silicon/NXP/LX2160A/LX2160A.dsc.inc
create mode 100644 Platform/NXP/LX2160aRdbPkg/LX2160aRdbPkg.dsc
copy Platform/NXP/{LS1043aRdbPkg/LS1043aRdbPkg.fdf => LX2160aRdbPkg/LX2160aRdbPkg.fdf} (88%)
create mode 100644 Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.inf
create mode 100644 Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.inf
create mode 100644 Silicon/NXP/LX2160A/Library/SocLib/SocLib.inf
create mode 100644 Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.inf
create mode 100644 Silicon/NXP/Chassis3V2/Include/Chassis.h
create mode 100644 Silicon/NXP/LX2160A/Include/Soc.h
create mode 100644 Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLib.c
create mode 100644 Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/ArmPlatformLibMem.c
create mode 100644 Silicon/NXP/Chassis3V2/Library/ChassisLib/ChassisLib.c
create mode 100644 Silicon/NXP/LX2160A/Library/SocLib/SocLib.c
create mode 100644 Silicon/NXP/Library/PL011UartClockLib/PL011UartClockLib.c
create mode 100644 Platform/NXP/LX2160aRdbPkg/Library/ArmPlatformLib/AArch64/ArmPlatformHelper.S
create mode 100644 Platform/NXP/LX2160aRdbPkg/VarStore.fdf.inc

--
2.17.1


Re: [PATCH edk2-platforms 1/1] Silicon/SynQuacer: use correct argument count for _EVT ACPI method

Ard Biesheuvel
 

On 5/26/20 10:49 PM, Leif Lindholm wrote:
On Mon, May 25, 2020 at 20:24:55 +0200, Ard Biesheuvel wrote:
The _EVT method on the ACPI0013 Generic Event device takes a single
argument. Even though we are not interested in its value (given that
there is only one interrupt source), we still have to declare the
prototype correctly, or the OS might complain and refuse to call it.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@...>
Reviewed-by: Leif Lindholm <leif@...>
Thanks

Pushed as 7121691cfcbc..85a50de1b459

---
Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
index 0ea8ce6d5f44..50f1753c3565 100644
--- a/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
+++ b/Silicon/Socionext/SynQuacer/AcpiTables/Dsdt.asl
@@ -226,7 +226,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", 1, "SNI", "SYNQUACR",
MASK = 0xfffffeff
}
- Method (_EVT) {
+ Method (_EVT, 0x1) {
REQC = 0x100
Notify (\_SB.PWRB, 0x80)
}
--
2.17.1


Re: [PATCH 3/3] OvmfwPkg: Don't exclude XCODE Modules

Andrew Fish
 

On May 26, 2020, at 4:45 AM, Laszlo Ersek <lersek@...> wrote:

On 05/26/20 06:10, Andrew Fish wrote:


On May 25, 2020, at 12:31 PM, Laszlo Ersek <lersek@...> wrote:

Hi Andrew,

On 05/24/20 23:20, Andrew Fish via groups.io <http://groups.io/> wrote:
With this BZ getting fixed we no longer need to special case XCODE.

Cc: Ard Biesheuvel <ard.biesheuvel@...>
Cc: Jiewen Yao <jiewen.yao@...>
Cc: Jordan Justen <jordan.l.justen@...>
Cc: Philippe Mathieu-Daudé <philmd@...>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=557
Signed-off-by: Andrew Fish <afish@...>

Signed-off-by: Andrew Fish <afish@...>
---
OvmfPkg/OvmfPkgIa32.dsc | 3 +--
OvmfPkg/OvmfPkgIa32.fdf | 2 --
OvmfPkg/OvmfPkgIa32X64.dsc | 4 ++--
OvmfPkg/OvmfPkgIa32X64.fdf | 2 --
OvmfPkg/OvmfPkgX64.dsc | 3 +--
OvmfPkg/OvmfPkgX64.fdf | 2 --
OvmfPkg/OvmfXen.dsc | 3 +--
OvmfPkg/OvmfXen.fdf | 2 --
8 files changed, 5 insertions(+), 16 deletions(-)
Laszlo,

Thanks for the feedback.

Can I ask that you go to https://www.tianocore.org, click on How to Contribute and point me at the chain of links I did not follow, if I missed it tit is likely due to too many links and too much information being vended.
You didn't miss anything, starting from that page, I think. I don't
remember ever clicking "How to Contribute" on that page. :)

In fact if I grep the current edk2-wiki project source, at commit
de8fae02bbcc ("Add acknowledgements page", 2020-05-21), I find no
references to "SetupGit.py".

When people are starting out we should vend them the instructions that work and let them opt in to learning more.
"Working instructions" is a moving target. When I wrote the unkempt
guide, it was serious work, I had to set aside resources. When we
changed the workflow to replace "git-push" (by maintainers) with github
PRs (to trigger CI), documenting that was again serious work (for Mike
-- Mike updated both the official workflow article and the unkempt
guide, as I couldn't volunteer for the latter).

The more documentation we add, the larger the burden to update them
grows. It's an on-going commitment. Given the constant scarcity of
developer (and reviewer) cycles, we can only choose between:

- "code, plus more or less up-to-date docs", and
- "code, plus no docs".

Leif wrote SetupGit.py in the first place to save people the effort of
going through some of the unkempt guide steps.

If we decide that no SetupGit.py (or similar utilities) should be
written without documenting them in the wiki, that won't force
contributors to document their workflow-related contributions; it will
cause them to not writing the utilities in the first place.

Open source development communities teach contributors the workflow by
doing. For example, I have contributed to two open source projects that
are *exclusively* managed on github.com, using "github native" pull
requests and such. (Namely, openssl, and "p11-glue/p11-kit".) I'm the
kind of guy that very carefully reads the documentation first, and
starts pushing the buttons only second, and I *still* got wrong my
initial contributions to both projects.

With OpenSSL, I missed details of how review worked and details about
the CLA. Maintainers taught me those bits on the PR, while they were
reviewing my code.

With p11-kit, I had missed that I was expected to write a unit test at
once, for the new code. Maintainers pointed that out in my PR.

I posit that virtually no up-to-date technical documentation exists
unless an organization treats that documentation as a *product* (with
its own resource allocations, technical writers, subject matter expert
reviewers, project managers, and so on).


(1) Please run "BaseTools/Scripts/SetupGit.py" in your edk2 clone,
because right now, the patch is formatted/posted with too many CR
characters.
I filed https://bugzilla.tianocore.org/show_bug.cgi?id=2767 since I passed PatchCheck.py but did not run BaseTools/Scripts/SetupGit.py
Thanks.

For the record: I didn't reject your contribution (I'm very happy you
posted a patch series); instead, I asked for an update.
Lazlo,

I understand that is just a tooling issue on my side. Sorry for my delay in fixing up the patches but I have some higher priority work PRs I need to get resolved and that is delaying me fixing up the patch set.

At my work we have a tradition of trying to update our documentation when we onboard new people as that new set of eyes helps point out the small things that could have saved people a lot of time. So I'm not so much complaining, but just trying to help.

In particular, the number of empty lines inserted into the DSC files is
not consistent across the OVMF DSC files, and that fact has nothing to
do with git configuration -- it would need fixing identically even if
the series had been submitted via a github.com PR.
My brain is a little dyslexic so I tend to miss symmetry things like this when I review my own work, but that is why we review the code.

Thanks,

Andrew Fish


Thanks
Laszlo




Please re-sync your calendar to get meeting updates

Soumya Guptha
 

Dear community members,

The groups.io calendar (https://edk2.groups.io/g/devel/calendar?calstart=2020-06-04) has shown some issues in displaying the correct meeting time. When I sync to my outlook, it is off by an hour.

I figured that this is a reported bug in group.io. I worked around it and adjusted the calendar so that it accurately displays the time.

 

Please resync your calendar by subscribing to the calendar  (https://edk2.groups.io/g/devel/ics/7722204/1063275740/feed.ics), so that it will show the correct meeting time.

 

Please note that there is no change to our community meetings, they are scheduled on the first Thursday of every month from 9am-10am (PST) and 7.30pm-8.30pm (PST).

 

Thanks,

Soumya

 

Soumya Guptha
Open Source Firmware PM, SFP/IAGS


 


Re: [PATCH 0/5] ArmPkg/PlatformBootManagerLib: play nice without ConnectAll()

Ard Biesheuvel
 

On 5/27/20 12:01 AM, Leif Lindholm via groups.io wrote:
On Tue, May 26, 2020 at 18:13:54 +0200, Ard Biesheuvel wrote:
Currently, Armpkg's PlatformBootManagerLib connects all controller to
their drivers recursively, even if the active boot option does not
require it. There are some historical reasons for this, some of which are
being addressed in separate patches.

This series addresses the way ArmPkg's PlatformBootManagerLib implementation
deals with the UEFI Shell and the UiApp: currently, the shell is always
added as an ordinary boot option, which will be started if no other boot
options can be started, or if it is the first one in the boot order.

Once we remove the ConnectAll() call from PlatformBootManagerLib, those shells
will be launched without any block or other devices connected, which may
confuse novice users. So before doing so, let's make the handling a bit more
sane:
- add a 's' hotkey that enters the UEFI shell regardless of its priority
in the BootOrder - this shell will be entered with no devices connected
after patch #4
- enter the UiApp as a last resort if no boot options can be started
- make the UEFI Shell boot option hidden, so it is not started by default
(only by hotkey or BootNext)
- remove the ConnectAll() call from PlatformBootManagerLib
- finally, add a plugin library for UiApp to expose the UEFI Shell via an
ordinary main menu option (this works around the fact that patch #3 will
result in the UEFI Shell disappearing from the Boot Manager list).
Entering the shell this way will resemble the old situation, given that
UiApp connects all devices and refreshes all boot options etc at launch.
I get why this set was sent in isolation, but could we also discuss
somewhat what we would plan to do with the edk2-platforms that make
use of the ArmPkg PlatformBootManagerLib?
Not attempting a fallback boot onto network is probably an acceptable
change to pick up, but having an undocumented hotkey as the only way
into a shell that now doesn't map devices could be a bit aggravating.
It is not the only way, and it is not even the preferred way. Patch 5/5 adds an option to the UiApp root menu to enter the UEFI Shell, in a way that is independent from boot option handling. Since you enter UiApp first, all handles will be connected and boot options refreshed as usual.

In cases where you want to avoid this from happening, you can use the 's' key to drop into a shell directly.


Updated Event: TianoCore Community Meeting - APAC/NAMO #cal-invite

devel@edk2.groups.io Calendar <devel@...>
 

TianoCore Community Meeting - APAC/NAMO

When:
Thursday, 5 December 2019
7:30pm to 8:30pm
(UTC-08:00) America/Los Angeles
Repeats: Monthly on the first Thursday, through Wednesday, 3 June 2020

Where:
https://bluejeans.com/889357567?src=join_info

Organizer: Brian Richardson brian.richardson@...

Description:

Meeting URL

 

https://bluejeans.com/889357567?src=join_info

 

Meeting ID

 

889 357 567

 

Want to dial in from a phone?

 

Dial one of the following numbers:

 

+1.408.740.7256 (US (San Jose))

 

+1.408.317.9253 (US (Primary, San Jose))

 

(see all numbers - https://www.bluejeans.com/numbers)

 

Enter the meeting ID and passcode followed by #


Updated Event: TianoCore Community Meeting - EMEA/NAMO #cal-invite

devel@edk2.groups.io Calendar <devel@...>
 

TianoCore Community Meeting - EMEA/NAMO

When:
Thursday, 5 December 2019
9:00am to 10:00am
(UTC-08:00) America/Los Angeles
Repeats: Monthly on the first Thursday, through Wednesday, 3 June 2020

Where:
https://bluejeans.com/889357567?src=join_info

Organizer: Brian Richardson brian.richardson@...

Description:

Meeting URL

https://bluejeans.com/889357567?src=join_info

 

Meeting ID

889 357 567

 

Want to dial in from a phone?

 

Dial one of the following numbers:

+1.408.740.7256 (US (San Jose))

+1.408.317.9253 (US (Primary, San Jose))

(see all numbers - https://www.bluejeans.com/numbers)

 

Enter the meeting ID and passcode followed by #


Re: [PATCH 1/3] BaseTools/GenFv: Add PE/COFF resource sections injection to GenFw

Bob Feng
 

Hi Andrew,

This patch cause building GenFw failure.

cl.exe -c /nologo /Zi /c /O2 /MT /W4 /WX /D _CRT_SECURE_NO_DEPRECATE /D _CRT_NONSTDC_NO_DEPRECATE -I . -I D:\Edk2Maintain\edk2head\edk2\BaseTools\Source\C\Include -I D:\Edk2Maintain\edk2head\edk2\BaseTools\Source\C\Include\Ia32 -I D:\Edk2Maintain\edk2head\edk2\BaseTools\Source\C\Common GenFw.c -FoGenFw.obj
GenFw.c
GenFw.c(3047): error C2220: the following warning is treated as an error
GenFw.c(3047): warning C4244: '=': conversion from 'UINT32' to 'UINT16', possible loss of data
NMAKE : fatal error U1077: '"C:\Program Files (x86)\Microsoft Visual Studio\2019\Community\VC\Tools\MSVC\14.25.28610\bin\HostX86\x86\cl.exe"' : return code '0x2'
Stop.

The possible fix could be change the parameter Type as UINT16 data type. Would you update the patch?

+
+STATIC
+EFI_STATUS
+PatchResourceData (
+ IN UINT32 Type,
+ IN UINT8 *ResourceData,
+ IN UINT32 ResourceDataSize,
+ IN OUT UINT8 **PeCoff,
+ IN OUT UINT32 *PeCoffSize
+ )
+/*++

And a minor comment is about the commit message.

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=557 should change to REF: https://bugzilla.tianocore.org/show_bug.cgi?id=557


Thanks,
Bob

-----Original Message-----
From: Andrew Fish <afish@...>
Sent: Monday, May 25, 2020 5:20 AM
To: devel@edk2.groups.io
Cc: Andrew Fish <afish@...>; Feng, Bob C <bob.c.feng@...>; Gao, Liming <liming.gao@...>
Subject: [PATCH 1/3] BaseTools/GenFv: Add PE/COFF resource sections injection to GenFw

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=557

The XCODE toolchain does not suport injecting resource sections via libraries so add --rc to GenFw to inject $(MODULE_NAME)hii.rc into the final PE/COFF image.

Since moving exiting code around would break source level debugging we must reuse an existing empty section, or add a new section header.
If there is not space to add a new section header append to the last section. The resource entry if found via a directory entry so the PE/COFF loading code does not depend on the section type.

Signed-off-by: Andrew Fish <afish@...>
Cc: Bob Feng <bob.c.feng@...>
Cc: Liming Gao <liming.gao@...>
---
BaseTools/Source/C/GenFw/GenFw.c | 370 +++++++++++++++++++++++++++++++
1 file changed, 370 insertions(+)

diff --git a/BaseTools/Source/C/GenFw/GenFw.c b/BaseTools/Source/C/GenFw/GenFw.c
index 8cab70ba4d5f..748af5dff259 100644
--- a/BaseTools/Source/C/GenFw/GenFw.c
+++ b/BaseTools/Source/C/GenFw/GenFw.c
@@ -96,6 +96,16 @@ ZeroDebugData (
BOOLEAN ZeroDebug ); +STATIC+EFI_STATUS+PatchResourceData (+ IN UINT32 Type,+ IN UINT8 *ResourceData,+ IN UINT32 ResourceDataSize,+ IN OUT UINT8 **PeCoff,+ IN OUT UINT32 *PeCoffSize+ );+ STATIC EFI_STATUS SetStamp (@@ -267,6 +277,11 @@ Returns:
except for -o option. It is a action option.\n\ If it is combined with other action options, the later\n\ input action option will override the previous one.\n");+ fprintf (stdout, " --rc FlieName Append a Hii resource section to the\n\+ last PE/COFF section. The FileName is the resource section to append\n\+ If FileName does not exist this operation is skipped. This feature is\n\+ only intended for toolchains, like XCODE, that don't suport $(RC).\n\+ This option can only be combined with -e\n"); fprintf (stdout, " --rebase NewAddress Rebase image to new base address. New address \n\ is also set to the first none code section header.\n\ It can't be combined with other action options\n\@@ -1059,10 +1074,12 @@ Returns:
CHAR8 **InputFileName; char *OutImageName; char *ModuleType;+ char *RcFileName; CHAR8 *TimeStamp; FILE *fpIn; FILE *fpOut; FILE *fpInOut;+ FILE *fpRc; UINT32 Data; UINT32 *DataPointer; UINT32 *OldDataPointer;@@ -1080,6 +1097,8 @@ Returns:
UINT32 OutputFileLength; UINT8 *InputFileBuffer; UINT32 InputFileLength;+ UINT8 *RcFileBuffer;+ UINT32 RcFileLength; RUNTIME_FUNCTION *RuntimeFunction; UNWIND_INFO *UnwindInfo; STATUS Status;@@ -1116,6 +1135,7 @@ Returns:
time_t OutputFileTime; struct stat Stat_Buf; BOOLEAN ZeroDebugFlag;+ BOOLEAN InsertRcFile; SetUtilityName (UTILITY_NAME); @@ -1128,6 +1148,7 @@ Returns:
mInImageName = NULL; OutImageName = NULL; ModuleType = NULL;+ RcFileName = NULL; Type = 0; Status = STATUS_SUCCESS; FileBuffer = NULL;@@ -1164,6 +1185,7 @@ Returns:
InputFileTime = 0; OutputFileTime = 0; ZeroDebugFlag = FALSE;+ InsertRcFile = FALSE; if (argc == 1) { Error (NULL, 0, 1001, "Missing options", "No input options.");@@ -1436,6 +1458,20 @@ Returns:
continue; } + if (stricmp (argv[0], "--rc") == 0) {+ RcFileName = argv[1];+ argc -= 2;+ argv += 2;++ if (stat (RcFileName, &Stat_Buf) == 0) {+ //+ // File exists+ //+ InsertRcFile = TRUE;+ }+ continue;+ }+ if (argv[0][0] == '-') { Error (NULL, 0, 1000, "Unknown option", argv[0]); goto Finish;@@ -1568,6 +1604,10 @@ Returns:
break; } + if (InsertRcFile) {+ VerboseMsg ("RC input file %s", RcFileName);+ }+ if (ReplaceFlag) { VerboseMsg ("Overwrite the input file with the output content."); }@@ -2052,6 +2092,52 @@ Returns:
} } + //+ // Insert Resources into the image.+ //+ if (InsertRcFile) {+ fpRc = fopen (LongFilePath (RcFileName), "rb");+ if (fpRc == NULL) {+ Error (NULL, 0, 0001, "Error opening file", RcFileName);+ goto Finish;+ }++ RcFileLength = _filelength (fileno (fpRc));+ RcFileBuffer = malloc (RcFileLength);+ if (FileBuffer == NULL) {+ Error (NULL, 0, 4001, "Resource", "memory cannot be allocated!");+ fclose (fpRc);+ goto Finish;+ }++ fread (RcFileBuffer, 1, RcFileLength, fpRc);+ fclose (fpRc);++ Status = PatchResourceData (Type, RcFileBuffer, RcFileLength, &FileBuffer, &FileLength);+ if (EFI_ERROR (Status)) {+ Error (NULL, 0, 3000, "Invalid", "RC Patch Data Error status is 0x%x", (int) Status);+ goto Finish;+ }++ fpOut = fopen (LongFilePath (OutImageName), "wb");+ if (fpOut == NULL) {+ Error (NULL, 0, 0001, "Error opening output file", OutImageName);+ goto Finish;+ }++ fwrite (FileBuffer, 1, FileLength, fpOut);++ fclose (fpOut);+ fpOut = NULL;+ VerboseMsg ("the size of output file is %u bytes", (unsigned) FileLength);++ //+ // Write the updated Image+ //+ goto Finish;+ }++ // // Convert ELF image to PeImage //@@ -2761,6 +2847,290 @@ Finish:
return GetUtilityStatus (); } +#define ALIGN_VALUE(Value, Alignment) ((Value) + (((Alignment) - (Value)) & ((Alignment) - 1)))++STATIC+EFI_STATUS+PatchResourceData (+ IN UINT32 Type,+ IN UINT8 *ResourceData,+ IN UINT32 ResourceDataSize,+ IN OUT UINT8 **PeCoff,+ IN OUT UINT32 *PeCoffSize+ )+/*++++Routine Description:++ Embed Resource data into a PE/COFF image.++ If there is free space between the header and the image add a new+ .rsrc section to the PE/COFF image. If no space exists then append+ the resource data to the last section.++Arguments:++ Type - If not zero them update PE/COFF header module type.+ ResourceData - *hii.rc data to insert into the image.+ ResourceDataSize - Size of ResourceData in bytes.+ PeCoff - On input existing PE/COFF, on output input PE/COFF with+ ResourceData embedded.+ PeCoffSize - Size of PeCoff in bytes.++Returns:++ EFI_ABORTED - PeImage is invalid.+ EFI_SUCCESS - Zero debug data successfully.++--*/+{+ UINT8 *FileBuffer;+ UINT32 FileBufferSize;+ EFI_IMAGE_DOS_HEADER *DosHdr;+ EFI_IMAGE_FILE_HEADER *FileHdr;+ EFI_IMAGE_OPTIONAL_HEADER32 *Optional32Hdr;+ EFI_IMAGE_OPTIONAL_HEADER64 *Optional64Hdr;+ EFI_IMAGE_SECTION_HEADER *SectionHeader;+ UINT32 FileAlignment;+ UINT32 Max;+ INTN LastSection;+ INTN EmptySection;+ UINT32 ActualHeaderSize;+ UINT32 StartingPeCoffSize;+ UINT32 NewHeaderSize;+ CHAR8 *Base;+ EFI_IMAGE_RESOURCE_DIRECTORY *ResourceDirectory;+ EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY *ResourceDirectoryEntry;+ EFI_IMAGE_RESOURCE_DIRECTORY_STRING *ResourceDirectoryString;+ EFI_IMAGE_RESOURCE_DATA_ENTRY *ResourceDataEntry;+ EFI_IMAGE_DATA_DIRECTORY *DirectoryEntry;+ CHAR16 *String;+ UINT32 Offset;+ UINT32 Index;++ //+ // Grow the file in units of FileAlignment+ //+ DosHdr = (EFI_IMAGE_DOS_HEADER *) *PeCoff;+ if (DosHdr->e_magic != EFI_IMAGE_DOS_SIGNATURE) {+ // NO DOS header, must start with PE/COFF header+ FileHdr = (EFI_IMAGE_FILE_HEADER *)(*PeCoff + sizeof (UINT32));+ } else {+ FileHdr = (EFI_IMAGE_FILE_HEADER *)(*PeCoff + DosHdr->e_lfanew + sizeof (UINT32));+ }++ Optional32Hdr = (EFI_IMAGE_OPTIONAL_HEADER32 *) ((UINT8*) FileHdr + sizeof (EFI_IMAGE_FILE_HEADER));+ Optional64Hdr = (EFI_IMAGE_OPTIONAL_HEADER64 *) ((UINT8*) FileHdr + sizeof (EFI_IMAGE_FILE_HEADER));+ if (Optional32Hdr->Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) {+ FileAlignment = Optional32Hdr->FileAlignment;+ SectionHeader = (EFI_IMAGE_SECTION_HEADER *) ((UINT8 *) Optional32Hdr + FileHdr->SizeOfOptionalHeader);+ } else {+ FileAlignment = Optional64Hdr->FileAlignment;+ SectionHeader = (EFI_IMAGE_SECTION_HEADER *) ((UINT8 *) Optional64Hdr + FileHdr->SizeOfOptionalHeader);+ }++ LastSection = -1;+ for (Index = 0, Max = 0; Index < FileHdr->NumberOfSections; Index++) {+ if (SectionHeader[Index].PointerToRawData > Max) {+ Max = SectionHeader[Index].PointerToRawData;+ LastSection = Index;+ }+ }++ EmptySection = -1;+ for (Index = 0; Index < FileHdr->NumberOfSections; Index++) {+ if ((SectionHeader[Index].Misc.VirtualSize == 0) && (SectionHeader[Index].SizeOfRawData == 0)) {+ //+ // No Data or Zero Fill so we can repurpose this entry.+ //+ EmptySection = Index;+ break;+ }+ }++ if (EmptySection == -1) {+ ActualHeaderSize = (UINTN)(&SectionHeader[FileHdr->NumberOfSections]) - (UINTN)*PeCoff;+ if ((ActualHeaderSize + sizeof (EFI_IMAGE_SECTION_HEADER)) <= Optional32Hdr->SizeOfHeaders) {+ //+ // There is space to inject a new section.+ //+ FileHdr->NumberOfSections += 1;+ EmptySection = Index;+ }+ }++ StartingPeCoffSize = SectionHeader[LastSection].PointerToRawData + SectionHeader[LastSection].SizeOfRawData;+ if (SectionHeader[LastSection].Misc.VirtualSize > SectionHeader[LastSection].SizeOfRawData) {+ StartingPeCoffSize += SectionHeader[LastSection].Misc.VirtualSize - SectionHeader[LastSection].SizeOfRawData;+ }++ FileBufferSize = ALIGN_VALUE(StartingPeCoffSize + ResourceDataSize, FileAlignment);+ FileBuffer = malloc (FileBufferSize);+ if (FileBuffer == NULL) {+ return RETURN_OUT_OF_RESOURCES;+ }+ memset (FileBuffer, 0, FileBufferSize);++ //+ // Append the Resource Data to the end of the PE/COFF image.+ //+ NewHeaderSize = Optional32Hdr->SizeOfHeaders;+ CopyMem (FileBuffer, *PeCoff, (StartingPeCoffSize > *PeCoffSize) ? *PeCoffSize: StartingPeCoffSize);+ CopyMem (FileBuffer + StartingPeCoffSize, ResourceData, ResourceDataSize);++ free (*PeCoff);+ *PeCoff = FileBuffer;+ *PeCoffSize = FileBufferSize;++ DosHdr = (EFI_IMAGE_DOS_HEADER *)FileBuffer;+ if (DosHdr->e_magic != EFI_IMAGE_DOS_SIGNATURE) {+ // NO DOS header, must start with PE/COFF header+ FileHdr = (EFI_IMAGE_FILE_HEADER *)(FileBuffer + sizeof (UINT32));+ } else {+ FileHdr = (EFI_IMAGE_FILE_HEADER *)(FileBuffer + DosHdr->e_lfanew + sizeof (UINT32));+ }++ //+ // Get Resource EntryTable offset, and Section header+ //+ Optional32Hdr = (EFI_IMAGE_OPTIONAL_HEADER32 *) ((UINT8*) FileHdr + sizeof (EFI_IMAGE_FILE_HEADER));+ Optional64Hdr = (EFI_IMAGE_OPTIONAL_HEADER64 *) ((UINT8*) FileHdr + sizeof (EFI_IMAGE_FILE_HEADER));+ DirectoryEntry = NULL;+ if (Optional32Hdr->Magic == EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC) {+ SectionHeader = (EFI_IMAGE_SECTION_HEADER *) ((UINT8 *) Optional32Hdr + FileHdr->SizeOfOptionalHeader);+ if (Optional32Hdr->NumberOfRvaAndSizes > EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE) {+ DirectoryEntry = &Optional32Hdr->DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE];+ }+ } else {+ SectionHeader = (EFI_IMAGE_SECTION_HEADER *) ((UINT8 *) Optional64Hdr + FileHdr->SizeOfOptionalHeader);+ if (Optional64Hdr->NumberOfRvaAndSizes > EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE) {+ DirectoryEntry = &Optional64Hdr->DataDirectory[EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE];+ }+ }++ if (DirectoryEntry == NULL) {+ return RETURN_OUT_OF_RESOURCES;+ }++ if (EmptySection != -1) {+ //+ // Create a new section+ //+ CopyMem (SectionHeader[EmptySection].Name, ".rsrc\0\0\0", EFI_IMAGE_SIZEOF_SHORT_NAME);+ SectionHeader[EmptySection].Misc.VirtualSize = ResourceDataSize;+ SectionHeader[EmptySection].VirtualAddress = StartingPeCoffSize;+ SectionHeader[EmptySection].SizeOfRawData = ALIGN_VALUE(ResourceDataSize, FileAlignment);+ SectionHeader[EmptySection].PointerToRawData = StartingPeCoffSize;++ SectionHeader[EmptySection].Characteristics = EFI_IMAGE_SCN_MEM_EXECUTE | EFI_IMAGE_SCN_MEM_READ;+ SectionHeader[EmptySection].Characteristics |= EFI_IMAGE_SCN_CNT_INITIALIZED_DATA | EFI_IMAGE_SCN_CNT_CODE;++ DirectoryEntry->VirtualAddress = SectionHeader[EmptySection].VirtualAddress;+ } else {+ //+ // Grow the last section to include the resources.+ // For Xcode this is always the .debug section.+ //+ SectionHeader[LastSection].SizeOfRawData = ALIGN_VALUE(SectionHeader[LastSection].SizeOfRawData + ResourceDataSize, FileAlignment);++ //+ // Make sure the Virtual Size uses the file aligned actual size, since we are growing the file.+ //+ SectionHeader[LastSection].Misc.VirtualSize = SectionHeader[LastSection].SizeOfRawData;++ DirectoryEntry->VirtualAddress = StartingPeCoffSize;+ }+ DirectoryEntry->Size = ResourceDataSize;++ Optional32Hdr->SizeOfImage = ALIGN_VALUE(*PeCoffSize, Optional32Hdr->SectionAlignment);+ if (Type != 0) {+ Optional32Hdr->Subsystem = Type;+ }++ //+ // It looks like the ResourceDataEntry->OffsetToData is relative to the rc file,+ // but PeCoffLoaderLoadImage() assumes it is a PE/COFF VirtualAddress so we need+ // to fix it up. Walk the ResourceDataEntry just like PeCoffLoaderLoadImage() and+ // patch it.+ //+ Base = (CHAR8 *)(FileBuffer + StartingPeCoffSize);+ ResourceDirectory = (EFI_IMAGE_RESOURCE_DIRECTORY *)Base;+ ResourceDirectoryEntry = (EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY *)(ResourceDirectory + 1);++ for (Index = 0; Index < ResourceDirectory->NumberOfNamedEntries; Index++) {+ if (ResourceDirectoryEntry->u1.s.NameIsString) {+ //+ // Check the ResourceDirectoryEntry->u1.s.NameOffset before use it.+ //+ if (ResourceDirectoryEntry->u1.s.NameOffset >= DirectoryEntry->Size) {+ return RETURN_UNSUPPORTED;+ }+ ResourceDirectoryString = (EFI_IMAGE_RESOURCE_DIRECTORY_STRING *) (Base + ResourceDirectoryEntry->u1.s.NameOffset);+ String = &ResourceDirectoryString->String[0];++ if (ResourceDirectoryString->Length == 3 &&+ String[0] == L'H' &&+ String[1] == L'I' &&+ String[2] == L'I') {+ //+ // Resource Type "HII" found+ //+ if (ResourceDirectoryEntry->u2.s.DataIsDirectory) {+ //+ // Move to next level - resource Name+ //+ if (ResourceDirectoryEntry->u2.s.OffsetToDirectory >= DirectoryEntry->Size) {+ return RETURN_UNSUPPORTED;+ }+ ResourceDirectory = (EFI_IMAGE_RESOURCE_DIRECTORY *) (Base + ResourceDirectoryEntry->u2.s.OffsetToDirectory);+ Offset = ResourceDirectoryEntry->u2.s.OffsetToDirectory + sizeof (EFI_IMAGE_RESOURCE_DIRECTORY) ++ sizeof (EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY) * (ResourceDirectory->NumberOfNamedEntries + ResourceDirectory->NumberOfIdEntries);+ if (Offset > DirectoryEntry->Size) {+ return RETURN_UNSUPPORTED;+ }+ ResourceDirectoryEntry = (EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY *) (ResourceDirectory + 1);++ if (ResourceDirectoryEntry->u2.s.DataIsDirectory) {+ //+ // Move to next level - resource Language+ //+ if (ResourceDirectoryEntry->u2.s.OffsetToDirectory >= DirectoryEntry->Size) {+ return RETURN_UNSUPPORTED;+ }+ ResourceDirectory = (EFI_IMAGE_RESOURCE_DIRECTORY *) (Base + ResourceDirectoryEntry->u2.s.OffsetToDirectory);+ Offset = ResourceDirectoryEntry->u2.s.OffsetToDirectory + sizeof (EFI_IMAGE_RESOURCE_DIRECTORY) ++ sizeof (EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY) * (ResourceDirectory->NumberOfNamedEntries + ResourceDirectory->NumberOfIdEntries);+ if (Offset > DirectoryEntry->Size) {+ return RETURN_UNSUPPORTED;+ }+ ResourceDirectoryEntry = (EFI_IMAGE_RESOURCE_DIRECTORY_ENTRY *) (ResourceDirectory + 1);+ }+ }++ //+ // Now it ought to be resource Data+ //+ if (!ResourceDirectoryEntry->u2.s.DataIsDirectory) {+ if (ResourceDirectoryEntry->u2.OffsetToData >= DirectoryEntry->Size) {+ return RETURN_UNSUPPORTED;+ }+ ResourceDataEntry = (EFI_IMAGE_RESOURCE_DATA_ENTRY *) (Base + ResourceDirectoryEntry->u2.OffsetToData);++ //+ // Adjust OffsetToData to be a PE/COFF Virtual address in the updated image.+ //+ ResourceDataEntry->OffsetToData += (UINTN)DirectoryEntry->VirtualAddress;+ break;+ }+ }+ }+ ResourceDirectoryEntry++;+ }++ return EFI_SUCCESS;+}++ STATIC EFI_STATUS ZeroDebugData (--
2.24.1 (Apple Git-126)


Re: [EXTERNAL] Re: Hard Feature Freeze starts now for edk2-stable202005

Bret Barkelew <bret.barkelew@...>
 

Thanks!

 

- Bret

 


From: devel@edk2.groups.io <devel@edk2.groups.io> on behalf of Liming Gao via groups.io <liming.gao@...>
Sent: Tuesday, May 26, 2020 7:21:00 PM
To: Bret Barkelew <Bret.Barkelew@...>; Laszlo Ersek <lersek@...>; devel@edk2.groups.io <devel@edk2.groups.io>; announce@edk2.groups.io <announce@edk2.groups.io>
Cc: Leif Lindholm <leif@...>; afish@... <afish@...>; Kinney, Michael D <michael.d.kinney@...>
Subject: Re: [edk2-devel] [EXTERNAL] Re: Hard Feature Freeze starts now for edk2-stable202005
 

I create PR https://github.com/tianocore/edk2/pull/644 for this patch.

 

Thanks

Liming

From: Bret Barkelew <Bret.Barkelew@...>
Sent: Wednesday, May 27, 2020 6:11 AM
To: Laszlo Ersek <lersek@...>; devel@edk2.groups.io; Gao, Liming <liming.gao@...>; announce@edk2.groups.io
Cc: Leif Lindholm <leif@...>; afish@...; Kinney, Michael D <michael.d.kinney@...>
Subject: Re: [EXTERNAL] Re: Hard Feature Freeze starts now for edk2-stable202005

 

I just looked into it, and I think that AsciiStrCpyS() was the wrong function to call in this loop anyway. AsciiStrCpyS() will fail without copying any characters.

AsciiStrnCpyS() will perform the string "slicing"/"chunking" that the loop seems to expect.

 

The bug stands and we should try to get that bug fix into the stable tag. Thanks!

 

- Bret

 


From: Laszlo Ersek <lersek@...>
Sent: Monday, May 25, 2020 10:46 AM
To: Bret Barkelew <Bret.Barkelew@...>; devel@edk2.groups.io <devel@edk2.groups.io>; liming.gao <liming.gao@...>; announce@edk2.groups.io <announce@edk2.groups.io>
Cc: Leif Lindholm <leif@...>; afish@... <afish@...>; Kinney, Michael D <michael.d.kinney@...>
Subject: [EXTERNAL] Re: Hard Feature Freeze starts now for edk2-stable202005

 

Hi Bret,

On 05/22/20 17:11, Bret Barkelew wrote:
> We’d like to ask that this patch be considered for the stable tag:
> [PATCH v1 1/1] UnitTestFrameworkPkg/UnitTestResultReportLib: Use AsciiStrnCpyS()
> https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2721&amp;data=02%7C01%7Cbret.barkelew%40microsoft.com%7C2698d0e553c04b47194c08d800d398b8%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637260256091133309&amp;sdata=MDKQ1CKq9%2B9AfPML0JxcND47UIcQUAibUSAVlfW5iZc%3D&amp;reserved=0
>
> The patch was reviewed prior to the hard freeze date, and is a small change that affects new(ish) code that is not heavily utilized yet.

does the original issue (reported in TianoCore#2721) persist with
TianoCore#2054 fixed?

My understanding (from TianoCore#2721) is that the original
AsciiStrCpyS() call is not buggy, it just triggers a (per spec) error
condition in AsciiStrCpyS(). Previously, that would indeed trip an
ASSERT(), but AIUI that issue has been resolved generally with
TianoCore#2054.

If the AsciiStrCpyS() call remains an issue with the ASSERT() removed,
then replacing the call with AsciiStrnCpyS() still seems like a bugfix
to me, not a "feature", so I think the patch is eligible for merging
during the HFF.

Mike, can you please merge the patch (if it's still needed)?

Thanks
Laszlo


>
> - Bret
>
> From: Liming Gao via groups.io<mailto:liming.gao@...>
> Sent: Friday, May 22, 2020 1:01 AM
> To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; announce@edk2.groups.io<mailto:announce@edk2.groups.io>
> Cc: Laszlo Ersek<mailto:lersek@...>; Leif Lindholm<mailto:leif@...>; afish@...<mailto:afish@...>; Kinney, Michael D<mailto:michael.d.kinney@...>
> Subject: [EXTERNAL] [edk2-devel] Hard Feature Freeze starts now for edk2-stable202005
>
> Hi, all
>   Today, we enter into Hard Feature Freeze phase until edk2-stable202005 tag is created at 2020-05-29. In this phase, there is no feature to be pushed. The critical bug fix is still allowed.
>
>   If the patch is sent after Hard Feature Freeze, and plans to catch this stable tag, please add edk2-stable202005 key words in the patch title and BZ, and also cc to Tianocore Stewards, then Stewards can give the comments.
>
> Below is edk2-stable202005 tag planning.
> Date (00:00:00 UTC-8) Description
> 2020-03-04      Beginning of development
> 2020-05-08      Feature Planning Freeze
> 2020-05-15      Soft Feature Freeze
> 2020-05-22      Hard Feature Freeze
> 2020-05-29      Release
>
> Thanks
> Liming
> >
>


Re: [EXTERNAL] Re: Hard Feature Freeze starts now for edk2-stable202005

Liming Gao
 

I create PR https://github.com/tianocore/edk2/pull/644 for this patch.

 

Thanks

Liming

From: Bret Barkelew <Bret.Barkelew@...>
Sent: Wednesday, May 27, 2020 6:11 AM
To: Laszlo Ersek <lersek@...>; devel@edk2.groups.io; Gao, Liming <liming.gao@...>; announce@edk2.groups.io
Cc: Leif Lindholm <leif@...>; afish@...; Kinney, Michael D <michael.d.kinney@...>
Subject: Re: [EXTERNAL] Re: Hard Feature Freeze starts now for edk2-stable202005

 

I just looked into it, and I think that AsciiStrCpyS() was the wrong function to call in this loop anyway. AsciiStrCpyS() will fail without copying any characters.

AsciiStrnCpyS() will perform the string "slicing"/"chunking" that the loop seems to expect.

 

The bug stands and we should try to get that bug fix into the stable tag. Thanks!

 

- Bret

 


From: Laszlo Ersek <lersek@...>
Sent: Monday, May 25, 2020 10:46 AM
To: Bret Barkelew <Bret.Barkelew@...>; devel@edk2.groups.io <devel@edk2.groups.io>; liming.gao <liming.gao@...>; announce@edk2.groups.io <announce@edk2.groups.io>
Cc: Leif Lindholm <leif@...>; afish@... <afish@...>; Kinney, Michael D <michael.d.kinney@...>
Subject: [EXTERNAL] Re: Hard Feature Freeze starts now for edk2-stable202005

 

Hi Bret,

On 05/22/20 17:11, Bret Barkelew wrote:
> We’d like to ask that this patch be considered for the stable tag:
> [PATCH v1 1/1] UnitTestFrameworkPkg/UnitTestResultReportLib: Use AsciiStrnCpyS()
> https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fbugzilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2721&amp;data=02%7C01%7Cbret.barkelew%40microsoft.com%7C2698d0e553c04b47194c08d800d398b8%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637260256091133309&amp;sdata=MDKQ1CKq9%2B9AfPML0JxcND47UIcQUAibUSAVlfW5iZc%3D&amp;reserved=0
>
> The patch was reviewed prior to the hard freeze date, and is a small change that affects new(ish) code that is not heavily utilized yet.

does the original issue (reported in TianoCore#2721) persist with
TianoCore#2054 fixed?

My understanding (from TianoCore#2721) is that the original
AsciiStrCpyS() call is not buggy, it just triggers a (per spec) error
condition in AsciiStrCpyS(). Previously, that would indeed trip an
ASSERT(), but AIUI that issue has been resolved generally with
TianoCore#2054.

If the AsciiStrCpyS() call remains an issue with the ASSERT() removed,
then replacing the call with AsciiStrnCpyS() still seems like a bugfix
to me, not a "feature", so I think the patch is eligible for merging
during the HFF.

Mike, can you please merge the patch (if it's still needed)?

Thanks
Laszlo


>
> - Bret
>
> From: Liming Gao via groups.io<mailto:liming.gao@...>
> Sent: Friday, May 22, 2020 1:01 AM
> To: devel@edk2.groups.io<mailto:devel@edk2.groups.io>; announce@edk2.groups.io<mailto:announce@edk2.groups.io>
> Cc: Laszlo Ersek<mailto:lersek@...>; Leif Lindholm<mailto:leif@...>; afish@...<mailto:afish@...>; Kinney, Michael D<mailto:michael.d.kinney@...>
> Subject: [EXTERNAL] [edk2-devel] Hard Feature Freeze starts now for edk2-stable202005
>
> Hi, all
>   Today, we enter into Hard Feature Freeze phase until edk2-stable202005 tag is created at 2020-05-29. In this phase, there is no feature to be pushed. The critical bug fix is still allowed.
>
>   If the patch is sent after Hard Feature Freeze, and plans to catch this stable tag, please add edk2-stable202005 key words in the patch title and BZ, and also cc to Tianocore Stewards, then Stewards can give the comments.
>
> Below is edk2-stable202005 tag planning.
> Date (00:00:00 UTC-8) Description
> 2020-03-04      Beginning of development
> 2020-05-08      Feature Planning Freeze
> 2020-05-15      Soft Feature Freeze
> 2020-05-22      Hard Feature Freeze
> 2020-05-29      Release
>
> Thanks
> Liming
> >
>


Re: [PATCH 1/1] BaseTools: Turn on Link Time Optimization (LTO) for XCOODE

Bob Feng
 

Andrew,

Would you please update the BZ status to IN_PROGRESS? And paste the patch review link to the comments?

Reviewed-by: Bob Feng <bob.c.feng@...>

Thanks,
Bob

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Andrew Fish via groups.io
Sent: Monday, May 25, 2020 10:38 AM
To: devel@edk2.groups.io
Cc: Andrew Fish <afish@...>; Gao, Liming <liming.gao@...>; Liu, Zhiguang <zhiguang.liu@...>
Subject: [edk2-devel] [PATCH 1/1] BaseTools: Turn on Link Time Optimization (LTO) for XCOODE

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1202

Turn on LTO for XCODE.

We need to pass -object_path_lto <file> to the linker to keep source level debugging working.

OVMF X64 before:
SECFV [14%Full] 212992 total, 30224 used, 182768 free PEIFV [29%Full] 917504 total, 273256 used, 644248 free DXEFV [40%Full] 12582912 total, 5096904 used, 7486008 free FVMAIN_COMPACT [37%Full] 3440640 total, 1290240 used, 2150400 free

After:
SECFV [10%Full] 212992 total, 23064 used, 189928 free PEIFV [20%Full] 917504 total, 192328 used, 725176 free DXEFV [33%Full] 12582912 total, 4193632 used, 8389280 free FVMAIN_COMPACT [33%Full] 3440640 total, 1165352 used, 2275288 free

Signed-off-by: Andrew Fish <afish@...>
Cc: Liming Gao <liming.gao@...>
Cc: Zhiguang Liu <zhiguang.liu@...>
---
BaseTools/Conf/tools_def.template | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template
index 923517b5c296..efe8e47af851 100755
--- a/BaseTools/Conf/tools_def.template
+++ b/BaseTools/Conf/tools_def.template
@@ -2927,9 +2927,9 @@ RELEASE_XCODE5_*_MTOC_FLAGS = -align 0x20
#################### # IA-32 definitions ####################- DEBUG_XCODE5_IA32_DLINK_FLAGS = -arch i386 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -read_only_relocs suppress -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map+ DEBUG_XCODE5_IA32_DLINK_FLAGS = -arch i386 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -read_only_relocs suppress -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map -object_path_lto $(DEST_DIR_DEBUG)/$(BASE_NAME).lto NOOPT_XCODE5_IA32_DLINK_FLAGS = -arch i386 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -read_only_relocs suppress -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map-RELEASE_XCODE5_IA32_DLINK_FLAGS = -arch i386 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -read_only_relocs suppress -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map+RELEASE_XCODE5_IA32_DLINK_FLAGS = -arch i386 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -read_only_relocs suppress -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map -object_path_lto $(DEST_DIR_DEBUG)/$(BASE_NAME).lto *_XCODE5_IA32_SLINK_FLAGS = -static -o DEBUG_XCODE5_IA32_ASM_FLAGS = -arch i386 -g@@ -2938,16 +2938,16 @@ RELEASE_XCODE5_IA32_ASM_FLAGS = -arch i386
*_XCODE5_IA32_NASM_FLAGS = -f macho32 - DEBUG_XCODE5_IA32_CC_FLAGS = -arch i386 -c -g -Os -Wall -Werror -include AutoGen.h -funsigned-char -fno-stack-protector -fno-builtin -fshort-wchar -fasm-blocks -mdynamic-no-pic -mno-implicit-float -mms-bitfields -msoft-float -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang $(PLATFORM_FLAGS)-RELEASE_XCODE5_IA32_CC_FLAGS = -arch i386 -c -Os -Wall -Werror -include AutoGen.h -funsigned-char -fno-stack-protector -fno-builtin -fshort-wchar -fasm-blocks -mdynamic-no-pic -mno-implicit-float -mms-bitfields -msoft-float -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -Wno-unused-const-variable -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang $(PLATFORM_FLAGS)+ DEBUG_XCODE5_IA32_CC_FLAGS = -arch i386 -c -g -Os -flto -Wall -Werror -include AutoGen.h -funsigned-char -fno-stack-protector -fno-builtin -fshort-wchar -fasm-blocks -mdynamic-no-pic -mno-implicit-float -mms-bitfields -msoft-float -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang $(PLATFORM_FLAGS)+RELEASE_XCODE5_IA32_CC_FLAGS = -arch i386 -c -Os -flto -Wall -Werror -include AutoGen.h -funsigned-char -fno-stack-protector -fno-builtin -fshort-wchar -fasm-blocks -mdynamic-no-pic -mno-implicit-float -mms-bitfields -msoft-float -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -Wno-unused-const-variable -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang $(PLATFORM_FLAGS) NOOPT_XCODE5_IA32_CC_FLAGS = -arch i386 -c -g -O0 -Wall -Werror -include AutoGen.h -funsigned-char -fno-stack-protector -fno-builtin -fshort-wchar -fasm-blocks -mdynamic-no-pic -mno-implicit-float -mms-bitfields -msoft-float -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang $(PLATFORM_FLAGS) ################## # X64 definitions ##################- DEBUG_XCODE5_X64_DLINK_FLAGS = -arch x86_64 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map+ DEBUG_XCODE5_X64_DLINK_FLAGS = -arch x86_64 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map -object_path_lto $(DEST_DIR_DEBUG)/$(BASE_NAME).lto NOOPT_XCODE5_X64_DLINK_FLAGS = -arch x86_64 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map-RELEASE_XCODE5_X64_DLINK_FLAGS = -arch x86_64 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map+RELEASE_XCODE5_X64_DLINK_FLAGS = -arch x86_64 -u _$(IMAGE_ENTRY_POINT) -e _$(IMAGE_ENTRY_POINT) -preload -segalign 0x20 -pie -all_load -dead_strip -seg1addr 0x240 -map $(DEST_DIR_DEBUG)/$(BASE_NAME).map -object_path_lto $(DEST_DIR_DEBUG)/$(BASE_NAME).lto *_XCODE5_X64_SLINK_FLAGS = -static -o DEBUG_XCODE5_X64_ASM_FLAGS = -arch x86_64 -g@@ -2957,9 +2957,9 @@ RELEASE_XCODE5_X64_ASM_FLAGS = -arch x86_64
*_XCODE5_*_PP_FLAGS = -E -x assembler-with-cpp -include AutoGen.h *_XCODE5_*_VFRPP_FLAGS = -x c -E -P -DVFRCOMPILE -include $(MODULE_NAME)StrDefs.h - DEBUG_XCODE5_X64_CC_FLAGS = -target x86_64-pc-win32-macho -c -g -gdwarf -Os -Wall -Werror -Wextra -include AutoGen.h -funsigned-char -fno-ms-extensions -fno-stack-protector -fno-builtin -fshort-wchar -mno-implicit-float -mms-bitfields -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang -D NO_MSABI_VA_FUNCS $(PLATFORM_FLAGS)+ DEBUG_XCODE5_X64_CC_FLAGS = -target x86_64-pc-win32-macho -c -g -gdwarf -Os -flto -Wall -Werror -Wextra -include AutoGen.h -funsigned-char -fno-ms-extensions -fno-stack-protector -fno-builtin -fshort-wchar -mno-implicit-float -mms-bitfields -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang -D NO_MSABI_VA_FUNCS $(PLATFORM_FLAGS) NOOPT_XCODE5_X64_CC_FLAGS = -target x86_64-pc-win32-macho -c -g -gdwarf -O0 -Wall -Werror -Wextra -include AutoGen.h -funsigned-char -fno-ms-extensions -fno-stack-protector -fno-builtin -fshort-wchar -mno-implicit-float -mms-bitfields -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang -D NO_MSABI_VA_FUNCS $(PLATFORM_FLAGS)-RELEASE_XCODE5_X64_CC_FLAGS = -target x86_64-pc-win32-macho -c -Os -Wall -Werror -Wextra -include AutoGen.h -funsigned-char -fno-ms-extensions -fno-stack-protector -fno-builtin -fshort-wchar -mno-implicit-float -mms-bitfields -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -Wno-unused-const-variable -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang -D NO_MSABI_VA_FUNCS $(PLATFORM_FLAGS)+RELEASE_XCODE5_X64_CC_FLAGS = -target x86_64-pc-win32-macho -c -Os -flto -Wall -Werror -Wextra -include AutoGen.h -funsigned-char -fno-ms-extensions -fno-stack-protector -fno-builtin -fshort-wchar -mno-implicit-float -mms-bitfields -Wno-unused-parameter -Wno-missing-braces -Wno-missing-field-initializers -Wno-tautological-compare -Wno-sign-compare -Wno-varargs -Wno-unused-const-variable -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang -D NO_MSABI_VA_FUNCS $(PLATFORM_FLAGS) #################################################################################### #--
2.24.1 (Apple Git-126)


-=-=-=-=-=-=
Groups.io Links: You receive all messages sent to this group.

View/Reply Online (#60202): https://edk2.groups.io/g/devel/message/60202
Mute This Topic: https://groups.io/mt/74449794/1768742
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [bob.c.feng@...] -=-=-=-=-=-=


Re: [EXTERNAL] [edk2-devel] [edk2-rfc] GitHub Pull Request based Code Review Process

Bret Barkelew <bret.barkelew@...>
 

So, today I followed the Wiki (that I had never seen) and now I’m staring down the barrel of this fellow…

 

[Not using SSL_VERIFY_PEER due to out-of-date IO::Socket::SSL.

To use SSL please install IO::Socket::SSL with version>=2.007 at /usr/share/perl5/core_perl/Net/SMTP.pm line 270.]

 

Anyone have thoughts? I’mma go get a scotch.

 

- Bret

 

From: Andrew Fish
Sent: Monday, May 25, 2020 11:28 AM
To: Laszlo Ersek
Cc: Bret Barkelew; devel@edk2.groups.io; spbrogan@...; rfc@edk2.groups.io; Desimone, Nathaniel L; Kinney, Michael D; Leif Lindholm (Nuvia address)
Subject: Re: [EXTERNAL] [edk2-devel] [edk2-rfc] GitHub Pull Request based Code Review Process

 



> On May 25, 2020, at 11:10 AM, Laszlo Ersek <lersek@...> wrote:
>
> Hi Andrew,
>
> On 05/25/20 06:09, Andrew Fish wrote:
>
>> I also found I had to Bing/Google to find the detailed instructions I
>> needed as a developer, as the Wiki seems to assume you just know the
>> Linux kernel patch process. That feels like an area we can improve.
>
> (apologies if I've lost context; please disregard my message below in
> that case).
>
> I wrote the following wiki article originally in 2016:
>
> https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Ftianocore%2Ftianocore.github.io%2Fwiki%2FLaszlo%27s-unkempt-git-guide-for-edk2-contributors-and-maintainers&amp;data=02%7C01%7CBret.Barkelew%40microsoft.com%7C2e084613c24f433ca0a508d800d978de%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637260281325061578&amp;sdata=nIMHQLnu8F%2F%2BTMMsLKVXbWnO6AWE9WuUu5k1TK4HgTQ%3D&amp;reserved=0
>
> I wrote it specifically for developers & maintainers with no (or almost
> no) prior git / mailing list experience. Multiple developers confirmed
> later that the article had helped them.
>

Laszlo,

Your wiki article was very very helpful. I just could not find it from the Tianocre wiki. It would be good if we could link to it from here [1], maybe as add to this: "Are you new to using git? If so, then the New to git page may be helpful."?

There are a lot folks who use git but don't use the email based review so they have never setup git with emali before. Your wiki, plus me figuring out the magic internal SMTP reflector (I reached out on an internal git malling list) is what got me unblocked.

[1] https://nam06.safelinks.protection.outlook.com/?url=https%3A%2F%2Fgithub.com%2Ftianocore%2Ftianocore.github.io%2Fwiki%2FEDK-II-Development-Process&amp;data=02%7C01%7CBret.Barkelew%40microsoft.com%7C2e084613c24f433ca0a508d800d978de%7C72f988bf86f141af91ab2d7cd011db47%7C1%7C0%7C637260281325061578&amp;sdata=XPx6jrloPC9LW0iCecZuFmaz3JgjCSQYeF0PEyGW4I0%3D&amp;reserved=0

Thanks,

Andrew Fish

> Thanks
> Laszlo
>

 


Upcoming Event: TianoCore Bug Triage - APAC / NAMO - Tue, 05/26/2020 6:30pm-7:30pm #cal-reminder

devel@edk2.groups.io Calendar <devel@...>
 

Reminder: TianoCore Bug Triage - APAC / NAMO

When: Tuesday, 26 May 2020, 6:30pm to 7:30pm, (GMT-07:00) America/Los Angeles

Where:https://bluejeans.com/889357567?src=join_info

View Event

Organizer: Brian Richardson brian.richardson@...

Description:

https://www.tianocore.org/bug-triage

 

Meeting URL

https://bluejeans.com/889357567?src=join_info

 

Meeting ID

889 357 567

 

Want to dial in from a phone?

Dial one of the following numbers:

+1.408.740.7256 (US (San Jose))

+1.408.317.9253 (US (Primary, San Jose))

 

(see all numbers - https://www.bluejeans.com/numbers)

Enter the meeting ID and passcode followed by #