[PATCH v9 1/2] CryptoPkg: Add CryptoPkg Token Space GUID
Sukerkar, Amol N
Added CryptoPkg Token Space GUID to be able to define PCDs.
Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Amol N Sukerkar <amol.n.sukerkar@intel.com> --- Notes: v6 - removed file CryptoPkgTokenSpace.h v7 - fixed typo v8 - Fixed Author and signed-off-by name CryptoPkg/CryptoPkg.dec | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/CryptoPkg/CryptoPkg.dec b/CryptoPkg/CryptoPkg.dec index 08bedd57daad..16f08ea60926 100644 --- a/CryptoPkg/CryptoPkg.dec +++ b/CryptoPkg/CryptoPkg.dec @@ -4,7 +4,7 @@ # This Package provides cryptographic-related libraries for UEFI security modules. # It also provides a test application to test libraries. # -# Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR> +# Copyright (c) 2009 - 2020, Intel Corporation. All rights reserved.<BR> # SPDX-License-Identifier: BSD-2-Clause-Patent # ## @@ -33,5 +33,9 @@ [LibraryClasses] ## TlsLib|Include/Library/TlsLib.h +[Guids] + ## Crypto package token space guid. + gEfiCryptoPkgTokenSpaceGuid = { 0xd3fb176, 0x9569, 0x4d51, { 0xa3, 0xef, 0x7d, 0x61, 0xc6, 0x4f, 0xea, 0xba }} + [UserExtensions.TianoCore."ExtraFiles"] CryptoPkgExtra.uni -- 2.16.2.windows.1
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[PATCH v9 0/2] CryptoPkg/BaseHashApiLib: Implement Unified Hash Calculation API
Sukerkar, Amol N
Currently, the UEFI drivers using the SHA/SM3 hashing algorithms use hard-coded
API to calculate the hash, for instance, sha_256(...), etc. Since SHA384 and/or SM3_256 are being increasingly adopted for robustness, it becomes cumbersome to modify each driver that calls into hash calculating API. To better achieve this, we are proposing a Unified API, which can be used by UEFI drivers, that provides the drivers with flexibility to use the desired hashing algorithm based on the required robnustness. Alternatively, the design document is also attached to Bugzilla, https://bugzilla.tianocore.org/show_bug.cgi?id=2151. Amol N Sukerkar (2): CryptoPkg: Add CryptoPkg Token Space GUID CryptoPkg/BaseHashApiLib: Implement Unified Hash Calculation API CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.c | 333 ++++++++++++++++++++ CryptoPkg/CryptoPkg.dec | 26 +- CryptoPkg/CryptoPkg.dsc | 4 +- CryptoPkg/CryptoPkg.uni | 18 +- CryptoPkg/Include/Library/HashApiLib.h | 122 +++++++ CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.inf | 44 +++ CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.uni | 17 + 7 files changed, 561 insertions(+), 3 deletions(-) create mode 100644 CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.c create mode 100644 CryptoPkg/Include/Library/HashApiLib.h create mode 100644 CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.inf create mode 100644 CryptoPkg/Library/BaseHashApiLib/BaseHashApiLib.uni -- 2.16.2.windows.1
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Re: [Patch] BaseTools/DscBuildData: Fix PCD autogen include file conflict
Michael D Kinney
Liming,
toggle quoted messageShow quoted text
Yes. I think that is a reasonable assumption. We can document that restriction in the EDK II Build Specification that standard POSIX include files (e.g. <stdio.h>) must never be placed in the same directory with other include files that are required for Structured PCD data types or defines/enums that may be used to set Structured PCD field values. We can enter a Tianocore BZ to update the specifications. Thanks, Mike
-----Original Message-----
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Re: [PATCH 2/5] MdePkg: Allow PcdFSBClock to by Dynamic
Anthony PERARD
On Mon, Feb 03, 2020 at 03:34:07PM +0000, Anthony PERARD wrote:
On Mon, Feb 03, 2020 at 01:34:55AM +0000, Gao, Liming wrote:Now that I've given a try, having the value as Dynamic doesn't changeAnthony:No, I haven't. But I don't think it matter in a Xen guest, the APIC timer is anything in a Xen guest. On my test machine, simply running GetPerformanceCounter (); takes between 10000 ns and 20000 ns. Reading the dynamic value from PCD on the other hand takes about 350ns. (10ns if it's static.) When I run NanoSecondDelay() with different values, I have: - with static pcd: 63894 ns to delay by 1 ns 66611 ns to delay by 10 ns 43927 ns to delay by 100 ns 71367 ns to delay by 1000 ns 55881 ns to delay by 10000 ns 147716 ns to delay by 100000 ns 1048335 ns to delay by 1000000 ns 10041179 ns to delay by 10000000 ns - with a dynamic pcd: 40949 ns to delay by 1 ns 84832 ns to delay by 10 ns 82745 ns to delay by 100 ns 59848 ns to delay by 1000 ns 52647 ns to delay by 10000 ns 137051 ns to delay by 100000 ns 1042492 ns to delay by 1000000 ns 10036306 ns to delay by 10000000 ns So, the kind of PCD used for PcdFSBClock on Xen (with OvmfXen) doesn't really matter. Anyway, thanks for the feedback. -- Anthony PERARD
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Upcoming Event: TianoCore Community Meeting - EMEA/NAMO - Thu, 02/06/2020 9:00am-10:00am
#cal-reminder
devel@edk2.groups.io Calendar <devel@...>
Reminder: TianoCore Community Meeting - EMEA/NAMO When: Thursday, 6 February 2020, 9:00am to 10:00am, (GMT-08:00) America/Los Angeles Where:https://bluejeans.com/889357567?src=join_info Organizer: Brian Richardson brian.richardson@... Description: Meeting URL https://bluejeans.com/889357567?src=join_info  Meeting ID 889 357 567  Want to dial in from a phone?  Dial one of the following numbers: +1.408.740.7256 (US (San Jose)) +1.408.317.9253 (US (Primary, San Jose)) (see all numbers - https://www.bluejeans.com/numbers)  Enter the meeting ID and passcode followed by #
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Re: [PATCH v3 00/11] Test against invalid pointers in acpiview
Gao, Zhichao
Sorry for the misunderstanding before. The patch set is good to me.
toggle quoted messageShow quoted text
Series: Reviewed-by: Zhichao Gao <zhichao.gao@intel.com> Thanks, Zhichao
-----Original Message-----
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Re: [PATCH 2/5] MdePkg: Allow PcdFSBClock to by Dynamic
Anthony PERARD
On Mon, Feb 03, 2020 at 01:34:55AM +0000, Gao, Liming wrote:
Anthony:No, I haven't. But I don't think it matter in a Xen guest, the APIC timer is emulated anyway, so reading from a register of the APIC is going to be slower than getting the value from the PCD services, I think. (Hopefully, I'm not too wrong.) But I'll give it at measuring the difference, it would be interesting to know. Thanks, -- Anthony PERARD
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[PATCH 4/4] MdeModulePkg/SdMmcPciHcDxe: Fix PIO transfer mode
Albecki, Mateusz
Current driver does not support PIO transfer mode for
commands other then tuning. This change adds the code to transfer PIO data. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 3 + MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 113 +++++++++++++++++---- 2 files changed, 95 insertions(+), 21 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h index 15b7d12596..fd89306fab 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h @@ -157,6 +157,9 @@ typedef struct { UINT64 Timeout; UINT32 Retries; + BOOLEAN PioModeTransferCompleted; + UINT32 PioBlockIndex; + SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc; SD_MMC_HC_ADMA_64_V3_DESC_LINE *Adma64V3Desc; SD_MMC_HC_ADMA_64_V4_DESC_LINE *Adma64V4Desc; diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 480a1664ea..43703974f7 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -1711,6 +1711,8 @@ SdMmcPrintTrb ( DEBUG ((DebugLevel, "CommandComplete: %d\n", Trb->CommandComplete)); DEBUG ((DebugLevel, "Timeout: %d\n", Trb->Timeout)); DEBUG ((DebugLevel, "Retries: %d\n", Trb->Retries)); + DEBUG ((DebugLevel, "PioModeTransferCompleted: %d\n", Trb->PioModeTransferCompleted)); + DEBUG ((DebugLevel, "PioBlockIndex: %d\n", Trb->PioBlockIndex)); DEBUG ((DebugLevel, "Adma32Desc: %X\n", Trb->Adma32Desc)); DEBUG ((DebugLevel, "Adma64V3Desc: %X\n", Trb->Adma64V3Desc)); DEBUG ((DebugLevel, "Adma64V4Desc: %X\n", Trb->Adma64V4Desc)); @@ -1762,6 +1764,8 @@ SdMmcCreateTrb ( Trb->CommandComplete = FALSE; Trb->Timeout = Packet->Timeout; Trb->Retries = SD_MMC_TRB_RETRIES; + Trb->PioModeTransferCompleted = FALSE; + Trb->PioBlockIndex = 0; Trb->Private = Private; if ((Packet->InTransferLength != 0) && (Packet->InDataBuffer != NULL)) { @@ -2447,6 +2451,85 @@ SdMmcCheckCommandComplete ( return EFI_NOT_READY; } +/** + Transfers data from card using PIO method. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + @param[in] IntStatus Snapshot of the normal interrupt status register. + + @retval EFI_SUCCESS PIO transfer completed successfully. + @retval EFI_NOT_READY PIO transfer completion still pending. + @retval Others PIO transfer failed to complete. +**/ +EFI_STATUS +SdMmcTransferDataWithPio ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb, + IN UINT16 IntStatus + ) +{ + EFI_STATUS Status; + UINT16 Data16; + UINT32 BlockCount; + + BlockCount = (Trb->DataLen / Trb->BlockSize); + if (Trb->DataLen % Trb->BlockSize != 0) { + BlockCount += 1; + } + + if (Trb->PioBlockIndex >= BlockCount) { + return EFI_SUCCESS; + } + + if (Trb->Read) { + if ((IntStatus & BIT5) == 0) { + return EFI_NOT_READY; + } + Data16 = BIT5; + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (Data16), &Data16); + + Status = Private->PciIo->Mem.Read ( + Private->PciIo, + EfiPciIoWidthFifoUint8, + Trb->Slot, + SD_MMC_HC_BUF_DAT_PORT, + Trb->BlockSize, + (VOID*)((UINT8*)Trb->Data + (Trb->BlockSize * Trb->PioBlockIndex)) + ); + if (EFI_ERROR (Status)) { + return Status; + } + Trb->PioBlockIndex++; + } else { + if ((IntStatus & BIT4) == 0) { + return EFI_NOT_READY; + } + Data16 = BIT4; + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (Data16), &Data16); + + Status = Private->PciIo->Mem.Write ( + Private->PciIo, + EfiPciIoWidthFifoUint8, + Trb->Slot, + SD_MMC_HC_BUF_DAT_PORT, + Trb->BlockSize, + (VOID*)((UINT8*)Trb->Data + (Trb->BlockSize * Trb->PioBlockIndex)) + ); + if (EFI_ERROR (Status)) { + return Status; + } + Trb->PioBlockIndex++; + } + + if (Trb->PioBlockIndex >= BlockCount) { + Trb->PioModeTransferCompleted = TRUE; + return EFI_SUCCESS; + } else { + return EFI_NOT_READY; + } +} + /** Update the SDMA address on the SDMA buffer boundary interrupt. @@ -2531,6 +2614,13 @@ SdMmcCheckDataTransfer ( return Status; } + if (Trb->Mode == SdMmcPioMode && !Trb->PioModeTransferCompleted) { + Status = SdMmcTransferDataWithPio (Private, Trb, IntStatus); + if (EFI_ERROR (Status)) { + return Status; + } + } + if ((Trb->Mode == SdMmcSdmaMode) && ((IntStatus & BIT3) != 0)) { Data16 = BIT3; Status = SdMmcHcRwMmio ( @@ -2573,7 +2663,6 @@ SdMmcCheckTrbResult ( EFI_STATUS Status; EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; UINT16 IntStatus; - UINT32 PioLength; Packet = Trb->Packet; // @@ -2609,26 +2698,8 @@ SdMmcCheckTrbResult ( (Packet->SdMmcCmdBlk->CommandIndex == EMMC_SEND_TUNING_BLOCK)) || ((Private->Slot[Trb->Slot].CardType == SdCardType) && (Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK))) { - // - // When performing tuning procedure (Execute Tuning is set to 1) through PIO mode, - // wait Buffer Read Ready bit of Normal Interrupt Status Register to be 1. - // Refer to SD Host Controller Simplified Specification 3.0 figure 2-29 for details. - // - if ((IntStatus & BIT5) == BIT5) { - // - // Clear Buffer Read Ready interrupt at first. - // - IntStatus = BIT5; - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (IntStatus), &IntStatus); - // - // Read data out from Buffer Port register - // - for (PioLength = 0; PioLength < Trb->DataLen; PioLength += 4) { - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_BUF_DAT_PORT, TRUE, 4, (UINT8*)Trb->Data + PioLength); - } - Status = EFI_SUCCESS; - goto Done; - } + Status = SdMmcTransferDataWithPio (Private, Trb, IntStatus); + goto Done; } if (!Trb->CommandComplete) { -- 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
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[PATCH 3/4] MdeModulePkg/SdMmcPciHcDxe: Refactor data transfer completion
Albecki, Mateusz
This patch refactors the way in which the driver will check
the data transfer completion. Data transfer related functionalities have been moved to separate function. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 181 ++++++++++++++--------- 1 file changed, 112 insertions(+), 69 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 3dfaae8542..480a1664ea 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -2447,6 +2447,112 @@ SdMmcCheckCommandComplete ( return EFI_NOT_READY; } +/** + Update the SDMA address on the SDMA buffer boundary interrupt. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + + @retval EFI_SUCCESS Updated SDMA buffer address. + @retval Others Failed to update SDMA buffer address. +**/ +EFI_STATUS +SdMmcUpdateSdmaAddress ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb + ) +{ + UINT64 SdmaAddr; + EFI_STATUS Status; + + SdmaAddr = SD_MMC_SDMA_ROUND_UP ((UINTN)Trb->DataPhy, SD_MMC_SDMA_BOUNDARY); + + if (Private->ControllerVersion[Trb->Slot] >= SD_MMC_HC_CTRL_VER_400) { + Status = SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_ADMA_SYS_ADDR, + FALSE, + sizeof (UINT64), + &SdmaAddr + ); + } else { + Status = SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_SDMA_ADDR, + FALSE, + sizeof (UINT32), + &SdmaAddr + ); + } + + if (EFI_ERROR (Status)) { + return Status; + } + + Trb->DataPhy = (UINT64)(UINTN)SdmaAddr; + return EFI_SUCCESS; +} + +/** + Checks if the data transfer completed and performs any actions + neccessary to continue the data transfer such as SDMA system + address fixup or PIO data transfer. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + @param[in] IntStatus Snapshot of the normal interrupt status register. + + @retval EFI_SUCCESS Data transfer completed successfully. + @retval EFI_NOT_READY Data transfer completion still pending. + @retval Others Data transfer failed to complete. +**/ +EFI_STATUS +SdMmcCheckDataTransfer ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb, + IN UINT16 IntStatus + ) +{ + UINT16 Data16; + EFI_STATUS Status; + + if ((IntStatus & BIT1) != 0) { + Data16 = BIT1; + Status = SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_NOR_INT_STS, + FALSE, + sizeof (Data16), + &Data16 + ); + return Status; + } + + if ((Trb->Mode == SdMmcSdmaMode) && ((IntStatus & BIT3) != 0)) { + Data16 = BIT3; + Status = SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_NOR_INT_STS, + FALSE, + sizeof (Data16), + &Data16 + ); + if (EFI_ERROR (Status)) { + return Status; + } + Status = SdMmcUpdateSdmaAddress (Private, Trb); + if (EFI_ERROR (Status)) { + return Status; + } + } + + return EFI_NOT_READY; +} + /** Check the TRB execution result. @@ -2467,7 +2573,6 @@ SdMmcCheckTrbResult ( EFI_STATUS Status; EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; UINT16 IntStatus; - UINT64 SdmaAddr; UINT32 PioLength; Packet = Trb->Packet; @@ -2530,80 +2635,18 @@ SdMmcCheckTrbResult ( Status = SdMmcCheckCommandComplete (Private, Trb, IntStatus); if (EFI_ERROR (Status)) { goto Done; - } else { - // - // If the command doesn't require data transfer skip the transfer - // complete checking. - // - if ((Packet->SdMmcCmdBlk->CommandType != SdMmcCommandTypeAdtc) && - (Packet->SdMmcCmdBlk->ResponseType != SdMmcResponseTypeR1b) && - (Packet->SdMmcCmdBlk->ResponseType != SdMmcResponseTypeR5b)) { - goto Done; - } } } - // - // Check Transfer Complete bit is set or not. - // - if ((IntStatus & BIT1) == BIT1) { - goto Done; - } - - // - // Check if DMA interrupt is signalled for the SDMA transfer. - // - if ((Trb->Mode == SdMmcSdmaMode) && ((IntStatus & BIT3) == BIT3)) { - // - // Clear DMA interrupt bit. - // - IntStatus = BIT3; - Status = SdMmcHcRwMmio ( - Private->PciIo, - Trb->Slot, - SD_MMC_HC_NOR_INT_STS, - FALSE, - sizeof (IntStatus), - &IntStatus - ); - if (EFI_ERROR (Status)) { - goto Done; - } - // - // Update SDMA Address register. - // - SdmaAddr = SD_MMC_SDMA_ROUND_UP ((UINTN)Trb->DataPhy, SD_MMC_SDMA_BOUNDARY); - - if (Private->ControllerVersion[Trb->Slot] >= SD_MMC_HC_CTRL_VER_400) { - Status = SdMmcHcRwMmio ( - Private->PciIo, - Trb->Slot, - SD_MMC_HC_ADMA_SYS_ADDR, - FALSE, - sizeof (UINT64), - &SdmaAddr - ); - } else { - Status = SdMmcHcRwMmio ( - Private->PciIo, - Trb->Slot, - SD_MMC_HC_SDMA_ADDR, - FALSE, - sizeof (UINT32), - &SdmaAddr - ); - } - - if (EFI_ERROR (Status)) { - goto Done; - } - Trb->DataPhy = (UINT64)(UINTN)SdmaAddr; + if (Packet->SdMmcCmdBlk->CommandType == SdMmcCommandTypeAdtc || + Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR1b || + Packet->SdMmcCmdBlk->ResponseType == SdMmcResponseTypeR5b) { + Status = SdMmcCheckDataTransfer (Private, Trb, IntStatus); + } else { + Status = EFI_SUCCESS; } - - Status = EFI_NOT_READY; Done: - if (Status != EFI_NOT_READY) { SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE); if (EFI_ERROR (Status)) { -- 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
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[PATCH 2/4] MdeModulePkg/SdMmcPciHcDxe: Read response on command completion
Albecki, Mateusz
SdMmcPciHcDxe driver used to read response only after
command and data transfer completed. According to SDHCI specification response data is ready after the command complete status is set by the host controller. Getting the response data early will help debugging the cases when command completed but data transfer timed out. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 1 + MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 201 +++++++++++++++------ 2 files changed, 144 insertions(+), 58 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h index 5bc3577ba2..15b7d12596 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h @@ -153,6 +153,7 @@ typedef struct { EFI_EVENT Event; BOOLEAN Started; + BOOLEAN CommandComplete; UINT64 Timeout; UINT32 Retries; diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index 959645bf26..3dfaae8542 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -1708,6 +1708,7 @@ SdMmcPrintTrb ( DEBUG ((DebugLevel, "AdmaLengthMode: %d\n", Trb->AdmaLengthMode)); DEBUG ((DebugLevel, "Event: %d\n", Trb->Event)); DEBUG ((DebugLevel, "Started: %d\n", Trb->Started)); + DEBUG ((DebugLevel, "CommandComplete: %d\n", Trb->CommandComplete)); DEBUG ((DebugLevel, "Timeout: %d\n", Trb->Timeout)); DEBUG ((DebugLevel, "Retries: %d\n", Trb->Retries)); DEBUG ((DebugLevel, "Adma32Desc: %X\n", Trb->Adma32Desc)); @@ -1758,6 +1759,7 @@ SdMmcCreateTrb ( Trb->Packet = Packet; Trb->Event = Event; Trb->Started = FALSE; + Trb->CommandComplete = FALSE; Trb->Timeout = Packet->Timeout; Trb->Retries = SD_MMC_TRB_RETRIES; Trb->Private = Private; @@ -2352,6 +2354,99 @@ SdMmcCheckAndRecoverErrors ( return ErrorStatus; } +/** + Reads the response data into the TRB buffer. + This function assumes that caller made sure that + command has completed. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + + @retval EFI_SUCCESS Response read successfully. + @retval Others Failed to get response. +**/ +EFI_STATUS +SdMmcGetResponse ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb + ) +{ + EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; + UINT8 Index; + UINT32 Response[4]; + EFI_STATUS Status; + + Packet = Trb->Packet; + + if (Packet->SdMmcCmdBlk->CommandType == SdMmcCommandTypeBc) { + return EFI_SUCCESS; + } + + for (Index = 0; Index < 4; Index++) { + Status = SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_RESPONSE + Index * 4, + TRUE, + sizeof (UINT32), + &Response[Index] + ); + if (EFI_ERROR (Status)) { + return Status; + } + } + CopyMem (Packet->SdMmcStatusBlk, Response, sizeof (Response)); + + return EFI_SUCCESS; +} + +/** + Checks if the command completed. If the command + completed it gets the response and records the + command completion in the TRB. + + @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance. + @param[in] Trb The pointer to the SD_MMC_HC_TRB instance. + @param[in] IntStatus Snapshot of the normal interrupt status register. + + @retval EFI_SUCCESS Command completed successfully. + @retval EFI_NOT_READY Command completion still pending. + @retval Others Command failed to complete. +**/ +EFI_STATUS +SdMmcCheckCommandComplete ( + IN SD_MMC_HC_PRIVATE_DATA *Private, + IN SD_MMC_HC_TRB *Trb, + IN UINT16 IntStatus + ) +{ + UINT16 Data16; + EFI_STATUS Status; + + if ((IntStatus & BIT0) != 0) { + Data16 = BIT0; + Status = SdMmcHcRwMmio ( + Private->PciIo, + Trb->Slot, + SD_MMC_HC_NOR_INT_STS, + FALSE, + sizeof (Data16), + &Data16 + ); + if (EFI_ERROR (Status)) { + return Status; + } + Status = SdMmcGetResponse (Private, Trb); + if (EFI_ERROR (Status)) { + return Status; + } + Trb->CommandComplete = TRUE; + return EFI_SUCCESS; + } + + return EFI_NOT_READY; +} + /** Check the TRB execution result. @@ -2372,9 +2467,7 @@ SdMmcCheckTrbResult ( EFI_STATUS Status; EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet; UINT16 IntStatus; - UINT32 Response[4]; UINT64 SdmaAddr; - UINT8 Index; UINT32 PioLength; Packet = Trb->Packet; @@ -2402,6 +2495,54 @@ SdMmcCheckTrbResult ( goto Done; } + // + // Tuning commands are the only ones that do not generate command + // complete interrupt. Process them here before entering the code + // that waits for command completion. + // + if (((Private->Slot[Trb->Slot].CardType == EmmcCardType) && + (Packet->SdMmcCmdBlk->CommandIndex == EMMC_SEND_TUNING_BLOCK)) || + ((Private->Slot[Trb->Slot].CardType == SdCardType) && + (Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK))) { + // + // When performing tuning procedure (Execute Tuning is set to 1) through PIO mode, + // wait Buffer Read Ready bit of Normal Interrupt Status Register to be 1. + // Refer to SD Host Controller Simplified Specification 3.0 figure 2-29 for details. + // + if ((IntStatus & BIT5) == BIT5) { + // + // Clear Buffer Read Ready interrupt at first. + // + IntStatus = BIT5; + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (IntStatus), &IntStatus); + // + // Read data out from Buffer Port register + // + for (PioLength = 0; PioLength < Trb->DataLen; PioLength += 4) { + SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_BUF_DAT_PORT, TRUE, 4, (UINT8*)Trb->Data + PioLength); + } + Status = EFI_SUCCESS; + goto Done; + } + } + + if (!Trb->CommandComplete) { + Status = SdMmcCheckCommandComplete (Private, Trb, IntStatus); + if (EFI_ERROR (Status)) { + goto Done; + } else { + // + // If the command doesn't require data transfer skip the transfer + // complete checking. + // + if ((Packet->SdMmcCmdBlk->CommandType != SdMmcCommandTypeAdtc) && + (Packet->SdMmcCmdBlk->ResponseType != SdMmcResponseTypeR1b) && + (Packet->SdMmcCmdBlk->ResponseType != SdMmcResponseTypeR5b)) { + goto Done; + } + } + } + // // Check Transfer Complete bit is set or not. // @@ -2459,65 +2600,9 @@ SdMmcCheckTrbResult ( Trb->DataPhy = (UINT64)(UINTN)SdmaAddr; } - if ((Packet->SdMmcCmdBlk->CommandType != SdMmcCommandTypeAdtc) && - (Packet->SdMmcCmdBlk->ResponseType != SdMmcResponseTypeR1b) && - (Packet->SdMmcCmdBlk->ResponseType != SdMmcResponseTypeR5b)) { - if ((IntStatus & BIT0) == BIT0) { - Status = EFI_SUCCESS; - goto Done; - } - } - - if (((Private->Slot[Trb->Slot].CardType == EmmcCardType) && - (Packet->SdMmcCmdBlk->CommandIndex == EMMC_SEND_TUNING_BLOCK)) || - ((Private->Slot[Trb->Slot].CardType == SdCardType) && - (Packet->SdMmcCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK))) { - // - // When performing tuning procedure (Execute Tuning is set to 1) through PIO mode, - // wait Buffer Read Ready bit of Normal Interrupt Status Register to be 1. - // Refer to SD Host Controller Simplified Specification 3.0 figure 2-29 for details. - // - if ((IntStatus & BIT5) == BIT5) { - // - // Clear Buffer Read Ready interrupt at first. - // - IntStatus = BIT5; - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_NOR_INT_STS, FALSE, sizeof (IntStatus), &IntStatus); - // - // Read data out from Buffer Port register - // - for (PioLength = 0; PioLength < Trb->DataLen; PioLength += 4) { - SdMmcHcRwMmio (Private->PciIo, Trb->Slot, SD_MMC_HC_BUF_DAT_PORT, TRUE, 4, (UINT8*)Trb->Data + PioLength); - } - Status = EFI_SUCCESS; - goto Done; - } - } Status = EFI_NOT_READY; Done: - // - // Get response data when the cmd is executed successfully. - // - if (!EFI_ERROR (Status)) { - if (Packet->SdMmcCmdBlk->CommandType != SdMmcCommandTypeBc) { - for (Index = 0; Index < 4; Index++) { - Status = SdMmcHcRwMmio ( - Private->PciIo, - Trb->Slot, - SD_MMC_HC_RESPONSE + Index * 4, - TRUE, - sizeof (UINT32), - &Response[Index] - ); - if (EFI_ERROR (Status)) { - SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE); - return Status; - } - } - CopyMem (Packet->SdMmcStatusBlk, Response, sizeof (Response)); - } - } if (Status != EFI_NOT_READY) { SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE); -- 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
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[PATCH 1/4] MdeModulePkg/SdMmcPciHcDxe: Enhance driver traces
Albecki, Mateusz
To allow for easier debug of failing commands we
have added a capability to print TRB and command packet when we start execution of the TRB(on DEBUG_VERBOSE level) and when the TRB failed to execute correctly(on DEBUG_ERROR level). Additionally we will also print error interrupt status and interrupt status register on failed SD command. Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Signed-off-by: Mateusz Albecki <mateusz.albecki@intel.com> --- MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 87 ++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c index b05c818462..959645bf26 100644 --- a/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c +++ b/MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c @@ -1643,6 +1643,82 @@ BuildAdmaDescTable ( return EFI_SUCCESS; } +/** + Prints the contents of the command packet to the debug port. + + @param[in] DebugLevel Debug level at which the packet should be printed. + @param[in] Packet Pointer to packet to print. +**/ +VOID +SdMmcPrintPacket ( + IN UINT32 DebugLevel, + IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet + ) +{ + if (Packet == NULL) { + return; + } + + DEBUG ((DebugLevel, "Printing EFI_SD_MMC_PASS_THRU_COMMAND_PACKET\n")); + if (Packet->SdMmcCmdBlk != NULL) { + DEBUG ((DebugLevel, "Command index: %d, argument: %X\n", Packet->SdMmcCmdBlk->CommandIndex, Packet->SdMmcCmdBlk->CommandArgument)); + DEBUG ((DebugLevel, "Command type: %d, response type: %d\n", Packet->SdMmcCmdBlk->CommandType, Packet->SdMmcCmdBlk->ResponseType)); + } + if (Packet->SdMmcStatusBlk != NULL) { + DEBUG ((DebugLevel, "Response 0: %X, 1: %X, 2: %X, 3: %X\n", + Packet->SdMmcStatusBlk->Resp0, + Packet->SdMmcStatusBlk->Resp1, + Packet->SdMmcStatusBlk->Resp2, + Packet->SdMmcStatusBlk->Resp3 + )); + } + DEBUG ((DebugLevel, "Timeout: %d\n", Packet->Timeout)); + DEBUG ((DebugLevel, "InDataBuffer: %X\n", Packet->InDataBuffer)); + DEBUG ((DebugLevel, "OutDataBuffer: %X\n", Packet->OutDataBuffer)); + DEBUG ((DebugLevel, "InTransferLength: %d\n", Packet->InTransferLength)); + DEBUG ((DebugLevel, "OutTransferLength: %d\n", Packet->OutTransferLength)); + DEBUG ((DebugLevel, "TransactionStatus: %r\n", Packet->TransactionStatus)); +} + +/** + Prints the contents of the TRB to the debug port. + + @param[in] DebugLevel Debug level at which the TRB should be printed. + @param[in] Trb Pointer to the TRB structure. +**/ +VOID +SdMmcPrintTrb ( + IN UINT32 DebugLevel, + IN SD_MMC_HC_TRB *Trb + ) +{ + if (Trb == NULL) { + return; + } + + DEBUG ((DebugLevel, "Printing SD_MMC_HC_TRB\n")); + DEBUG ((DebugLevel, "Slot: %d\n", Trb->Slot)); + DEBUG ((DebugLevel, "BlockSize: %d\n", Trb->BlockSize)); + DEBUG ((DebugLevel, "Data: %X\n", Trb->Data)); + DEBUG ((DebugLevel, "DataLen: %d\n", Trb->DataLen)); + DEBUG ((DebugLevel, "Read: %d\n", Trb->Read)); + DEBUG ((DebugLevel, "DataPhy: %X\n", Trb->DataPhy)); + DEBUG ((DebugLevel, "DataMap: %X\n", Trb->DataMap)); + DEBUG ((DebugLevel, "Mode: %d\n", Trb->Mode)); + DEBUG ((DebugLevel, "AdmaLengthMode: %d\n", Trb->AdmaLengthMode)); + DEBUG ((DebugLevel, "Event: %d\n", Trb->Event)); + DEBUG ((DebugLevel, "Started: %d\n", Trb->Started)); + DEBUG ((DebugLevel, "Timeout: %d\n", Trb->Timeout)); + DEBUG ((DebugLevel, "Retries: %d\n", Trb->Retries)); + DEBUG ((DebugLevel, "Adma32Desc: %X\n", Trb->Adma32Desc)); + DEBUG ((DebugLevel, "Adma64V3Desc: %X\n", Trb->Adma64V3Desc)); + DEBUG ((DebugLevel, "Adma64V4Desc: %X\n", Trb->Adma64V4Desc)); + DEBUG ((DebugLevel, "AdmaMap: %X\n", Trb->AdmaMap)); + DEBUG ((DebugLevel, "AdmaPages: %X\n", Trb->AdmaPages)); + + SdMmcPrintPacket (DebugLevel, Trb->Packet); +} + /** Create a new TRB for the SD/MMC cmd request. @@ -1963,6 +2039,9 @@ SdMmcExecTrb ( UINT64 AdmaAddr; BOOLEAN AddressingMode64; + DEBUG ((DEBUG_VERBOSE, "Starting TRB execution\n")); + SdMmcPrintTrb (DEBUG_VERBOSE, Trb); + AddressingMode64 = FALSE; Packet = Trb->Packet; @@ -2235,6 +2314,10 @@ SdMmcCheckAndRecoverErrors ( return Status; } + DEBUG ((DEBUG_ERROR, "Error reported by SDHCI\n")); + DEBUG ((DEBUG_ERROR, "Interrupt status = %X\n", IntStatus)); + DEBUG ((DEBUG_ERROR, "Error interrupt status = %X\n", ErrIntStatus)); + // // If the data timeout error is reported // but data transfer is signaled as completed we @@ -2438,6 +2521,10 @@ Done: if (Status != EFI_NOT_READY) { SdMmcHcLedOnOff (Private->PciIo, Trb->Slot, FALSE); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "TRB failed with %r\n", Status)); + SdMmcPrintTrb (DEBUG_ERROR, Trb); + } } return Status; -- 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
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[PATCH 0/4] MdeModulePkg/SdMmcPciHcDxe: Refactor command processing
Albecki, Mateusz
This patch series aims to refactor command processing to achieve following
1. Trace the failing TRB packets to see what commands are failing and for what reasons 2. Get the response data even if data transfer timed out to allow easier debugging 3. Fix the PIO mode which is currently completely broken. Tests performed: 1. Each patch in the series has passed boot from eMMC with ADMAv3 data transfer mode 2. SDMA based boot has been tested with the full patch series 3. PIO based boot has been tested with the full patch series 4. PIO based data transfer has been additionally tested by creating and modyfing a file in EFI shell All tests were performed with eMMC in HS400 @200MHz clock frequency. For easier review & integration patch has been pushed here: Whole series: https://github.com/malbecki/edk2/tree/emmc_transfer_refactor Whole series + SDMA force code(test 3): https://github.com/malbecki/edk2/tree/emmc_transfer_refactor_force_sdma Whole series + PIO force code(test 4): https://github.com/malbecki/edk2/tree/emmc_transfer_refactor_force_pio Cc: Hao A Wu <hao.a.wu@intel.com> Cc: Marcin Wojtas <mw@semihalf.com> Cc: Zhichao Gao <zhichao.gao@intel.com> Cc: Liming Gao <liming.gao@intel.com> Mateusz Albecki (4): MdeModulePkg/SdMmcPciHcDxe: Enhance driver traces MdeModulePkg/SdMmcPciHcDxe: Read response on command completion MdeModulePkg/SdMmcPciHcDxe: Refactor data transfer completion MdeModulePkg/SdMmcPciHcDxe: Fix PIO transfer mode MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHcDxe.h | 4 + MdeModulePkg/Bus/Pci/SdMmcPciHcDxe/SdMmcPciHci.c | 502 ++++++++++++++++----- 2 files changed, 398 insertions(+), 108 deletions(-) -- 2.14.1.windows.1 -------------------------------------------------------------------- Intel Technology Poland sp. z o.o. ul. Slowackiego 173 | 80-298 Gdansk | Sad Rejonowy Gdansk Polnoc | VII Wydzial Gospodarczy Krajowego Rejestru Sadowego - KRS 101882 | NIP 957-07-52-316 | Kapital zakladowy 200.000 PLN. Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej wiadomosci, prosimy o powiadomienie nadawcy oraz trwale jej usuniecie; jakiekolwiek przegladanie lub rozpowszechnianie jest zabronione. This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). If you are not the intended recipient, please contact the sender and delete all copies; any review or distribution by others is strictly prohibited.
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[PATCH] BaseTools: Enhance call stack unwindability for CLANGPDB x64 binary
Steven Shi
From: Steven <steven.shi@intel.com>
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2487 The call stack unwindability of the COFF X64 binary requires the binary to remain the pdata and xdata sections. Details see the MSVC X64 calling convertion doc in below link: https://docs.microsoft.com/en-us/cpp/build/x64-calling-convention Current build options discard or zero the data in pdata and xdata sections which cause the debugger cannot correctly unwind the X64 binary call stack in the runtime. Enhance the build options to force emit the unwind tables and keep the data of pdata and xdata sections correct in the binary. Signed-off-by: Steven Shi <steven.shi@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Bob Feng <bob.c.feng@intel.com> --- BaseTools/Conf/tools_def.template | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/BaseTools/Conf/tools_def.template b/BaseTools/Conf/tools_def.template index feee2bbf16..26294efe05 100755 --- a/BaseTools/Conf/tools_def.template +++ b/BaseTools/Conf/tools_def.template @@ -2759,7 +2759,7 @@ DEFINE CLANGPDB_IA32_TARGET = -target i686-unknown-windows DEFINE CLANGPDB_X64_TARGET = -target x86_64-unknown-windows DEFINE CLANGPDB_WARNING_OVERRIDES = -Wno-parentheses-equality -Wno-tautological-compare -Wno-tautological-constant-out-of-range-compare -Wno-empty-body -Wno-unused-const-variable -Wno-varargs -Wno-unknown-warning-option -Wno-microsoft-enum-forward-reference -DEFINE CLANGPDB_ALL_CC_FLAGS = DEF(GCC48_ALL_CC_FLAGS) DEF(CLANGPDB_WARNING_OVERRIDES) -fno-stack-protector -mms-bitfields -Wno-address -Wno-shift-negative-value -Wno-unknown-pragmas -Wno-incompatible-library-redeclaration -fno-asynchronous-unwind-tables -mno-implicit-float -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang -funsigned-char -fno-ms-extensions -Wno-null-dereference -fms-compatibility -mno-stack-arg-probe +DEFINE CLANGPDB_ALL_CC_FLAGS = DEF(GCC48_ALL_CC_FLAGS) DEF(CLANGPDB_WARNING_OVERRIDES) -fno-stack-protector -mms-bitfields -Wno-address -Wno-shift-negative-value -Wno-unknown-pragmas -Wno-incompatible-library-redeclaration -mno-implicit-float -ftrap-function=undefined_behavior_has_been_optimized_away_by_clang -funsigned-char -fno-ms-extensions -Wno-null-dereference -fms-compatibility -mno-stack-arg-probe ########################### # CLANGPDB IA32 definitions @@ -2817,18 +2817,20 @@ NOOPT_CLANGPDB_IA32_DLINK2_FLAGS = *_CLANGPDB_X64_ASLPP_FLAGS = DEF(GCC_ASLPP_FLAGS) DEF(CLANGPDB_X64_TARGET) *_CLANGPDB_X64_VFRPP_FLAGS = DEF(GCC_VFRPP_FLAGS) DEF(CLANGPDB_X64_TARGET) -DEBUG_CLANGPDB_X64_CC_FLAGS = DEF(CLANGPDB_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -Oz -flto DEF(CLANGPDB_X64_TARGET) -gcodeview -DEBUG_CLANGPDB_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /ALIGN:32 /FILEALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DEBUG:GHASH /lldmap +DEBUG_CLANGPDB_X64_CC_FLAGS = DEF(CLANGPDB_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -Oz -flto DEF(CLANGPDB_X64_TARGET) -gcodeview -funwind-tables +DEBUG_CLANGPDB_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /ALIGN:32 /FILEALIGN:32 /Machine:X64 /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DEBUG:GHASH /lldmap DEBUG_CLANGPDB_X64_DLINK2_FLAGS = +DEBUG_CLANGPDB_X64_GENFW_FLAGS = --keepexceptiontable -RELEASE_CLANGPDB_X64_CC_FLAGS = DEF(CLANGPDB_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -Oz -flto DEF(CLANGPDB_X64_TARGET) +RELEASE_CLANGPDB_X64_CC_FLAGS = DEF(CLANGPDB_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -Oz -flto DEF(CLANGPDB_X64_TARGET) -fno-unwind-tables RELEASE_CLANGPDB_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /IGNORE:4254 /OPT:REF /OPT:ICF=10 /ALIGN:32 /FILEALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /MERGE:.rdata=.data /lldmap RELEASE_CLANGPDB_X64_DLINK2_FLAGS = +RELEASE_CLANGPDB_X64_GENFW_FLAGS = -NOOPT_CLANGPDB_X64_CC_FLAGS = DEF(CLANGPDB_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -O0 DEF(CLANGPDB_X64_TARGET) -gcodeview -NOOPT_CLANGPDB_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /ALIGN:32 /FILEALIGN:32 /SECTION:.xdata,D /SECTION:.pdata,D /Machine:X64 /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DEBUG:GHASH /lldmap +NOOPT_CLANGPDB_X64_CC_FLAGS = DEF(CLANGPDB_ALL_CC_FLAGS) -m64 "-DEFIAPI=__attribute__((ms_abi))" -mno-red-zone -mcmodel=small -O0 DEF(CLANGPDB_X64_TARGET) -gcodeview -funwind-tables +NOOPT_CLANGPDB_X64_DLINK_FLAGS = /NOLOGO /NODEFAULTLIB /IGNORE:4001 /OPT:REF /OPT:ICF=10 /ALIGN:32 /FILEALIGN:32 /Machine:X64 /DLL /ENTRY:$(IMAGE_ENTRY_POINT) /SUBSYSTEM:EFI_BOOT_SERVICE_DRIVER /SAFESEH:NO /BASE:0 /DEBUG:GHASH /lldmap NOOPT_CLANGPDB_X64_DLINK2_FLAGS = - +NOOPT_CLANGPDB_X64_GENFW_FLAGS = --keepexceptiontable # # -- 2.16.1.windows.4
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[edk2-platforms][PATCH 1/1] Platform/RPi4: Add ACPI entry for Genet network interface
The Raspberry Pi 4 platforms uses a Broadcom Genet network interface, for
which we need ACPI entries in order to make it usable under Linux. This patch adds these entries, including a max-dma-burst-size DSD attribute aimed at simplifying support for Genet on distros that use older kernels, such as Debian. Note that we ran these settings through someone working for Broadcom, who okayed the proposed values including ownership of max-dma-burst-size (which we expect to also require for Device Tree usage on older kernels, hence the requirement for a designated owner). Signed-off-by: Pete Batard <pete@akeo.ie> --- Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl | 29 ++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl index b2f1d3439211..12c3967fa9e1 100644 --- a/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl +++ b/Platform/RaspberryPi/RPi4/AcpiTables/Dsdt.asl @@ -267,6 +267,35 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 5, "MSFT", "EDK2", 2) } } + Device (ETH0) + { + Name (_HID, "BCM6E4E") + Name (_CID, "BCM6E4E") + Name (_UID, 0x0) + Name (_CCA, 0x0) + Method (_STA) + { + Return (0xf) + } + Method (_CRS, 0x0, Serialized) + { + Name (RBUF, ResourceTemplate () + { + Memory32Fixed (ReadWrite, 0xfd580000, 0x10000, ) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 0xBD } + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 0xBE } + }) + Return (RBUF) + } + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package () { + Package () { "brcm,max-dma-burst-size", 0x08 }, + Package () { "phy-mode", "rgmii" }, + } + }) + } + // Description: I2C Device (I2C1) { -- 2.21.0.windows.1
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Re: [PATCH v2 1/1] BaseTools: Script for converting .aml to .hex
Liming Gao
Pierre:
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If so, this is not the error for other ACPI table. I suggest to print INFO message and directly return with success return value. Thanks Liming
-----Original Message-----
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Re: [PATCH] UefiCpuPkg RegisterCpuFeaturesLib: Use %08x to print CacheControl Index
Laszlo Ersek
On 02/03/20 10:09, Zeng, Star wrote:
I disagree. It's not about the field width / padding (4 vs. 8-----Original Message-----%04u or %04d is not enough for UINT32 which needs %08x. characters), but the width of the data type. The parameter that's being passed is a UINTN, which is UINT64 on X64. But the format specifier (%d, %u, %x all alike) only expect a UINT32. If we pass a UINT64 (in the form of a UINTN), then we should print it with a UINT64 specifier (such as %lu or %lx). Alternatively, if we know for sure that the value of the UINT64 in question will fit in a UINT32, then we can use %u or %x for printing, but then we need to truncate (cast) the data that's being passed in, to UINT32. My point is that the data size should be a match between what's passed in and what is described with a format specifier. There is no format specifier that directly matches UINTN, so you either need to cast UINTN to UINT64 and use %lx, or cast UINTN to UINT32 and use %x. The patch is not wrong, it's just incomplete (given that we're modifying a format string that mismatches the argument list in other places too). ProcessorNumber and FeatureIndex are UINTNs, and they are being printed with %d. Those are real issues too. I found another real issue is MMIO : %08lx should be MMIO : %016lx as the code is on purpose to get UINT64 MMIO address.Field width / padding are useful to get right, but getting the data types to match is even more important. Thanks Laszlo I prefer to just handle the real issue in this patch. How do you think? 😊
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Re: [PATCH v2 1/1] BaseTools: Script for converting .aml to .hex
PierreGondois
Hello Liming,
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Currently, the only ACPI tables which contain AML bytecode are the DSDT and SSDT tables. We don't need to generate a ".hex" file for other ACPI tables or any other file since we would like to parse AML bytecode. However this is only a safety check and this can be removed if desired. Regards, Pierre
-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Liming Gao via Groups.Io Sent: 03 February 2020 11:58 To: Pierre Gondois <Pierre.Gondois@arm.com>; devel@edk2.groups.io Cc: ard.biesheuvel@linaro.org; Feng, Bob C <bob.c.feng@intel.com>; Sami Mujawar <Sami.Mujawar@arm.com>; nd <nd@arm.com> Subject: Re: [edk2-devel] [PATCH v2 1/1] BaseTools: Script for converting .aml to .hex Pierre: Sorry for late response. I have one comment. Why only allows "DSDT" or "SSDT" in Signature? Thanks Liming -----Original Message-----
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Re: [PATCH 1/2] BaseTools: append -DNO_MSABI_VA_FUNCS option in CLANGPDB tool chain
Liming Gao
Reviewed-by: Liming Gao <liming.gao@intel.com>
toggle quoted messageShow quoted text
-----Original Message-----
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Re: [PATCH 2/2] MdePkg: Use the same VA function for both CLANGPDB and CLANG38
Liming Gao
Reviewed-by: Liming Gao <liming.gao@intel.com>
toggle quoted messageShow quoted text
-----Original Message-----
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[edk2-platforms][PATCH v3 3/3] Platform/RPi4: Enable Broadcom Genet stub driver
From: Jeremy Linton <lintonrjeremy@gmail.com>
This adds the required references to use the Genet stub driver in order to dynamically populate the MAC address for OS consumption. Signed-off-by: Pete Batard <pete@akeo.ie> --- Platform/RaspberryPi/RPi4/RPi4.dsc | 5 +++++ Platform/RaspberryPi/RPi4/RPi4.fdf | 1 + 2 files changed, 6 insertions(+) diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc b/Platform/RaspberryPi/RPi4/RPi4.dsc index b3a114b6e0ed..bd3800c1d653 100644 --- a/Platform/RaspberryPi/RPi4/RPi4.dsc +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc @@ -402,6 +402,7 @@ [PcdsFixedAtBuild.common] gRaspberryPiTokenSpaceGuid.PcdExtendedMemoryBase|0x40000000 gBcm27xxTokenSpaceGuid.PcdBcm27xxRegistersAddress|0xfc000000 gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress|0xfe000000 + gBcmNetTokenSpaceGuid.PcdBcmGenetRegistersAddress|0xfd580000 # PCIe specific addresses gBcm27xxTokenSpaceGuid.PcdBcm27xxPciRegBase|0xfd500000 @@ -648,6 +649,10 @@ [Components.common] # Networking stack # !include NetworkPkg/Network.dsc.inc + Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf { + <LibraryClasses> + NULL|Platform/RaspberryPi/Library/PlatformPcdLib/PlatformPcdLib.inf + } # # RNG diff --git a/Platform/RaspberryPi/RPi4/RPi4.fdf b/Platform/RaspberryPi/RPi4/RPi4.fdf index 2bcfdb3244f6..db393d47bcea 100644 --- a/Platform/RaspberryPi/RPi4/RPi4.fdf +++ b/Platform/RaspberryPi/RPi4/RPi4.fdf @@ -269,6 +269,7 @@ [FV.FvMain] # Networking stack # !include NetworkPkg/Network.fdf.inc + INF Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf # # RNG -- 2.21.0.windows.1
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