Date   

Re: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Wrong instance of PlatformSecLib is used.

Philippe Mathieu-Daudé <philmd@...>
 

On 10/2/19 9:40 AM, Nate DeSimone wrote:
The GalagoPro3 platform in KabylakeOpenBoardPkg is using the
instance of PlatformSecLib in MinPlatformPkg instead of the
instance in KabylakeOpenBoardPkg. The version in MinPlatformPkg
does not support FSP 2.1 Dispatch Mode, whearas the version in
typo: "whereas"

KabylakeOpenBoardPkg does.
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index d67e0cc000..f3dd2b0c91 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -85,7 +85,7 @@
PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHookLib.inf
FspWrapperHobProcessLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/PeiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf
- PlatformSecLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
+ PlatformSecLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/SecFspWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf
FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTestLib/PeiFspWrapperApiTestLib.inf


Re: [edk2-platforms][PATCH V1 0/3] Add FW Boot Media Device Indicator

Andrew Fish
 

Since I was around back in the Intel Tiano days and I've worked on all the PI specs I can share the history. 

The reset vector is a hardware thing. It is usually at the top or bottom of the address space. For x86 it is at the TOP of the ROM and that is why the FV has a VoluteTop file GUID that places the file at the end of the FV, thus the end of that file is the reset vector. If the reset vector is low then the FV header starts with a 16 byte ZeroVector that can contain the reset jump instruction. The other architecture that is out there is a mask ROM, and the mask ROM is the reset vector, and that code hands off to the 2nd level, and sometimes that can be in DRAM or ROM. 

The PI FVs (Firmware Volumes) are abstracted by Firmware Volume Blocks (FVB) the FVB instances abstract the storage media for the firmware. Thus from a PI spec point of view there is not need to define the storage type of the "ROM". That is just an implementation detail, that needs to be managed by the implementation. 

If you think about in UEFI disk are abstracted by the Block IO protocol. We can boot an OS from any Block device, and the firmware does not need to know what kind of disk it is. The purpose of the Block IO protocol is to abstract all possible implementations o block devices. For the "Boot ROM", FVB is the same kind of abstraction. So you can implement PI with out knowing the media type. Managing the media type was is a platform abstraction, thus there is no need for a boot media abstraction in the MdePkg. 

That being said the PI architecture is abstract to a fault. It was designed to abstract all possible future platforms. If there are a family of platforms that share common properties it makes sense to build a platform abstraction package that a set of platforms can share. This is the intent of the PI architecture and the EDKII source base. 

The MdePkg implements the UEFI and PI specs, and other industry standards, with some common libs thrown in. So the MdePkg is not the place to put some implementation hint about the Media Device. You could use a GUIDed HOB for that if needed?

Thanks,

Andrew Fish

On Oct 2, 2019, at 8:02 PM, Kubacki, Michael A <michael.a.kubacki@...> wrote:

In platforms built for boot media other than SPI flash there has been a compelling
need for silicon and platform code to be aware of the firmware boot media but
apart from the UEFI variable driver (which is a special case being addressed
here - https://github.com/makubacki/edk2/tree/storage_agnostic_uefi_variables),
this has not been the case for edk2 repository packages. In some cases, code in SEC
has made assumptions about the reset vector or FIT pointer that do not necessarily
translate to storage media that does not support MMIO. These cases have been
handled more gracefully than checking the firmware boot media technology. This is
just an observation, not necessarily a case for it to stay in IntelSiliconPkg (which
does make it accessible to Intel silicon and platform code).

I suppose the firmware boot media properties could be treated in a similar manner
to Boot Mode as defined in the Platform Initialization spec. If this was done, it may
make more sense to abstract the technology impact onto firmware, for example,
whether it supports MMIO or not (NOR vs NAND flash) instead of what is defined
here with specific technologies such as eMMC and UFS. Otherwise, the specification
describing this would be subject to constant expansion over time keeping pace with
new technologies and cross-generation code (not silicon or platform specific drivers)
may base conditionals on something like eMMC when its algorithm really applies to
all NAND media (which, again, has been the proven observation thus far outside
silicon and platform code).

With that said, I see the firmware boot technology details being more pertinent to
silicon and platform code so that's why this change is made now. It can immediately
address existing needs for these details in silicon and platform code.  Some form of
the firmware boot media details in a more generic package could be useful but it
will likely not align closely with the scope of information needed at this level and is
an undertaking, that in my opinion, is separate but compatible with the work done here.

-----Original Message-----
From: Chaganty, Rangasai V <rangasai.v.chaganty@...>
Sent: Wednesday, October 2, 2019 4:03 PM
To: Kubacki, Michael A <michael.a.kubacki@...>;
devel@edk2.groups.io
Cc: Dong, Eric <eric.dong@...>; Gao, Liming <liming.gao@...>;
Ni, Ray <ray.ni@...>
Subject: RE: [edk2-platforms][PATCH V1 0/3] Add FW Boot Media Device
Indicator

I am not sure if there is a silicon scope around the FirmwareBootMediaLib.
Have we considered adding this interface to MdePkg, instead?

-----Original Message-----
From: Kubacki, Michael A
Sent: Monday, September 30, 2019 6:16 PM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V <rangasai.v.chaganty@...>; Dong, Eric
<eric.dong@...>; Gao, Liming <liming.gao@...>; Ni, Ray
<ray.ni@...>
Subject: [edk2-platforms][PATCH V1 0/3] Add FW Boot Media Device
Indicator

This patch series introduces a mechanism for determining the firmware boot
media device. This allows the firmware boot media to be discovered through
a standardized API.

Traditionally, most systems have only supported firmware storage on SPI
flash. Presently, several other storage technologies are being used to store
boot system firmware such as eMMC, UFS, and NVMe.

The API for all board, platform, and silicon code to consume the firmware
boot media device is provided by the FirmwareBootMediaLib in
IntelSiliconPkg.

A driver (FirmwareBootMediaInfoPei) is added to BoardModulePkg to serve
as a consistent location for reporting the firmware boot device information.
In order to abstract the potentially hardware-specific details to determine
the boot media (for platforms that support multiple firmware boot media
devices), the driver retrieves the boot media information using a new library
class introduced called FirmwareBootMediaInfoLib. A default instance of this
library class is provided in BoardModulePkg that always returns SPI flash. This
is intended to serve as a default implementation of the library for the most
common scenario and to easily allow a board package to substitute the logic
required to determine the boot media in more complex scenarios.
Ultimately, FirmwareBootMediaInfoPei produces a HOB containing the
firmware boot media device information so it can be used in the HOB
consumer phase.

Cc: Sai Chaganty <rangasai.v.chaganty@...>
Cc: Eric Dong <eric.dong@...>
Cc: Liming Gao <liming.gao@...>
Cc: Ray Ni <ray.ni@...>
Signed-off-by: Michael Kubacki <michael.a.kubacki@...>

Michael Kubacki (3):
 IntelSiliconPkg/FirmwareBootMediaLib: Add library
 BoardModulePkg/FirmwareBootMediaInfoLib: Add library
 BoardModulePkg/FirmwareBootMediaInfoPei: Add module

Platform/Intel/BoardModulePkg/BoardModulePkg.dec
|   3 +
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec                                                 |   4
+-
Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
|   5 +
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc                                                 |   4
+-

Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMe
diaInfoPei.inf                  |  46 +++++++++

Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/Pei
FirmwareBootMediaInfoLib.inf |  35 +++++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirm
wareBootMediaLib.inf        |  43 ++++++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareB
ootMediaLib.inf           |  38 +++++++

Platform/Intel/BoardModulePkg/Include/Library/FirmwareBootMediaInfoLi
b.h                          |  26 +++++
Silicon/Intel/IntelSiliconPkg/Include/Library/FirmwareBootMediaLib.h
| 106 +++++++++++++++++++

Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMe
diaInfoPei.c                    |  76 ++++++++++++++

Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/Pei
FirmwareBootMediaInfoLib.c   |  24 +++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirm
wareBootMediaLib.c          | 107 +++++++++++++++++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/FirmwareBoo
tMediaLib.c                | 109 ++++++++++++++++++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareB
ootMediaLib.c             |  82 +++++++++++++++
15 files changed, 706 insertions(+), 2 deletions(-)  create mode 100644
Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMe
diaInfoPei.inf
create mode 100644
Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/Pei
FirmwareBootMediaInfoLib.inf
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirm
wareBootMediaLib.inf
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareB
ootMediaLib.inf
create mode 100644
Platform/Intel/BoardModulePkg/Include/Library/FirmwareBootMediaInfoLi
b.h
create mode 100644
Silicon/Intel/IntelSiliconPkg/Include/Library/FirmwareBootMediaLib.h
create mode 100644
Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMe
diaInfoPei.c
create mode 100644
Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/Pei
FirmwareBootMediaInfoLib.c
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirm
wareBootMediaLib.c
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/FirmwareBoo
tMediaLib.c
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareB
ootMediaLib.c

--
2.16.2.windows.1





Re: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Wrong instance of PlatformSecLib is used.

Kubacki, Michael A
 

Reviewed-by: Michael Kubacki <michael.a.kubacki@intel.com>

-----Original Message-----
From: devel@edk2.groups.io <devel@edk2.groups.io> On Behalf Of Nate
DeSimone
Sent: Wednesday, October 2, 2019 12:41 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A
<michael.a.kubacki@intel.com>; Jeremy Soller <jeremy@system76.com>
Subject: [edk2-devel] [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg:
Wrong instance of PlatformSecLib is used.

The GalagoPro3 platform in KabylakeOpenBoardPkg is using the instance of
PlatformSecLib in MinPlatformPkg instead of the instance in
KabylakeOpenBoardPkg. The version in MinPlatformPkg does not support
FSP 2.1 Dispatch Mode, whearas the version in KabylakeOpenBoardPkg does.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc | 2
+-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
index d67e0cc000..f3dd2b0c91 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
+++
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/OpenBoardPkg.dsc
@@ -85,7 +85,7 @@

PlatformHookLib|$(PROJECT)/Library/BasePlatformHookLib/BasePlatformHo
okLib.inf
FspWrapperHobProcessLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/P
eiFspWrapperHobProcessLib/PeiFspWrapperHobProcessLib.inf-
PlatformSecLib|$(PLATFORM_PACKAGE)/FspWrapper/Library/SecFspWrapp
erPlatformSecLib/SecFspWrapperPlatformSecLib.inf+
PlatformSecLib|$(PLATFORM_BOARD_PACKAGE)/FspWrapper/Library/SecFs
pWrapperPlatformSecLib/SecFspWrapperPlatformSecLib.inf
FspWrapperApiLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/Ba
seFspWrapperApiLib.inf
FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/PeiFspWrapperApiTest
Lib/PeiFspWrapperApiTestLib.inf--
2.23.0.windows.1


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Re: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Resize FSP-T to accommodate debug FSP builds.

Kubacki, Michael A
 

Although it is just a comment, the PcdFlashFvFspTOffset value should be 0xFFF7A000 instead of 0xFFF7C000.

-----Original Message-----
From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Sent: Wednesday, October 2, 2019 12:38 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A
<michael.a.kubacki@intel.com>; Jeremy Soller <jeremy@system76.com>
Subject: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Resize FSP-T to
accommodate debug FSP builds.

Resize the flash map for the GalagoPro3 platform to provide enough space to
accommodate a debug build of FSP-T.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Cc: Jeremy Soller <jeremy@system76.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../GalagoPro3/Include/Fdf/FlashMapInclude.fdf | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapIncl
ude.fdf
b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapIncl
ude.fdf
index b33b1e09a9..1fd7a882cf 100644
---
a/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMapIncl
ude.fdf
+++ b/Platform/Intel/KabylakeOpenBoardPkg/GalagoPro3/Include/Fdf/FlashMa
+++ pInclude.fdf
@@ -41,8 +41,8 @@ SET gSiPkgTokenSpaceGuid.PcdFlashMicrocodeFvSize
= 0x000A0000
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset =
0x00440000 # Flash addr (0xFFE60000) SET
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize = 0x00060000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset =
0x004A0000 # Flash addr (0xFFEC0000)-SET
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize = 0x000BC000
#-SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset =
0x0055C000 # Flash addr (0xFFF7C000)-SET
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00004000
#+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize =
0x000BA000 #+SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset
= 0x0055A000 # Flash addr (0xFFF7C000)+SET
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize = 0x00006000 #
SET gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset =
0x00560000 # Flash addr (0xFFF80000) SET
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize =
0x00080000 #--
2.23.0.windows.1


Re: [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS bit ASSERT

Kubacki, Michael A
 

Please change MmioRead8 () to PciSegmentRead8 () since the address is derived from PCI_SEGMENT_LIB_ADDRESS ().

-----Original Message-----
From: Desimone, Nathaniel L <nathaniel.l.desimone@intel.com>
Sent: Wednesday, October 2, 2019 12:36 AM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Kubacki, Michael A
<michael.a.kubacki@intel.com>; Chaganty, Rangasai V
<rangasai.v.chaganty@intel.com>
Subject: [edk2-platforms] [PATCH V1] KabylakeSiliconPkg: Logic Error in EISS
bit ASSERT

Current ASSERT logic checks that the EISS bit is still set after we clear it. This is
incorrect, it should be checking that that the EISS bit is clear after we clear it.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Michael Kubacki <michael.a.kubacki@intel.com>
Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
.../Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
index aadc367a9f..5fb667dc4a 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/PeiSpiLib/PeiSpiLib.c
@@ -184,7 +184,7 @@ DisableBiosWriteProtect (
B_PCH_SPI_BC_WPD ); - ASSERT ((PciSegmentRead8 (SpiBaseAddress +
R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) != 0);+ ASSERT ((MmioRead8
(SpiBaseAddress + R_PCH_SPI_BC) & B_PCH_SPI_BC_EISS) == 0); return
EFI_SUCCESS; }--
2.23.0.windows.1


Re: [edk2-platforms][PATCH V1 0/3] Add FW Boot Media Device Indicator

Kubacki, Michael A
 

In platforms built for boot media other than SPI flash there has been a compelling
need for silicon and platform code to be aware of the firmware boot media but
apart from the UEFI variable driver (which is a special case being addressed
here - https://github.com/makubacki/edk2/tree/storage_agnostic_uefi_variables),
this has not been the case for edk2 repository packages. In some cases, code in SEC
has made assumptions about the reset vector or FIT pointer that do not necessarily
translate to storage media that does not support MMIO. These cases have been
handled more gracefully than checking the firmware boot media technology. This is
just an observation, not necessarily a case for it to stay in IntelSiliconPkg (which
does make it accessible to Intel silicon and platform code).

I suppose the firmware boot media properties could be treated in a similar manner
to Boot Mode as defined in the Platform Initialization spec. If this was done, it may
make more sense to abstract the technology impact onto firmware, for example,
whether it supports MMIO or not (NOR vs NAND flash) instead of what is defined
here with specific technologies such as eMMC and UFS. Otherwise, the specification
describing this would be subject to constant expansion over time keeping pace with
new technologies and cross-generation code (not silicon or platform specific drivers)
may base conditionals on something like eMMC when its algorithm really applies to
all NAND media (which, again, has been the proven observation thus far outside
silicon and platform code).

With that said, I see the firmware boot technology details being more pertinent to
silicon and platform code so that's why this change is made now. It can immediately
address existing needs for these details in silicon and platform code. Some form of
the firmware boot media details in a more generic package could be useful but it
will likely not align closely with the scope of information needed at this level and is
an undertaking, that in my opinion, is separate but compatible with the work done here.

-----Original Message-----
From: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>
Sent: Wednesday, October 2, 2019 4:03 PM
To: Kubacki, Michael A <michael.a.kubacki@intel.com>;
devel@edk2.groups.io
Cc: Dong, Eric <eric.dong@intel.com>; Gao, Liming <liming.gao@intel.com>;
Ni, Ray <ray.ni@intel.com>
Subject: RE: [edk2-platforms][PATCH V1 0/3] Add FW Boot Media Device
Indicator

I am not sure if there is a silicon scope around the FirmwareBootMediaLib.
Have we considered adding this interface to MdePkg, instead?

-----Original Message-----
From: Kubacki, Michael A
Sent: Monday, September 30, 2019 6:16 PM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Dong, Eric
<eric.dong@intel.com>; Gao, Liming <liming.gao@intel.com>; Ni, Ray
<ray.ni@intel.com>
Subject: [edk2-platforms][PATCH V1 0/3] Add FW Boot Media Device
Indicator

This patch series introduces a mechanism for determining the firmware boot
media device. This allows the firmware boot media to be discovered through
a standardized API.

Traditionally, most systems have only supported firmware storage on SPI
flash. Presently, several other storage technologies are being used to store
boot system firmware such as eMMC, UFS, and NVMe.

The API for all board, platform, and silicon code to consume the firmware
boot media device is provided by the FirmwareBootMediaLib in
IntelSiliconPkg.

A driver (FirmwareBootMediaInfoPei) is added to BoardModulePkg to serve
as a consistent location for reporting the firmware boot device information.
In order to abstract the potentially hardware-specific details to determine
the boot media (for platforms that support multiple firmware boot media
devices), the driver retrieves the boot media information using a new library
class introduced called FirmwareBootMediaInfoLib. A default instance of this
library class is provided in BoardModulePkg that always returns SPI flash. This
is intended to serve as a default implementation of the library for the most
common scenario and to easily allow a board package to substitute the logic
required to determine the boot media in more complex scenarios.
Ultimately, FirmwareBootMediaInfoPei produces a HOB containing the
firmware boot media device information so it can be used in the HOB
consumer phase.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com>

Michael Kubacki (3):
IntelSiliconPkg/FirmwareBootMediaLib: Add library
BoardModulePkg/FirmwareBootMediaInfoLib: Add library
BoardModulePkg/FirmwareBootMediaInfoPei: Add module

Platform/Intel/BoardModulePkg/BoardModulePkg.dec
| 3 +
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 4
+-
Platform/Intel/BoardModulePkg/BoardModulePkg.dsc
| 5 +
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 4
+-

Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMe
diaInfoPei.inf | 46 +++++++++

Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/Pei
FirmwareBootMediaInfoLib.inf | 35 +++++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirm
wareBootMediaLib.inf | 43 ++++++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareB
ootMediaLib.inf | 38 +++++++

Platform/Intel/BoardModulePkg/Include/Library/FirmwareBootMediaInfoLi
b.h | 26 +++++
Silicon/Intel/IntelSiliconPkg/Include/Library/FirmwareBootMediaLib.h
| 106 +++++++++++++++++++

Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMe
diaInfoPei.c | 76 ++++++++++++++

Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/Pei
FirmwareBootMediaInfoLib.c | 24 +++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirm
wareBootMediaLib.c | 107 +++++++++++++++++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/FirmwareBoo
tMediaLib.c | 109 ++++++++++++++++++++

Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareB
ootMediaLib.c | 82 +++++++++++++++
15 files changed, 706 insertions(+), 2 deletions(-) create mode 100644
Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMe
diaInfoPei.inf
create mode 100644
Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/Pei
FirmwareBootMediaInfoLib.inf
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirm
wareBootMediaLib.inf
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareB
ootMediaLib.inf
create mode 100644
Platform/Intel/BoardModulePkg/Include/Library/FirmwareBootMediaInfoLi
b.h
create mode 100644
Silicon/Intel/IntelSiliconPkg/Include/Library/FirmwareBootMediaLib.h
create mode 100644
Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMe
diaInfoPei.c
create mode 100644
Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/Pei
FirmwareBootMediaInfoLib.c
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirm
wareBootMediaLib.c
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/FirmwareBoo
tMediaLib.c
create mode 100644
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareB
ootMediaLib.c

--
2.16.2.windows.1


Re: [edk2-staging/RISC-V-V2 PATCH v2 09/29] MdePkg/BaseIoLibIntrinsic: RISC-V I/O intrinsic functions.

Abner Chang
 

-----Original Message-----
From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of
Leif Lindholm
Sent: Thursday, October 3, 2019 12:35 AM
To: devel@edk2.groups.io; afish@apple.com
Cc: Chang, Abner (HPS SW/FW Technologist) <abner.chang@hpe.com>;
Philippe Mathieu-Daudé <philmd@redhat.com>; Mike Kinney
<michael.d.kinney@intel.com>; Liming Gao <liming.gao@intel.com>
Subject: Re: [edk2-devel] [edk2-staging/RISC-V-V2 PATCH v2 09/29]
MdePkg/BaseIoLibIntrinsic: RISC-V I/O intrinsic functions.

On Wed, Oct 02, 2019 at 11:27:16AM -0500, Andrew Fish via Groups.Io wrote:


On Oct 2, 2019, at 11:14 AM, Abner Chang <abner.chang@hpe.com>
wrote:

Thanks Leif, let me check with maintainers.

Hi Mike and Liming,
How do you think about to use IoLibArm as the I/O lib instance for RISC-V
arch? I personally don't like to use IoLibArm.c in [Source.RISCV64] section,
instead I would like to use IoLibRiscV.c which conform with current source file
organization under BaseIoLibIntrinsics. What's your preference?
Abner,

So is the plan to just copy IoLibArm.c to IoLibRiskV.c? I kind of
agree with Leif that having two copies of the same thing does not make
sense. I do see your point about naming, but maybe the issue the
IoLibArm.c name. I don't see anything ARM specific in IoLibArm.c it
seems to me it is generic C code for a platform that does not have IO
Ports. So I guess we could just change the file name of IoLibArm.c to
IoLibNoIo.c and have ARM and RISC-V point at the common file?
Yes, naming is my concern. No technical issues here.
Thanks for this suggestion.


Works for me.
We can untangle the remaining mess unrelated from the Risc-V upstreaming.
Leif, I will rename IoLibRiscV.c to IoLibNoIo.c in the next version of patches. You can adopt the new file in ARM side later.
Thanks


Abner


Best Regards,

Leif


Re: [edk2-platforms][PATCH V1 0/3] Add FW Boot Media Device Indicator

Chaganty, Rangasai V
 

I am not sure if there is a silicon scope around the FirmwareBootMediaLib. Have we considered adding this interface to MdePkg, instead?

-----Original Message-----
From: Kubacki, Michael A
Sent: Monday, September 30, 2019 6:16 PM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V <rangasai.v.chaganty@intel.com>; Dong, Eric <eric.dong@intel.com>; Gao, Liming <liming.gao@intel.com>; Ni, Ray <ray.ni@intel.com>
Subject: [edk2-platforms][PATCH V1 0/3] Add FW Boot Media Device Indicator

This patch series introduces a mechanism for determining the firmware boot media device. This allows the firmware boot media to be discovered through a standardized API.

Traditionally, most systems have only supported firmware storage on SPI flash. Presently, several other storage technologies are being used to store boot system firmware such as eMMC, UFS, and NVMe.

The API for all board, platform, and silicon code to consume the firmware boot media device is provided by the FirmwareBootMediaLib in IntelSiliconPkg.

A driver (FirmwareBootMediaInfoPei) is added to BoardModulePkg to serve as a consistent location for reporting the firmware boot device information. In order to abstract the potentially hardware-specific details to determine the boot media (for platforms that support multiple firmware boot media devices), the driver retrieves the boot media information using a new library class introduced called FirmwareBootMediaInfoLib. A default instance of this library class is provided in BoardModulePkg that always returns SPI flash. This is intended to serve as a default implementation of the library for the most common scenario and to easily allow a board package to substitute the logic required to determine the boot media in more complex scenarios. Ultimately, FirmwareBootMediaInfoPei produces a HOB containing the firmware boot media device information so it can be used in the HOB consumer phase.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Signed-off-by: Michael Kubacki <michael.a.kubacki@intel.com>

Michael Kubacki (3):
IntelSiliconPkg/FirmwareBootMediaLib: Add library
BoardModulePkg/FirmwareBootMediaInfoLib: Add library
BoardModulePkg/FirmwareBootMediaInfoPei: Add module

Platform/Intel/BoardModulePkg/BoardModulePkg.dec | 3 +
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 4 +-
Platform/Intel/BoardModulePkg/BoardModulePkg.dsc | 5 +
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dsc | 4 +-
Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMediaInfoPei.inf | 46 +++++++++
Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/PeiFirmwareBootMediaInfoLib.inf | 35 +++++++
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaLib.inf | 43 ++++++++
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareBootMediaLib.inf | 38 +++++++
Platform/Intel/BoardModulePkg/Include/Library/FirmwareBootMediaInfoLib.h | 26 +++++
Silicon/Intel/IntelSiliconPkg/Include/Library/FirmwareBootMediaLib.h | 106 +++++++++++++++++++
Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMediaInfoPei.c | 76 ++++++++++++++
Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/PeiFirmwareBootMediaInfoLib.c | 24 +++++
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaLib.c | 107 +++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/FirmwareBootMediaLib.c | 109 ++++++++++++++++++++
Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareBootMediaLib.c | 82 +++++++++++++++
15 files changed, 706 insertions(+), 2 deletions(-) create mode 100644 Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMediaInfoPei.inf
create mode 100644 Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/PeiFirmwareBootMediaInfoLib.inf
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaLib.inf
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareBootMediaLib.inf
create mode 100644 Platform/Intel/BoardModulePkg/Include/Library/FirmwareBootMediaInfoLib.h
create mode 100644 Silicon/Intel/IntelSiliconPkg/Include/Library/FirmwareBootMediaLib.h
create mode 100644 Platform/Intel/BoardModulePkg/FirmwareBootMediaInfo/FirmwareBootMediaInfoPei.c
create mode 100644 Platform/Intel/BoardModulePkg/Library/PeiFirmwareBootMediaInfoLib/PeiFirmwareBootMediaInfoLib.c
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/DxeSmmFirmwareBootMediaLib.c
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/FirmwareBootMediaLib.c
create mode 100644 Silicon/Intel/IntelSiliconPkg/Library/PeiDxeSmmBootMediaLib/PeiFirmwareBootMediaLib.c

--
2.16.2.windows.1


Re: [plaforms/devel-riscv-v2 PATCHv2 09/14] U500Pkg/Library: Initial version of PlatformBootManagerLib

Leif Lindholm
 

On Thu, Sep 19, 2019 at 11:51:26AM +0800, Gilbert Chen wrote:
SiFive RISC-V U500 Platform Boot Manager library.
First of all, let me say that I think before upstreaming to master,
you ought to look into merging PlatformBootManagerLibs for all Risc-V
platforms. Like we have for *most* ARM/AARCH64 platforms with
ArmPkg/Library/PlatformBootManagerLib/.

(Longer-term we should merge them all together into a single one.)

Signed-off-by: Gilbert Chen <gilbert.chen@hpe.com>
---
.../Library/PlatformBootManagerLib/MemoryTest.c | 682 +++++++++++++++++++++
.../PlatformBootManagerLib/PlatformBootManager.c | 274 +++++++++
.../PlatformBootManagerLib/PlatformBootManager.h | 135 ++++
.../PlatformBootManagerLib.inf | 63 ++
.../Library/PlatformBootManagerLib/PlatformData.c | 49 ++
.../Library/PlatformBootManagerLib/Strings.uni | 28 +
6 files changed, 1231 insertions(+)
create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/MemoryTest.c
create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.c
create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.h
create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformData.c
create mode 100644 Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/Strings.uni

diff --git a/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/MemoryTest.c b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/MemoryTest.c
new file mode 100644
index 00000000..8c6d89e9
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/MemoryTest.c
Why build a MemoryTest into the PlatformBootManagerLib?

@@ -0,0 +1,682 @@
+/** @file
+ Perform the RISC-V platform memory test
+
+Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "PlatformBootManager.h"
+
+EFI_HII_HANDLE gStringPackHandle = NULL;
+EFI_GUID mPlatformBootManagerStringPackGuid = {
+ 0x154dd51, 0x9079, 0x4a10, { 0x89, 0x5c, 0x9c, 0x7, 0x72, 0x81, 0x57, 0x88 }
+ };
+// extern UINT8 BdsDxeStrings[];
No need to keep commented-out code in.

+
+//
+// BDS Platform Functions
+//
+/**
+
+ Show progress bar with title above it. It only works in Graphics mode.
+
+ @param TitleForeground Foreground color for Title.
+ @param TitleBackground Background color for Title.
+ @param Title Title above progress bar.
+ @param ProgressColor Progress bar color.
+ @param Progress Progress (0-100)
+ @param PreviousValue The previous value of the progress.
+
+ @retval EFI_STATUS Success update the progress bar
+
+**/
+EFI_STATUS
+PlatformBootManagerShowProgress (
I'm not a super fan of how this file integrates a custom memory test
with a direct (copy) graphical progress indicator. There are both
common memory test and common progress indicators - please use those
instead. And improve them if they are currently insufficient for your
needs.

diff --git a/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.c b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.c
new file mode 100644
index 00000000..9ef85089
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.c
@@ -0,0 +1,274 @@
+/** @file
+ This file include all platform action which can be customized
+ by IBV/OEM.
+
+Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "PlatformBootManager.h"
+
+
+EFI_GUID mUefiShellFileGuid = { 0x7C04A583, 0x9E3E, 0x4f1c, {0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1}};
+
+/**
+ Perform the platform diagnostic, such like test memory. OEM/IBV also
+ can customize this function to support specific platform diagnostic.
+
+ @param MemoryTestLevel The memory test intensive level
+ @param QuietBoot Indicate if need to enable the quiet boot
+
+**/
+VOID
+PlatformBootManagerDiagnostics (
+ IN EXTENDMEM_COVERAGE_LEVEL MemoryTestLevel,
+ IN BOOLEAN QuietBoot
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // Here we can decide if we need to show
+ // the diagnostics screen
+ // Notes: this quiet boot code should be remove
+ // from the graphic lib
+ //
+ if (QuietBoot) {
+
+ //
+ // Perform system diagnostic
+ //
+ Status = PlatformBootManagerMemoryTest (MemoryTestLevel);
+ return;
+ }
+
+ //
+ // Perform system diagnostic
+ //
+ Status = PlatformBootManagerMemoryTest (MemoryTestLevel);
+}
+
+/**
+ Return the index of the load option in the load option array.
+
+ The function consider two load options are equal when the
+ OptionType, Attributes, Description, FilePath and OptionalData are equal.
+
+ @param Key Pointer to the load option to be found.
+ @param Array Pointer to the array of load options to be found.
+ @param Count Number of entries in the Array.
+
+ @retval -1 Key wasn't found in the Array.
+ @retval 0 ~ Count-1 The index of the Key in the Array.
+**/
+INTN
+PlatformFindLoadOption (
+ IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Key,
+ IN CONST EFI_BOOT_MANAGER_LOAD_OPTION *Array,
+ IN UINTN Count
+ )
+{
+ UINTN Index;
+
+ for (Index = 0; Index < Count; Index++) {
+ if ((Key->OptionType == Array[Index].OptionType) &&
+ (Key->Attributes == Array[Index].Attributes) &&
+ (StrCmp (Key->Description, Array[Index].Description) == 0) &&
+ (CompareMem (Key->FilePath, Array[Index].FilePath, GetDevicePathSize (Key->FilePath)) == 0) &&
+ (Key->OptionalDataSize == Array[Index].OptionalDataSize) &&
+ (CompareMem (Key->OptionalData, Array[Index].OptionalData, Key->OptionalDataSize) == 0)) {
+ return (INTN) Index;
+ }
+ }
+
+ return -1;
+}
+
+VOID
+PlatformRegisterFvBootOption (
+ EFI_GUID *FileGuid,
+ CHAR16 *Description,
+ UINT32 Attributes
+ )
+{
+ EFI_STATUS Status;
+ UINTN OptionIndex;
+ EFI_BOOT_MANAGER_LOAD_OPTION NewOption;
+ EFI_BOOT_MANAGER_LOAD_OPTION *BootOptions;
+ UINTN BootOptionCount;
+ MEDIA_FW_VOL_FILEPATH_DEVICE_PATH FileNode;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImage;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+
+ Status = gBS->HandleProtocol (gImageHandle, &gEfiLoadedImageProtocolGuid, (VOID **) &LoadedImage);
+ ASSERT_EFI_ERROR (Status);
+
+ EfiInitializeFwVolDevicepathNode (&FileNode, FileGuid);
+ DevicePath = AppendDevicePathNode (
+ DevicePathFromHandle (LoadedImage->DeviceHandle),
+ (EFI_DEVICE_PATH_PROTOCOL *) &FileNode
+ );
+
+ Status = EfiBootManagerInitializeLoadOption (
+ &NewOption,
+ LoadOptionNumberUnassigned,
+ LoadOptionTypeBoot,
+ Attributes,
+ Description,
+ DevicePath,
+ NULL,
+ 0
+ );
+ if (!EFI_ERROR (Status)) {
+ BootOptions = EfiBootManagerGetLoadOptions (&BootOptionCount, LoadOptionTypeBoot);
+
+ OptionIndex = PlatformFindLoadOption (&NewOption, BootOptions, BootOptionCount);
+
+ if (OptionIndex == -1) {
+ Status = EfiBootManagerAddLoadOptionVariable (&NewOption, (UINTN) -1);
+ ASSERT_EFI_ERROR (Status);
+ }
+ EfiBootManagerFreeLoadOption (&NewOption);
+ EfiBootManagerFreeLoadOptions (BootOptions, BootOptionCount);
+ }
+}
+
+/**
+ Do the platform specific action before the console is connected.
+
+ Such as:
+ Update console variable;
+ Register new Driver#### or Boot####;
+ Signal ReadyToLock event.
+**/
+VOID
+EFIAPI
+PlatformBootManagerBeforeConsole (
+ VOID
+ )
+{
+ UINTN Index;
+ EFI_STATUS Status;
+ EFI_INPUT_KEY Enter;
+ EFI_INPUT_KEY F2;
+ EFI_BOOT_MANAGER_LOAD_OPTION BootOption;
+
+ //
+ // Update the console variables.
+ //
+ for (Index = 0; gPlatformConsole[Index].DevicePath != NULL; Index++) {
+ DEBUG ((DEBUG_INFO, "Check gPlatformConsole %d\n", Index));
+ if ((gPlatformConsole[Index].ConnectType & CONSOLE_IN) == CONSOLE_IN) {
+ Status = EfiBootManagerUpdateConsoleVariable (ConIn, gPlatformConsole[Index].DevicePath, NULL);
+ DEBUG ((DEBUG_INFO, "CONSOLE_IN variable set %s : %r\n", ConvertDevicePathToText (gPlatformConsole[Index].DevicePath, FALSE, FALSE), Status));
Some really long lines here, can we wrap them?

+ }
+
+ if ((gPlatformConsole[Index].ConnectType & CONSOLE_OUT) == CONSOLE_OUT) {
+ Status = EfiBootManagerUpdateConsoleVariable (ConOut, gPlatformConsole[Index].DevicePath, NULL);
+ DEBUG ((DEBUG_INFO, "CONSOLE_OUT variable set %s : %r\n", ConvertDevicePathToText (gPlatformConsole[Index].DevicePath, FALSE, FALSE), Status));
+ }
+
+ if ((gPlatformConsole[Index].ConnectType & STD_ERROR) == STD_ERROR) {
+ Status = EfiBootManagerUpdateConsoleVariable (ErrOut, gPlatformConsole[Index].DevicePath, NULL);
+ DEBUG ((DEBUG_INFO, "STD_ERROR variable set %r", Status));
+ }
+ }
+
+ //
+ // Register ENTER as CONTINUE key
+ //
+ Enter.ScanCode = SCAN_NULL;
+ Enter.UnicodeChar = CHAR_CARRIAGE_RETURN;
+ EfiBootManagerRegisterContinueKeyOption (0, &Enter, NULL);
+ //
+ // Map F2 to Boot Manager Menu
+ //
+ F2.ScanCode = SCAN_F2;
+ F2.UnicodeChar = CHAR_NULL;
+ EfiBootManagerGetBootManagerMenu (&BootOption);
+ EfiBootManagerAddKeyOptionVariable (NULL, (UINT16) BootOption.OptionNumber, 0, &F2, NULL);
+ //
+ // Register UEFI Shell
+ //
+ PlatformRegisterFvBootOption (&mUefiShellFileGuid, L"UEFI Shell", LOAD_OPTION_ACTIVE);
+}
+
+/**
+ Do the platform specific action after the console is connected.
+
+ Such as:
+ Dynamically switch output mode;
+ Signal console ready platform customized event;
+ Run diagnostics like memory testing;
+ Connect certain devices;
+ Dispatch aditional option roms.
+**/
+VOID
+EFIAPI
+PlatformBootManagerAfterConsole (
+ VOID
+ )
+{
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL Black;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL White;
+
+ Black.Blue = Black.Green = Black.Red = Black.Reserved = 0;
+ White.Blue = White.Green = White.Red = White.Reserved = 0xFF;
+
+ EfiBootManagerConnectAll ();
+ EfiBootManagerRefreshAllBootOption ();
+
+ PlatformBootManagerDiagnostics (QUICK, TRUE);
+
+ PrintXY (10, 10, &White, &Black, L"F2 to enter Boot Manager Menu. ");
+ PrintXY (10, 30, &White, &Black, L"Enter to boot directly.");
+}
+
+/**
+ This function is called each second during the boot manager waits the timeout.
+
+ @param TimeoutRemain The remaining timeout.
+**/
+VOID
+EFIAPI
+PlatformBootManagerWaitCallback (
+ UINT16 TimeoutRemain
+ )
+{
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL Black;
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL White;
+ UINT16 Timeout;
+
+ Timeout = PcdGet16 (PcdPlatformBootTimeOut);
+
+ Black.Blue = Black.Green = Black.Red = Black.Reserved = 0;
+ White.Blue = White.Green = White.Red = White.Reserved = 0xFF;
+
+ PlatformBootManagerShowProgress (
+ White,
+ Black,
+ L"Start boot option",
+ White,
+ (Timeout - TimeoutRemain) * 100 / Timeout,
+ 0
+ );
+}
+
+/**
+ The function is called when no boot option could be launched,
+ including platform recovery options and options pointing to applications
+ built into firmware volumes.
+
+ If this function returns, BDS attempts to enter an infinite loop.
+**/
+VOID
+EFIAPI
+PlatformBootManagerUnableToBoot (
+ VOID
+ )
+{
+ return;
+}
diff --git a/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.h b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.h
new file mode 100644
index 00000000..20d66758
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManager.h
@@ -0,0 +1,135 @@
+/**@file
+ Head file for BDS Platform specific code
+
+Copyright (c) 2016, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _PLATFORM_BOOT_MANAGER_H_
+#define _PLATFORM_BOOT_MANAGER_H_
Please drop leading _.

+
+#include <PiDxe.h>
+#include <IndustryStandard/Bmp.h>
+#include <Protocol/GenericMemoryTest.h>
+#include <Protocol/LoadedImage.h>
+#include <Protocol/UgaDraw.h>
+#include <Protocol/GraphicsOutput.h>
+#include <Protocol/BootLogo.h>
+#include <Protocol/DevicePath.h>
+
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/BaseLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/UefiLib.h>
+#include <Library/UefiBootManagerLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DevicePathLib.h>
+#include <Library/HiiLib.h>
+#include <Library/PrintLib.h>
+#include <Library/DxeServicesLib.h>
Please remove any includes not needed by this file, and add them to
the files that actually use them.

+
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINTN ConnectType;
+} PLATFORM_CONSOLE_CONNECT_ENTRY;
+
+extern PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[];
+
+#define gEndEntire \
+ { \
+ END_DEVICE_PATH_TYPE,\
+ END_ENTIRE_DEVICE_PATH_SUBTYPE,\
+ END_DEVICE_PATH_LENGTH,\
+ 0\
+ }
+
+#define CONSOLE_OUT BIT0
+#define CONSOLE_IN BIT1
+#define STD_ERROR BIT2
+
+//D3987D4B-971A-435F-8CAF-4967EB627241
+#define EFI_SERIAL_DXE_GUID \
+ { 0xD3987D4B, 0x971A, 0x435F, { 0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41 } }
+
+typedef struct {
+ VENDOR_DEVICE_PATH Guid;
+ UART_DEVICE_PATH Uart;
+ VENDOR_DEVICE_PATH TerminalType;
+ EFI_DEVICE_PATH_PROTOCOL End;
+} SERIAL_CONSOLE_DEVICE_PATH;
+
+/**
+ Use SystemTable Conout to stop video based Simple Text Out consoles from going
+ to the video device. Put up LogoFile on every video device that is a console.
+
+ @param[in] LogoFile File name of logo to display on the center of the screen.
+
+ @retval EFI_SUCCESS ConsoleControl has been flipped to graphics and logo displayed.
+ @retval EFI_UNSUPPORTED Logo not found
+
+**/
+EFI_STATUS
+PlatformBootManagerEnableQuietBoot (
+ IN EFI_GUID *LogoFile
+ );
+
+/**
+ Use SystemTable Conout to turn on video based Simple Text Out consoles. The
+ Simple Text Out screens will now be synced up with all non video output devices
+
+ @retval EFI_SUCCESS UGA devices are back in text mode and synced up.
+
+**/
+EFI_STATUS
+PlatformBootManagerDisableQuietBoot (
+ VOID
+ );
+
+/**
+ Perform the memory test base on the memory test intensive level,
+ and update the memory resource.
+
+ @param Level The memory test intensive level.
+
+ @retval EFI_STATUS Success test all the system memory and update
+ the memory resource
+
+**/
+EFI_STATUS
+PlatformBootManagerMemoryTest (
+ IN EXTENDMEM_COVERAGE_LEVEL Level
+ );
+
+/**
+
+ Show progress bar with title above it. It only works in Graphics mode.
+
+
+ @param TitleForeground Foreground color for Title.
+ @param TitleBackground Background color for Title.
+ @param Title Title above progress bar.
+ @param ProgressColor Progress bar color.
+ @param Progress Progress (0-100)
+ @param PreviousValue The previous value of the progress.
+
+ @retval EFI_STATUS Success update the progress bar
+
+**/
+EFI_STATUS
+PlatformBootManagerShowProgress (
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleForeground,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL TitleBackground,
+ IN CHAR16 *Title,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL ProgressColor,
+ IN UINTN Progress,
+ IN UINTN PreviousValue
+ );
+
+#endif // _PLATFORM_BOOT_MANAGER_H
diff --git a/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
new file mode 100644
index 00000000..92c31db4
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
@@ -0,0 +1,63 @@
+## @file
+# Include all platform action which can be customized by IBV/OEM.
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
Please bump specification version.

+ BASE_NAME = PlatformBootManagerLib
+ FILE_GUID = 7DDA7916-6139-4D46-A415-30E854AF3BC7
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PlatformBootManagerLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV
+#
+
+[Sources]
+ PlatformData.c
+ PlatformBootManager.c
+ PlatformBootManager.h
+ MemoryTest.c
+ Strings.uni
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ Platform/RiscV/RiscVPlatformPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ UefiBootServicesTableLib
+ UefiRuntimeServicesTableLib
+ UefiLib
+ UefiBootManagerLib
+ PcdLib
+ DxeServicesLib
+ MemoryAllocationLib
+ DevicePathLib
+ HiiLib
+ PrintLib
Please sort Sources, Packages and LibraryClasses alphabetically.

+
+[Guids]
+
+[Protocols]
+ gEfiGenericMemTestProtocolGuid ## CONSUMES
+ gEfiGraphicsOutputProtocolGuid ## CONSUMES
+ gEfiUgaDrawProtocolGuid ## CONSUMES
You're hopefully not really using UGA, so please drop that.

+
+[Pcd]
+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn
+ gEfiMdePkgTokenSpaceGuid.PcdUgaConsumeSupport
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConInConnectOnDemand
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootlogoOnlyEnable
Please sort Pcds alphabetically.

diff --git a/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformData.c b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformData.c
new file mode 100644
index 00000000..3208051e
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformData.c
@@ -0,0 +1,49 @@
+/**@file
+ Defined the platform specific device path which will be filled to
+ ConIn/ConOut variables.
+
+Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "PlatformBootManager.h"
+
+//
+// Platform specific serial device path
+//
+SERIAL_CONSOLE_DEVICE_PATH gSerialConsoleDevicePath0 = {
+ {
+ { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0} },
+ EFI_SERIAL_DXE_GUID // Use the driver's GUID
+ },
+ {
+ { MESSAGING_DEVICE_PATH, MSG_UART_DP, { sizeof (UART_DEVICE_PATH), 0} },
+ 0, // Reserved
+ 115200, // BaudRate
+ 8, // DataBits
+ 1, // Parity
+ 1 // StopBits
+ },
+ {
+ { MESSAGING_DEVICE_PATH, MSG_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0} },
+ DEVICE_PATH_MESSAGING_PC_ANSI
+ },
+ { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } }
+};
+
+//
+// Predefined platform default console device path
+//
+PLATFORM_CONSOLE_CONNECT_ENTRY gPlatformConsole[] = {
+ {
+ (EFI_DEVICE_PATH_PROTOCOL *) &gSerialConsoleDevicePath0,
+ CONSOLE_OUT | CONSOLE_IN
+ },
+ {
+ NULL,
+ 0
+ }
+};
diff --git a/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/Strings.uni b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/Strings.uni
new file mode 100644
index 00000000..73bf5d51
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/Strings.uni
@@ -0,0 +1,28 @@
+///** @file
+//
+// String definitions for PlatformBootManagerLib.
+//
+// Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+// Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//**/
+
+/=#
+
+#langdef en-US "English"
+#langdef fr-FR "Français"
+
+#string STR_PERFORM_MEM_TEST #language en-US "Perform memory test (ESC to skip)"
+ #language fr-FR "Exécute l'examen de mémoire (ESC pour sauter)"
+#string STR_MEMORY_TEST_PERCENT #language en-US "% of the system memory tested OK"
+ #language fr-FR "% de la mémoire de système essayée D'ACCORD"
+#string STR_ESC_TO_SKIP_MEM_TEST #language en-US "Press ESC key to skip memory test"
+ #language fr-FR "Appuie sur ESC sauter examen de mémoire"
+#string STR_MEM_TEST_COMPLETED #language en-US " bytes of system memory tested OK\r\n"
+ #language fr-FR "octets dela mémoire de système essayée D'ACCORD\r\n"
if there's a space before 'bytes' you probably want one before
'octets'.

/
Leif

+#string STR_SYSTEM_MEM_ERROR #language en-US "System encounters memory errors"
+ #language fr-FR "le Système rencontre les erreurs de mémoire"
+#string STR_START_BOOT_OPTION #language en-US "Start boot option"
+ #language fr-FR "l'option de botte de Début"
--
2.12.0.windows.1




Cancelled Event: TianoCore Design Meeting - APAC/NAMO - Thursday, 28 November 2019 #cal-cancelled

devel@edk2.groups.io Calendar <devel@...>
 

Cancelled: TianoCore Design Meeting - APAC/NAMO

This event has been cancelled.

When:
Thursday, 28 November 2019
6:30pm to 7:30pm
(UTC-08:00) America/Los Angeles

Where:
BlueJeans Meeting

Organizer: Stephano Cetola stephano.cetola@...

Description:

For more info, see here:

https://www.tianocore.org/design-meeting/

 

To join the meeting on a computer or mobile phone:

https://bluejeans.com/889357567?src=calendarLink

 

Phone Dial-in

+1.408.740.7256 (US (San Jose))

+1.408.317.9253 (US (Primary, San Jose))

Global Numbers: https://www.bluejeans.com/numbers

 

Meeting ID: 889 357 567

 

Room System

199.48.152.152 or bjn.vc

 

Meeting ID: 889 357 567

 

Want to test your video connection?

https://bluejeans.com/111


Cancelled Event: TianoCore Bug Triage - APAC / NAMO - Thursday, 28 November 2019 #cal-cancelled

devel@edk2.groups.io Calendar <devel@...>
 

Cancelled: TianoCore Bug Triage - APAC / NAMO

This event has been cancelled.

When:
Thursday, 28 November 2019
5:00pm to 5:30pm
(UTC-08:00) America/Los Angeles

Where:
https://bluejeans.com/889357567?src=calendarLink

Organizer: Stephano Cetola stephano.cetola@...

Description:

For more info please see:

https://www.tianocore.org/bug-triage

 

To join the meeting on a computer or mobile phone:

https://bluejeans.com/889357567?src=calendarLink

 

Phone Dial-in

+1.408.740.7256 (US (San Jose))

+1.408.317.9253 (US (Primary, San Jose))

Global Numbers: https://www.bluejeans.com/numbers

 

Meeting ID: 889 357 567

 

Room System

199.48.152.152 or bjn.vc

 

Meeting ID: 889 357 567

 

Want to test your video connection?

https://bluejeans.com/111

 

 


Re: [edk2-platforms] Remove ClevoOpenBoardPkg from Bugzilla

Michael D Kinney
 

Hi Michael,

 

I have made ClevoOpenBoardPkg inactive.  It is not longer an option when adding a new bug.

 

Mike

 

From: Kubacki, Michael A <michael.a.kubacki@...>
Sent: Tuesday, October 1, 2019 3:29 PM
To: 'devel@edk2.groups.io' <devel@edk2.groups.io>
Cc: Kinney, Michael D <michael.d.kinney@...>; Sinha, Ankit <ankit.sinha@...>; Desimone, Nathaniel L <nathaniel.l.desimone@...>
Subject: [edk2-platforms] Remove ClevoOpenBoardPkg from Bugzilla

 

Hi Mike,

 

ClevoOpenBoardPkg was removed from edk2-platforms in commit 1dc2b96e767f7d1289f90539b6be162430225043.

 

The single board supported in the package (N1xxWU) was moved to KabylakeOpenBoardPkg (as GalagoPro3). Any future bugs for this board should be filed against KabylakeOpenBoardPkg.

 

All Readme files have been updated to reflect this change and all Tianocore Bugzilla issues have been moved to KabylakeOpenBoardPkg. Can the ClevoOpenBoardPkg component be removed from Bugzilla?

 

Thanks,

Michael

 


Re: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Resize FSP-T to accommodate debug FSP builds.

Jeremy Soller
 

Reviewed-by: Jeremy Soller <jeremy@system76.com>


Re: [edk2-platforms] [PATCH V1] KabylakeOpenBoardPkg: Wrong instance of PlatformSecLib is used.

Jeremy Soller
 

Reviewed-by: Jeremy Soller <jeremy@system76.com>


Updated Event: TianoCore Design / Bug Triage - EMEA #cal-invite

devel@edk2.groups.io Calendar <devel@...>
 

TianoCore Design / Bug Triage - EMEA

When:
Wednesday, 29 May 2019
8:00am to 9:00am
(UTC-07:00) America/Los Angeles
Repeats: Weekly on Wednesday

Where:
https://bluejeans.com/889357567?src=join_info

Organizer: Stephano Cetola stephano.cetola@...

Description:

Meeting URL

https://bluejeans.com/889357567?src=join_info

Meeting ID

889 357 567

 

Want to dial in from a phone?

 

Dial one of the following numbers:

+1.408.740.7256 (US (San Jose))

+1.408.317.9253 (US (Primary, San Jose))

(see all numbers - https://www.bluejeans.com/numbers)

 

Enter the meeting ID and passcode followed by #


Updated Event: TianoCore Community Meeting - APAC/NAMO #cal-invite

devel@edk2.groups.io Calendar <devel@...>
 

TianoCore Community Meeting - APAC/NAMO

When:
Thursday, 4 April 2019
7:30pm to 8:00pm
(UTC-07:00) America/Los Angeles
Repeats: Monthly on the first Thursday, through Thursday, 5 December 2019

Where:
https://bluejeans.com/889357567?src=join_info

Organizer: Stephano Cetola stephano.cetola@...

Description:

Meeting URL

https://bluejeans.com/889357567?src=join_info

Meeting ID

889 357 567

 

Want to dial in from a phone?

 

Dial one of the following numbers:

+1.408.740.7256 (US (San Jose))

+1.408.317.9253 (US (Primary, San Jose))

(see all numbers - https://www.bluejeans.com/numbers)

 

Enter the meeting ID and passcode followed by #


Re: [plaforms/devel-riscv-v2 PATCHv2 08/14] U500Pkg/Include: Header files of SiFive U500 platform

Leif Lindholm
 

On Thu, Sep 19, 2019 at 11:51:25AM +0800, Gilbert Chen wrote:
The initial header file commit for SiFive U5-MC Coreplex and U500 Core
Local interrupt definitions.
There is a generic issue here, and not just with this patch:
It is being added *after* the U500 platform, which depends on this.
Please reorder the set so that all of the prerequisites for the
platforms come before the platform .dsc.

Also, please add these files together with the implementations of the
functions declared here.
SiFive/U500Pkg/Library/PeiCoreInfoHobLib/CoreInfoHob.c

Signed-off-by: Gilbert Chen <gilbert.chen@hpe.com>
---
.../SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h | 51 ++++++++++++++++++++++
Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h | 19 ++++++++
2 files changed, 70 insertions(+)
create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h
create mode 100644 Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h

diff --git a/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h b/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h
new file mode 100644
index 00000000..9968159c
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/Include/SiFiveU5MCCoreplex.h
@@ -0,0 +1,51 @@
+/** @file
+ SiFive U54 Coreplex library definitions.
+
+ Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _SIFIVE_U5MC_COREPLEX_H_
+#define _SIFIVE_U5MC_COREPLEX_H_
Please drop leading _.

+
+#include <PiPei.h>
+
+#include <SmbiosProcessorSpecificData.h>
+#include <ProcessorSpecificDataHob.h>
+
+#define SIFIVE_U5MC_COREPLEX_MC_HART_ID 0
+
+/**
+ Build up U5MC coreplex processor core-specific information.
+
+ @param UniqueId U5MC unique ID.
+
+ @return EFI_STATUS
+
+**/
+EFI_STATUS
+EFIAPI
+CreateU5MCCoreplexProcessorSpecificDataHob (
+ IN UINTN UniqueId
+ );
+
+/**
+ Function to build processor related SMBIOS information. RISC-V SMBIOS DXE driver collect
+ this information and build SMBIOS Type4 and Type7 record.
+
+ @param ProcessorUid Unique ID of pysical processor which owns this core.
+ @param SmbiosDataHobPtr Pointer to receive RISC_V_PROCESSOR_SMBIOS_DATA_HOB. The pointers
+ maintained in this structure is only valid before memory is discovered.
+ Access to those pointers after memory is installed will cause unexpected issues.
+
+ @return EFI_SUCCESS The PEIM initialized successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+CreateU5MCProcessorSmbiosDataHob (
+ IN UINTN ProcessorUid,
+ OUT RISC_V_PROCESSOR_SMBIOS_DATA_HOB **SmbiosDataHobPtr
+ );
+#endif
diff --git a/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h b/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h
new file mode 100644
index 00000000..a8c9ae15
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/Include/U500Clint.h
@@ -0,0 +1,19 @@
+/** @file
+ RISC-V Timer Architectural definition for U500 platform.
+
+ Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _U500_H_
+#define _U500_H_
Please drop leading _.

/
Leif

+
+#define CLINT_REG_MTIME 0x0200BFF8
+#define CLINT_REG_MTIMECMP0 0x02004000
+#define CLINT_REG_MTIMECMP1 0x02004008
+#define CLINT_REG_MTIMECMP2 0x02004010
+#define CLINT_REG_MTIMECMP3 0x02004018
+#define CLINT_REG_MTIMECMP4 0x02004020
+
+#endif
--
2.12.0.windows.1




Updated Event: TianoCore Community Meeting - EMEA/NAMO #cal-invite

devel@edk2.groups.io Calendar <devel@...>
 

TianoCore Community Meeting - EMEA/NAMO

When:
Thursday, 4 April 2019
9:00am to 10:00am
(UTC-07:00) America/Los Angeles
Repeats: Monthly on the first Thursday, through Thursday, 5 December 2019

Where:
https://zoom.us/j/188375690

Organizer: Stephano Cetola stephano.cetola@...

Description:

Meeting URL

https://bluejeans.com/889357567?src=join_info

 

Meeting ID

889 357 567

 

Want to dial in from a phone?

 

Dial one of the following numbers:

+1.408.740.7256 (US (San Jose))

+1.408.317.9253 (US (Primary, San Jose))

(see all numbers - https://www.bluejeans.com/numbers)

 

Enter the meeting ID and passcode followed by #


Re: [plaforms/devel-riscv-v2 PATCHv2 07/14] RiscV/SiFive: Initial version of SiFive U500 platform package

Leif Lindholm
 

On Thu, Sep 19, 2019 at 11:51:24AM +0800, Gilbert Chen wrote:
The initial version of SiFive U500 platform package.

Signed-off-by: Gilbert Chen <gilbert.chen@hpe.com>
---
Platform/RiscV/SiFive/U500Pkg/Readme.md | 62 +++
Platform/RiscV/SiFive/U500Pkg/U500.dec | 34 ++
Platform/RiscV/SiFive/U500Pkg/U500.dsc | 549 +++++++++++++++++++++++++
Platform/RiscV/SiFive/U500Pkg/U500.fdf | 335 +++++++++++++++
Platform/RiscV/SiFive/U500Pkg/U500.fdf.inc | 52 +++
Platform/RiscV/SiFive/U500Pkg/U500.uni | 13 +
Platform/RiscV/SiFive/U500Pkg/U500PkgExtra.uni | 12 +
Platform/RiscV/SiFive/U500Pkg/VarStore.fdf.inc | 78 ++++
8 files changed, 1135 insertions(+)
create mode 100644 Platform/RiscV/SiFive/U500Pkg/Readme.md
create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.dec
create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.dsc
create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.fdf
create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.fdf.inc
create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500.uni
create mode 100644 Platform/RiscV/SiFive/U500Pkg/U500PkgExtra.uni
create mode 100644 Platform/RiscV/SiFive/U500Pkg/VarStore.fdf.inc

diff --git a/Platform/RiscV/SiFive/U500Pkg/Readme.md b/Platform/RiscV/SiFive/U500Pkg/Readme.md
new file mode 100644
index 00000000..71fa62a1
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/Readme.md
Please add a link to this file from top-level Readme.md.

@@ -0,0 +1,62 @@
+# Introduction
+
+## U500 Platform Package
+This is a sample RISC-V EDK2 platform package used agaist SiFive Freedom U500 VC707 FPGA Dev Kit, please refer to "SiFive Freedom U500 VC707 FPGA Getting Started Guide" on https://www.sifive.com/documentation. This package is built with below common packages, <br>
Please wrap lines in file at no more than 80 characters.
No inline HTML please (search and replace all <br>.

+- **RiscVPlatformPkg**, edk2-platform/Platform/RiscV
+- **RiscVPkg**, edk2 master branch (Currently is in edk2-staging/RISC-V branch)
+<br>
+This package provides librareis and modules which are SiFive U500 platform implementation-specific and incorporate with common RISC-V packages mentioned above.
+
+## Download the sources
+```
+git clone https://github.com/tianocore/edk2-staging.git
+# Checkout RISC-V-V2 branch
+git clone https://github.com/tianocore/edk2-platforms.git
+# Checkout devel-riscv-v2 branch
+git clone https://github.com/tianocore/edk2-non-osi.git
+```
+
+## Platform Owners
+Chang, Abner <abner.chang@hpe.com><br>
+Chen, Gilbert <gilbert.chen@hpe.com>
It is not important while it is a -devel branch, but when merged to
master, we will want an entry in Maintainers.txt instead.

+
+## Platform Status
+Currently the binary built from U500Pkg can boot SiFive Freedom U500 VC707 FPGA to EFI shell with console in/out enabled.
+
+## Linux Build Instructions
+You can build the RISC-V platform using below script, <br>
+`build -a RISCV64 -p Platform/RiscV/SiFive/U500Pkg/U500.dsc -t GCCRISCV`
GCC5

+
+## Supported Operating Systems
+Only support to boot to EFI Shell so far
+
+## Known Issues and Limitations
+Only RISC-V RV64 is verified on this platform.
+
+## Related Materials
+- [RISC-V OpenSbi](https://github.com/riscv/opensbi)<br>
+- [SiFive U500 VC707 FPGA Getting Started Guide](https://sifive.cdn.prismic.io/sifive%2Fc248fabc-5e44-4412-b1c3-6bb6aac73a2c_sifive-u500-vc707-gettingstarted-v0.2.pdf)<br>
+- [SiFive RISC-V Core Document](https://www.sifive.com/documentation)
+
+## U500 Platform Libraries and Drivers
+### OpneSbiPlatformLib
+In order to reduce the dependencies with RISC-V OpenSBI project (https://github.com/riscv/opensbi) and less burdens to EDK2 build process, the implementation of RISC-V EDK2 platform is leverage platform source code from OpenSBI code tree. The "platform.c" under OpenSbiPlatformLib is cloned from RISC-V OpenSBI code tree (in EDK2 RiscVPkg) and built based on EDK2 build environment.
+
+### PeiCoreInfoHobLib
+This is the library to create RISC-V core characteristics for building up RISC-V related SMBIOS records to support the unified boot loader and OS image. This library leverage the silicon libraries provided in Silicon/SiFive.
+
+### RiscVPlatformTimerLib
+This is U500 platform timer library which has the platform-specific timer implementation.
+
+### PlatformPei
+This is the platform-implementation specific library which is executed in early PEI phase for platform initialization.
+
+### TimerDxe
+This is U500 platform timer DXE driver whcih has the platform-specific timer implementation.
+
+## U500 Platform PCD settings
+
+| **PCD name** |**Usage**|
+|----------------|----------|
+|PcdNumberofU5Cores| Number of U5 core enabled on U500 platform|
+|PcdE5MCSupported| Indicates whether or not the Monitor Core (E5) is supported on U500 platform|
diff --git a/Platform/RiscV/SiFive/U500Pkg/U500.dec b/Platform/RiscV/SiFive/U500Pkg/U500.dec
new file mode 100644
index 00000000..4ecca89b
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/U500.dec
@@ -0,0 +1,34 @@
+## @file U500.dec
+# This Package provides SiFive U500 modules and libraries.
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
Pleae bump specification version.

+ PACKAGE_NAME = U500
+ PACKAGE_UNI_FILE = U500.uni
+ PACKAGE_GUID = D11E9DB9-5940-4642-979D-2114342140D2
+ PACKAGE_VERSION = 1.0
+
+[Includes]
+ Include
+
+[LibraryClasses]
+
+
+[Guids]
+ gUefiRiscVPlatformU500PkgTokenSpaceGuid = {0xDFD87009, 0x27A1, 0x41DD, { 0x84, 0xB1, 0x35, 0xB4, 0xB9, 0x0D, 0x17, 0x63 }}
I would prefer ...SiFivePlatform... over ...RiscVPlattform...

+
+[PcdsFixedAtBuild]
+ gUefiRiscVPlatformU500PkgTokenSpaceGuid.PcdNumberofU5Cores|0x8|UINT32|0x00001000
+ gUefiRiscVPlatformU500PkgTokenSpaceGuid.PcdE5MCSupported|TRUE|BOOLEAN|0x00001001
+
+[PcdsPatchableInModule]
+
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ U500PkgExtra.uni
diff --git a/Platform/RiscV/SiFive/U500Pkg/U500.dsc b/Platform/RiscV/SiFive/U500Pkg/U500.dsc
new file mode 100644
index 00000000..edcd951a
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/U500.dsc
@@ -0,0 +1,549 @@
+## @file
+# RISC-V EFI on SiFive VC707 (U500) RISC-V platform
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = U500
+ PLATFORM_GUID = 0955581C-2A6A-48F7-8690-9D275AE884F8
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010005
Please bump specification version.

+ OUTPUT_DIRECTORY = Build/U500Pkg
We don't tend to use Pkg in the actual platform OUTPUT_DIRECTORY
names. Reusing $(PLATFORM_NAME) is usually sufficient.

+ SUPPORTED_ARCHITECTURES = RISCV64
+ BUILD_TARGETS = DEBUG|RELEASE
Please add NOOPT target.

+ SKUID_IDENTIFIER = DEFAULT
+ FLASH_DEFINITION = Platform/RiscV/SiFive/U500Pkg/U500.fdf
+
+ #
+ # Enable below options may cause build error or may not work on
+ # the initial version of RISC-V package
+ # Defines for default states. These can be changed on the command line.
+ # -D FLAG=VALUE
+ #
+ DEFINE SECURE_BOOT_ENABLE = FALSE
+ DEFINE DEBUG_ON_SERIAL_PORT = TRUE
+
+ #
+ # Network definition
+ #
+ DEFINE NETWORK_SNP_ENABLE = FALSE
+ DEFINE NETWORK_IP6_ENABLE = FALSE
+ DEFINE NETWORK_TLS_ENABLE = FALSE
+ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE
+ DEFINE NETWORK_ISCSI_ENABLE = FALSE
+
+[BuildOptions]
+ GCC:RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+!ifdef $(SOURCE_DEBUG_ENABLE)
+ GCC:*_*_RISCV64_GENFW_FLAGS = --keepexceptiontable
+!endif
+
+################################################################################
+#
+# SKU Identification section - list of all SKU IDs supported by this Platform.
+#
+################################################################################
+[SkuIds]
+ 0|DEFAULT
+
+################################################################################
+#
+# Library Class section - list of all Library Classes needed by this Platform.
+#
+################################################################################
+[LibraryClasses]
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
+ PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+ SerialPortLib|Platform/RiscV/SiFive/U500Pkg/Library/SerialIoLib/SerialIoLib.inf
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLibDevicePathProtocol/UefiDevicePathLibDevicePathProtocol.inf
+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
+ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
+ CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
+ SortLib|MdeModulePkg/Library/BaseSortLib/BaseSortLib.inf
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+
+# RISC-V Platform Library
+ RealTimeClockLib|Platform/RiscV/Library/RealTimeClockLibNull/RealTimeClockLibNull.inf
+
+# RISC-V Core Library
+ RiscVOpensbiLib|RiscVPkg/Library/RiscVOpensbiLib/RiscVOpensbiLib.inf
+
+!ifdef $(SOURCE_DEBUG_ENABLE)
+ PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/PeCoffExtraActionLibDebug.inf
+ DebugCommunicationLib|SourceLevelDebugPkg/Library/DebugCommunicationLibSerialPort/DebugCommunicationLibSerialPort.inf
+!else
+ PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+!endif
+
+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+ OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+ TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
+ AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf
+!else
+ TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+ AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf
+!endif
+ VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
+
+!if $(HTTP_BOOT_ENABLE) == TRUE
+ HttpLib|MdeModulePkg/Library/DxeHttpLib/DxeHttpLib.inf
+!endif
+
+# ACPI not supported yet.
+ #S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf
+ SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf
+ OrderedCollectionLib|MdePkg/Library/BaseOrderedCollectionRedBlackTreeLib/BaseOrderedCollectionRedBlackTreeLib.inf
+
+[LibraryClasses.common]
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+!endif
+ RiscVCpuLib|RiscVPkg/Library/RiscVCpuLib/RiscVCpuLib.inf
+ RiscVPlatformTimerLib|Platform/RiscV/SiFive/U500Pkg/Library/RiscVPlatformTimerLib/RiscVPlatformTimerLib.inf
+ CpuExceptionHandlerLib|RiscVPkg/Library/RiscVExceptionLib/CpuExceptionHandlerDxeLib.inf
+
+[LibraryClasses.common.SEC]
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/BaseExtractGuidedSectionLib/BaseExtractGuidedSectionLib.inf
+
+!ifdef $(SOURCE_DEBUG_ENABLE)
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf
+!endif
+
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+
+#
+# OpenSBi Platform Library
+#
+ OpenSbiPlatformLib|Platform/RiscV/SiFive/U500Pkg/Library/OpenSbiPlatformLib/OpenSbiPlatformLib.inf
+
+[LibraryClasses.common.PEI_CORE]
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ PeiServicesTablePointerLib|RiscVPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+ PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+
+[LibraryClasses.common.PEIM]
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ PeiServicesTablePointerLib|RiscVPkg/Library/PeiServicesTablePointerLibOpenSbi/PeiServicesTablePointerLibOpenSbi.inf
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+ PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ PeiResourcePublicationLib|MdePkg/Library/PeiResourcePublicationLib/PeiResourcePublicationLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+!ifdef $(SOURCE_DEBUG_ENABLE)
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SecPeiDebugAgentLib.inf
+!endif
+ FirmwareContextProcessorSpecificLib|Platform/RiscV/Library/FirmwareContextProcessorSpecificLib/FirmwareContextProcessorSpecificLib.inf
+ RiscVPlatformDxeIplLib|RiscVPkg/Library/RiscVDxeIplHandoffOpenSbiLib/RiscVDxeIplHandoffOpenSbiLib.inf
+
+#
+# RISC-V core libraries
+#
+ SiliconSiFiveE51CoreInfoLib|Silicon/SiFive/E51/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+ SiliconSiFiveU54CoreInfoLib|Silicon/SiFive/U54/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+ SiliconSiFiveU5MCCoreplexInfoLib|Platform/RiscV/SiFive/U500Pkg/Library/PeiCoreInfoHobLib/PeiCoreInfoHobLib.inf
+
+[LibraryClasses.common.DXE_CORE]
+ TimerLib|RiscVPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
+ HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+ MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+!ifdef $(SOURCE_DEBUG_ENABLE)
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
+!endif
+ #CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+
+[LibraryClasses.common.DXE_RUNTIME_DRIVER]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ TimerLib|RiscVPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+ UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+!endif
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+
+[LibraryClasses.common.UEFI_DRIVER]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ TimerLib|RiscVPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
+
+[LibraryClasses.common.DXE_DRIVER]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ TimerLib|RiscVPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+!ifdef $(SOURCE_DEBUG_ENABLE)
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/DxeDebugAgentLib.inf
+!endif
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+ PlatformBootManagerLib|Platform/RiscV/SiFive/U500Pkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf
+ #PlatformBootManagerLib|MdeModulePkg/Library/PlatformBootManagerLibNull/PlatformBootManagerLibNull.inf
+ #CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf
+
+[LibraryClasses.common.UEFI_APPLICATION]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ TimerLib|RiscVPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+!ifdef $(DEBUG_ON_SERIAL_PORT)
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!endif
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+
+[LibraryClasses.common.DXE_SMM_DRIVER]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ TimerLib|RiscVPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
+
+[LibraryClasses.common.SMM_CORE]
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ TimerLib|RiscVPkg/Library/RiscVTimerLib/BaseRiscVTimerLib.inf
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform.
+#
+################################################################################
+[PcdsFeatureFlag]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutGopSupport|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutUgaSupport|FALSE
+
+[PcdsFixedAtBuild]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeMemorySize|1
+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumGuidedExtractHandler|0x10
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x2000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x8000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVariableStoreSize|0xe000
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
+
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x8000004F
+!ifdef $(SOURCE_DEBUG_ENABLE)
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x17
+!else
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
+!endif
+
+!ifdef $(SOURCE_DEBUG_ENABLE)
+ gEfiSourceLevelDebugPkgTokenSpaceGuid.PcdDebugLoadImageMethod|0x2
+!endif
+
+ #gUefiPayloadPkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ # override the default values from SecurityPkg to ensure images from all sources are verified in secure boot
+ gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy|0x04
+ gEfiSecurityPkgTokenSpaceGuid.PcdFixedMediaImageVerificationPolicy|0x04
+ gEfiSecurityPkgTokenSpaceGuid.PcdRemovableMediaImageVerificationPolicy|0x04
+!endif
+
+ #
+ # F2 for UI APP
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBootManagerMenuFile|{ 0x21, 0xaa, 0x2c, 0x46, 0x14, 0x76, 0x03, 0x45, 0x83, 0x6e, 0x8a, 0xb6, 0xf4, 0x66, 0x23, 0x31 }
+
+################################################################################
+#
+# Pcd Dynamic Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+[PcdsDynamicDefault]
+ gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase64|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
+
+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|0
+
+ # Set video resolution for text setup.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|640
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|480
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0208
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform.
+#
+################################################################################
+[Components]
+
+ #
+ # SEC Phase modules
+ #
+ Platform/RiscV/Universal/Sec/SecMain.inf
+
+ #
+ # PEI Phase modules
+ #
+ MdeModulePkg/Core/Pei/PeiMain.inf
+ MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+ MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
+ MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
+ MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+ }
+
+ Platform/RiscV/SiFive/U500Pkg/Universal/Pei/PlatformPei/PlatformPei.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+ }
+
+ #
+ # DXE Phase modules
+ #
+ MdeModulePkg/Core/Dxe/DxeMain.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg//Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ }
+
+ MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
+ MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
+
+ MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+
+ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
+ <LibraryClasses>
+ NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
+ }
+!else
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+!endif
+
+ #
+ # EBC not supported on RISC-V yet
+ #
+ #MdeModulePkg/Universal/EbcDxe/EbcDxe.inf
+
+ UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
+ MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ }
+ MdeModulePkg/Universal/Metronome/Metronome.inf
+ MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+ MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf {
+ <LibraryClasses>
+ ResetSystemLib|MdeModulePkg/Library/BaseResetSystemLibNull/BaseResetSystemLibNull.inf
+ }
+
+ #
+ # RISC-V Platform module
+ #
+ Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/TimerDxe/TimerDxe.inf
+ Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
+
+ #
+ # RISC-V Core module
+ #
+ RiscVPkg/Universal/CpuDxe/CpuDxe.inf
+ RiscVPkg/Universal/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+ RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
+
+ MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+ MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
+ <LibraryClasses>
+ NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+ }
+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+ MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+
+# No graphic console supported yet.
+# MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf {
+# <LibraryClasses>
+# PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+# }
+ MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf {
+ <LibraryClasses>
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+ MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+ MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+ MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+ MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+ MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
+ MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+
+ #
+ # SMBIOS Support
+ #
+ MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+
+ #
+ # ACPI Support
+ # Not support on RISC-V yet
+ #
+ #MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+ #MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
+
+ #
+ # Network Support
+ #
+ !include NetworkPkg/Network.dsc.inc
+
+ #
+ # Usb Support
+ #
+ MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+ MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+ MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+ MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+ MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+ MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+
+
+ ShellPkg/Application/Shell/Shell.inf {
+ <LibraryClasses>
+ ShellCommandLib|ShellPkg/Library/UefiShellCommandLib/UefiShellCommandLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel2CommandsLib/UefiShellLevel2CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel1CommandsLib/UefiShellLevel1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellLevel3CommandsLib/UefiShellLevel3CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellDriver1CommandsLib/UefiShellDriver1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellDebug1CommandsLib/UefiShellDebug1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellInstall1CommandsLib/UefiShellInstall1CommandsLib.inf
+ NULL|ShellPkg/Library/UefiShellNetwork1CommandsLib/UefiShellNetwork1CommandsLib.inf
+ HandleParsingLib|ShellPkg/Library/UefiHandleParsingLib/UefiHandleParsingLib.inf
+ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ BcfgCommandLib|ShellPkg/Library/UefiShellBcfgCommandLib/UefiShellBcfgCommandLib.inf
+
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0xFF
+ gEfiShellPkgTokenSpaceGuid.PcdShellLibAutoInitialize|FALSE
+ gEfiMdePkgTokenSpaceGuid.PcdUefiLibMaxPrintBufferSize|8000
+ }
+
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
+!endif
+
+ MdeModulePkg/Application/UiApp/UiApp.inf
diff --git a/Platform/RiscV/SiFive/U500Pkg/U500.fdf b/Platform/RiscV/SiFive/U500Pkg/U500.fdf
new file mode 100644
index 00000000..5ca84be3
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/U500.fdf
@@ -0,0 +1,335 @@
+# @file
+# Flash definition file on SiFive VC707 (U500) RISC-V platform
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+[Defines]
+
+!include U500.fdf.inc
Why is this kept as a separate include file?

+
+#
+# Build the variable store and the firmware code as one unified flash device
+# image.
+#
+[FD.U500]
+BaseAddress = $(FW_BASE_ADDRESS)
+Size = $(FW_SIZE)
+ErasePolarity = 1
+BlockSize = $(BLOCK_SIZE)
+NumBlocks = $(FW_BLOCKS)
+
+$(SECFV_OFFSET)|$(SECFV_SIZE)
+gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVSecFvBase|gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVSecFvSize
+FV = SECFV
+
+$(PEIFV_OFFSET)|$(PEIFV_SIZE)
+gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase|gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize
+FV = PEIFV
+
+$(FVMAIN_OFFSET)|$(FVMAIN_SIZE)
+gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvBase|gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVDxeFvSize
+FV = FVMAIN_COMPACT
+
+!include VarStore.fdf.inc
+
+################################################################################
+
+[FV.SECFV]
+BlockSize = 0x1000
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+#
+# SEC Phase modules
+#
+# The code in this FV handles the initial firmware startup, and
+# decompresses the PEI and DXE FVs which handles the rest of the boot sequence.
+#
+INF Platform/RiscV/Universal/Sec/SecMain.inf
+
+################################################################################
+[FV.PEIFV]
+BlockSize = 0x10000
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+APRIORI PEI {
+ INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
+ INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
+ INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+}
+
+#
+# PEI Phase modules
+#
+INF MdeModulePkg/Core/Pei/PeiMain.inf
+INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
+INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
+INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
+INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
+
+# RISC-V Platform PEI Driver
+INF Platform/RiscV/SiFive/U500Pkg/Universal/Pei/PlatformPei/PlatformPei.inf
+
+################################################################################
+
+[FV.DXEFV]
+BlockSize = 0x10000
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+
+APRIORI DXE {
+ INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+ INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+ INF Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
+}
+
+#
+# DXE Phase modules
+#
+INF MdeModulePkg/Core/Dxe/DxeMain.inf
+
+INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
+INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
+INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
+
+INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
+INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
+INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+INF MdeModulePkg/Universal/Metronome/Metronome.inf
+
+# RISC-V Platform Drivers
+INF Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/RamFvbServicesRuntimeDxe/FvbServicesRuntimeDxe.inf
+
+# RISC-V Core Drivers
+INF RiscVPkg/Universal/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
+INF Platform/RiscV/SiFive/U500Pkg/Universal/Dxe/TimerDxe/TimerDxe.inf
+INF RiscVPkg/Universal/CpuDxe/CpuDxe.inf
+INF RiscVPkg/Universal/SmbiosDxe/RiscVSmbiosDxe.inf
+
+INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
+
+INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
+!endif
+
+INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
+INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+#INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
+INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf
+INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
+INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
+INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
+INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
+
+!ifndef $(SOURCE_DEBUG_ENABLE)
+INF MdeModulePkg/Universal/SerialDxe/SerialDxe.inf
+!endif
+
+INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+
+#
+# ACPI is not supported yet on RISC-V package.
+#
+#INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
+#INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
+#INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf
+
+#INF RuleOverride = BINARY FatBinPkg/EnhancedFatDxe/Fat.inf
+
+INF ShellPkg/Application/Shell/Shell.inf
+
+#
+# Network modules
+#
+!if $(E1000_ENABLE)
+ FILE DRIVER = 5D695E11-9B3F-4b83-B25F-4A8D5D69BE07 {
+ SECTION PE32 = Intel3.5/EFIX64/E3507X2.EFI
+ }
+!endif
+
+!include NetworkPkg/Network.fdf.inc
+
+#
+# Usb Support
+#
+INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+
+INF MdeModulePkg/Application/UiApp/UiApp.inf
+
+################################################################################
+
+[FV.FVMAIN_COMPACT]
+FvAlignment = 16
+ERASE_POLARITY = 1
+MEMORY_MAPPED = TRUE
+STICKY_WRITE = TRUE
+LOCK_CAP = TRUE
+LOCK_STATUS = TRUE
+WRITE_DISABLED_CAP = TRUE
+WRITE_ENABLED_CAP = TRUE
+WRITE_STATUS = TRUE
+WRITE_LOCK_CAP = TRUE
+WRITE_LOCK_STATUS = TRUE
+READ_DISABLED_CAP = TRUE
+READ_ENABLED_CAP = TRUE
+READ_STATUS = TRUE
+READ_LOCK_CAP = TRUE
+READ_LOCK_STATUS = TRUE
+FvNameGuid = 27A72E80-3118-4c0c-8673-AA5B4EFA9613
+
+FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
+ SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
+ #
+ # These firmware volumes will have files placed in them uncompressed,
+ # and then both firmware volumes will be compressed in a single
+ # compression operation in order to achieve better overall compression.
+ #
+ SECTION FV_IMAGE = DXEFV
+ }
+ }
+
+[Rule.Common.SEC]
+ FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING ="$(MODULE_NAME)" Optional
+ VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.PEI_CORE]
+ FILE PEI_CORE = $(NAMED_GUID) {
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING ="$(MODULE_NAME)" Optional
+ VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.PEIM]
+ FILE PEIM = $(NAMED_GUID) {
+ PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.DXE_CORE]
+ FILE DXE_CORE = $(NAMED_GUID) {
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.DXE_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.DXE_RUNTIME_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.UEFI_DRIVER]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.UEFI_DRIVER.BINARY]
+ FILE DRIVER = $(NAMED_GUID) {
+ DXE_DEPEX DXE_DEPEX Optional |.depex
+ PE32 PE32 Align=4K |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.UEFI_APPLICATION]
+ FILE APPLICATION = $(NAMED_GUID) {
+ PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.UEFI_APPLICATION.BINARY]
+ FILE APPLICATION = $(NAMED_GUID) {
+ PE32 PE32 Align=4K |.efi
+ UI STRING="$(MODULE_NAME)" Optional
+ VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
+ }
+
+[Rule.Common.USER_DEFINED.ACPITABLE]
+ FILE FREEFORM = $(NAMED_GUID) {
+ RAW ACPI |.acpi
+ RAW ASL |.aml
+ }
diff --git a/Platform/RiscV/SiFive/U500Pkg/U500.fdf.inc b/Platform/RiscV/SiFive/U500Pkg/U500.fdf.inc
new file mode 100644
index 00000000..ac24b5b0
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/U500.fdf.inc
@@ -0,0 +1,52 @@
+## @file
+# Definitions of Flash definition file on SiFive VC707 (U500) RISC-V platform
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
*if* this is kept as a separate file, we need to add a [Defines]
section header here.

+DEFINE BLOCK_SIZE = 0x1000
+
+DEFINE FW_BASE_ADDRESS = 0x80000000
+DEFINE FW_SIZE = 0x00800000
+DEFINE FW_BLOCKS = 0x800
+
+#
+# 0x000000-0x7DFFFF code
+# 0x7E0000-0x800000 variables
+#
+DEFINE CODE_BASE_ADDRESS = 0x80000000
+DEFINE CODE_SIZE = 0x007E0000
+DEFINE CODE_BLOCKS = 0x7E0
+DEFINE VARS_BLOCKS = 0x20
+
+DEFINE SECFV_OFFSET = 0x00000000
+DEFINE SECFV_SIZE = 0x00020000
+DEFINE PEIFV_OFFSET = 0x00020000
+DEFINE PEIFV_SIZE = 0x00060000
+DEFINE SCRATCH_OFFSET = 0x00080000
+DEFINE SCRATCH_SIZE = 0x00010000
+DEFINE FVMAIN_OFFSET = 0x00100000 # Must be power of 2 for PMP setting
+DEFINE FVMAIN_SIZE = 0x0018C000
+DEFINE VARS_OFFSET = 0x007E0000
+DEFINE VARS_SIZE = 0x00020000
+
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBaseAddress = $(FW_BASE_ADDRESS) + $(VARS_OFFSET)
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdSize = $(VARS_SIZE)
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdVariableFdBlockSize = $(BLOCK_SIZE)
+
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwStartAddress = $(CODE_BASE_ADDRESS)
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwEndAddress = $(CODE_BASE_ADDRESS) + $(SECFV_SIZE) + $(PEIFV_SIZE) + $(SCRATCH_SIZE)
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize = 8192
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase = $(CODE_BASE_ADDRESS) + $(SCRATCH_OFFSET)
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamSize = $(SCRATCH_SIZE)
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamBase = $(CODE_BASE_ADDRESS) + $(FW_SIZE)
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize = 0x10000
+
+
+SET gUefiRiscVPkgTokenSpaceGuid.PcdRiscVMachineTimerFrequencyInHerz = 1000000
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount = 4 # Total cores on U500 platform
+SET gUefiRiscVPlatformU500PkgTokenSpaceGuid.PcdNumberofU5Cores = 4 # Total U5 cores enabled on U500 platform
+SET gUefiRiscVPlatformU500PkgTokenSpaceGuid.PcdE5MCSupported = False # Enable optional E51 MC core?
+SET gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId = 0 # Boot hart ID
diff --git a/Platform/RiscV/SiFive/U500Pkg/U500.uni b/Platform/RiscV/SiFive/U500Pkg/U500.uni
new file mode 100644
index 00000000..7ac1096f
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/U500.uni
@@ -0,0 +1,13 @@
+// /** @file
+// SiFive U500 Package Localized Strings and Content.
+//
+// Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_PACKAGE_ABSTRACT #language en-US "Provides SiFIve RISC-V U500 platform modules and libraries"
+
+#string STR_PACKAGE_DESCRIPTION #language en-US "This Package SiFIve RISC-V U500 platform modules and libraries."
diff --git a/Platform/RiscV/SiFive/U500Pkg/U500PkgExtra.uni b/Platform/RiscV/SiFive/U500Pkg/U500PkgExtra.uni
new file mode 100644
index 00000000..6b68fb43
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/U500PkgExtra.uni
@@ -0,0 +1,12 @@
+// /** @file
+// SiFive U500 Package Localized Strings and Content.
+//
+// Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+#string STR_PROPERTIES_PACKAGE_NAME
+#language en-US
+"SiFive U500 package"
diff --git a/Platform/RiscV/SiFive/U500Pkg/VarStore.fdf.inc b/Platform/RiscV/SiFive/U500Pkg/VarStore.fdf.inc
new file mode 100644
index 00000000..c287bb43
--- /dev/null
+++ b/Platform/RiscV/SiFive/U500Pkg/VarStore.fdf.inc
@@ -0,0 +1,78 @@
+## @file
+# FDF include file with Layout Regions that define an empty variable store.
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+# Copyright (C) 2014, Red Hat, Inc.
+# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
Again, if this is kept as a separate file, we need to add a
[FD.U500] header.

/
Leif

+
+$(VARS_OFFSET)|0x00007000
+gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
+#
+# NV_VARIABLE_STORE
+#
+DATA = {
+ ## This is the EFI_FIRMWARE_VOLUME_HEADER
+ # ZeroVector []
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ # FileSystemGuid: gEfiSystemNvDataFvGuid =
+ # { 0xFFF12B8D, 0x7696, 0x4C8B,
+ # { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
+ 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
+ 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
+ # FvLength: 0x20000
+ 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
+ # Signature "_FVH" # Attributes
+ 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
+ # HeaderLength # CheckSum # ExtHeaderOffset #Reserved #Revision
+ 0x48, 0x00, 0x39, 0xF1, 0x00, 0x00, 0x00, 0x02,
+ # Blockmap[0]: 0x20 Blocks * 0x1000 Bytes / Block
+ 0x00, 0x08, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00,
+ # Blockmap[1]: End
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+ ## This is the VARIABLE_STORE_HEADER
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ # Signature: gEfiAuthenticatedVariableGuid =
+ # { 0xaaf32c78, 0x947b, 0x439a,
+ # { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
+ 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
+ 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
+!else
+ # Signature: gEfiVariableGuid =
+ # { 0xddcf3616, 0x3275, 0x4164,
+ # { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
+ 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
+ 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
+!endif
+ # Size: 0x7000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) -
+ # 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x6fb8
+ # This can speed up the Variable Dispatch a bit.
+ 0xB8, 0x6F, 0x00, 0x00,
+ # FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
+ 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+}
+
+0x007e7000|0x00001000
+gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
+#
+#NV_FTW_WROK
+#
+DATA = {
+ # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
+ # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
+ 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,
+ 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95,
+ # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
+ 0x2c, 0xaf, 0x2c, 0x64, 0xFE, 0xFF, 0xFF, 0xFF,
+ # WriteQueueSize: UINT64
+ 0xE0, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+}
+
+0x007e8000|0x00018000
+gUefiRiscVPlatformPkgTokenSpaceGuid.PcdPlatformFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
+#
+#NV_FTW_SPARE
--
2.12.0.windows.1




Re: [plaforms/devel-riscv-v2 PATCHv2 06/14] RiscV/Universal: Initial version of common RISC-V SEC module

Leif Lindholm
 

On Thu, Sep 19, 2019 at 11:51:23AM +0800, Gilbert Chen wrote:
Common RISC-V SEC module for RISC-V platforms.
If this is common to RISC-V platforms, this really should live in
edk2/RiscVPkg.

Signed-off-by: Gilbert Chen <gilbert.chen@hpe.com>
---
Platform/RiscV/Universal/Sec/Riscv64/SecEntry.S | 438 ++++++++++++++++++++
Platform/RiscV/Universal/Sec/SecMain.c | 524 ++++++++++++++++++++++++
Platform/RiscV/Universal/Sec/SecMain.h | 57 +++
Platform/RiscV/Universal/Sec/SecMain.inf | 75 ++++
4 files changed, 1094 insertions(+)
create mode 100644 Platform/RiscV/Universal/Sec/Riscv64/SecEntry.S
create mode 100644 Platform/RiscV/Universal/Sec/SecMain.c
create mode 100644 Platform/RiscV/Universal/Sec/SecMain.h
create mode 100644 Platform/RiscV/Universal/Sec/SecMain.inf

diff --git a/Platform/RiscV/Universal/Sec/Riscv64/SecEntry.S b/Platform/RiscV/Universal/Sec/Riscv64/SecEntry.S
new file mode 100644
index 00000000..18b54b84
--- /dev/null
+++ b/Platform/RiscV/Universal/Sec/Riscv64/SecEntry.S
@@ -0,0 +1,438 @@
+/*
+ * Copyright (c) 2019 , Hewlett Packard Enterprise Development LP. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ * Anup Patel <anup.patel@wdc.com>
If Anup is the author, he should be indicated in the commit as the
Author.

If you further modify the patch, you can add a comment above your
signed-off-by: of the form
[Updated coding style issues.]
Signed-off-by: ...

+ *
+ */
+
+#include <Base.h>
+#include <RiscV.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_trap.h>
+
+#include <SecMain.h>
+#include <sbi/SbiFirmwareContext.h>
+
+.text
+.align 3
+.global ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+ /*
+ * Jump to warm-boot if this is not the selected core booting,
+ */
+ csrr a6, CSR_MHARTID
+ li a5, FixedPcdGet32 (PcdBootHartId)
+ bne a6, a5, _wait_for_boot_hart
We don't actually have a coding style for assembler, but I find it
really helps readability to have the arguments aligned across all
lines. Compare (for example) with OvmfPkg/Sec/X64/SecEntry.nasm.

+
+ // light LED on
+ li a5, 0x54002000
+ li a4, 0xff
+ sw a4, 0x08(a5)
+ li a4, 0x11
+ sw a4, 0x0c(a5)
+
+ li ra, 0
+ call _reset_regs
+
+ /* Preload HART details
+ * s7 -> HART Count
+ * s8 -> HART Stack Size
+ */
+ li s7, FixedPcdGet32 (PcdHartCount)
+ li s8, FixedPcdGet32 (PcdOpenSbiStackSize)
+
+ /* Setup scratch space for all the HARTs*/
+ li tp, FixedPcdGet32 (PcdScratchRamBase)
+ mul a5, s7, s8
+ add tp, tp, a5
+ /* Keep a copy of tp */
+ add t3, tp, zero
+ /* Counter */
+ li t2, 1
+ /* hartid 0 is mandated by ISA */
+ li t1, 0
+_scratch_init:
+ add tp, t3, zero
+ mul a5, s8, t1
+ sub tp, tp, a5
+ li a5, SBI_SCRATCH_SIZE
+ sub tp, tp, a5
+
+ /* Initialize scratch space */
+ li a4, FixedPcdGet32 (PcdFwStartAddress)
+ li a5, FixedPcdGet32 (PcdFwEndAddress)
+ sub a5, a5, a4
+ sd a4, SBI_SCRATCH_FW_START_OFFSET(tp)
+ sd a5, SBI_SCRATCH_FW_SIZE_OFFSET(tp)
Can you add a blank line here?

+ /* Note: fw_next_arg1() uses a0, a1, and ra */
+ call fw_next_arg1
+ sd a0, SBI_SCRATCH_NEXT_ARG1_OFFSET(tp)
Can you add a blank line here?

+ /* Note: fw_next_addr() uses a0, a1, and ra */
+ call fw_next_addr
Can you add a blank line here?

+ sd a0, SBI_SCRATCH_NEXT_ADDR_OFFSET(tp)
+ li a4, PRV_S
+ sd a4, SBI_SCRATCH_NEXT_MODE_OFFSET(tp)
+ la a4, _start_warm
+ sd a4, SBI_SCRATCH_WARMBOOT_ADDR_OFFSET(tp)
+ la a4, platform
+ sd a4, SBI_SCRATCH_PLATFORM_ADDR_OFFSET(tp)
+ la a4, _hartid_to_scratch
+ sd a4, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET(tp)
+ sd zero, SBI_SCRATCH_TMP0_OFFSET(tp)
Can you add a blank line here?

+#ifdef FW_OPTIONS
+ li a4, FW_OPTIONS
+ sd a4, SBI_SCRATCH_OPTIONS_OFFSET(tp)
+#else
+ sd zero, SBI_SCRATCH_OPTIONS_OFFSET(tp)
+#endif
Can you add a blank line here?

+ add t1, t1, t2
+ blt t1, s7, _scratch_init
+
+ /* Fill-out temporary memory with 55aa*/
+ li a4, FixedPcdGet32 (PcdTemporaryRamBase)
+ li a5, FixedPcdGet32 (PcdTemporaryRamSize)
+ add a5, a4, a5
+1:
+ li a3, 0x5AA55AA55AA55AA5
+ sd a3, (a4)
+ add a4, a4, __SIZEOF_POINTER__
+ blt a4, a5, 1b
+
+ /* Update boot hart flag */
+ la a4, _boot_hart_done
+ li a5, 1
+ sd a5, (a4)
+
+ /* Wait for boot hart */
+_wait_for_boot_hart:
+ la a4, _boot_hart_done
+ ld a5, (a4)
+ /* Reduce the bus traffic so that boot hart may proceed faster */
+ nop
+ nop
+ nop
+ beqz a5, _wait_for_boot_hart
+
+_start_warm:
+ li ra, 0
+ call _reset_regs
+
+ /* Disable and clear all interrupts */
+ csrw CSR_MIE, zero
+ csrw CSR_MIP, zero
+
+ li s7, FixedPcdGet32 (PcdHartCount)
+ li s8, FixedPcdGet32 (PcdOpenSbiStackSize)
+
+ /* HART ID should be within expected limit */
+ csrr s6, CSR_MHARTID
+ bge s6, s7, _start_hang
+
+ /* find the scratch space for this hart */
+ li tp, FixedPcdGet32 (PcdScratchRamBase)
+ mul a5, s7, s8
+ add tp, tp, a5
+ mul a5, s8, s6
+ sub tp, tp, a5
+ li a5, SBI_SCRATCH_SIZE
+ sub tp, tp, a5
+
+ /* update the mscratch */
+ csrw CSR_MSCRATCH, tp
+
+ /*make room for Hart specific Firmware Context*/
+ li a5, FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE
+ sub tp, tp, a5
+
+ /* Setup stack */
+ add sp, tp, zero
+
+ /* Setup stack for the Hart executing EFI to top of temporary ram*/
+ csrr a6, CSR_MHARTID
+ li a5, FixedPcdGet32 (PcdBootHartId)
+ bne a6, a5, 1f
+
+ li a4, FixedPcdGet32(PcdTemporaryRamBase)
+ li a5, FixedPcdGet32(PcdTemporaryRamSize)
+ add sp, a4, a5
+ 1:
+
+ /* Setup trap handler */
+ la a4, _trap_handler
+ csrw CSR_MTVEC, a4
Can you add a blank line here?

+ /* Make sure that mtvec is updated */
+ 1:
+ csrr a5, CSR_MTVEC
+ bne a4, a5, 1b
+
+ /* Call library constructors before jup to SEC core */
+ call ProcessLibraryConstructorList
+
+ /* jump to SEC Core C */
+ csrr a0, CSR_MHARTID
+ csrr a1, CSR_MSCRATCH
+ call SecCoreStartUpWithStack
+
+ /* We do not expect to reach here hence just hang */
+ j _start_hang
+
+ .align 3
+ .section .data, "aw"
+_boot_hart_done:
+ RISCV_PTR 0
+
+ .align 3
+ .section .entry, "ax", %progbits
+ .globl _hartid_to_scratch
+_hartid_to_scratch:
+ add sp, sp, -(3 * __SIZEOF_POINTER__)
+ sd s0, (sp)
+ sd s1, (__SIZEOF_POINTER__)(sp)
+ sd s2, (__SIZEOF_POINTER__ * 2)(sp)
Can you add a blank line here?

+ /*
+ * a0 -> HART ID (passed by caller)
+ * s0 -> HART Stack Size
+ * s1 -> HART Stack End
+ * s2 -> Temporary
+ */
+ la s2, platform
+#if __riscv_xlen == 64
+ lwu s0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
+ lwu s2, SBI_PLATFORM_HART_COUNT_OFFSET(s2)
+#else
+ lw s0, SBI_PLATFORM_HART_STACK_SIZE_OFFSET(s2)
+ lw s2, SBI_PLATFORM_HART_COUNT_OFFSET(s2)
+#endif
+ mul s2, s2, s0
+ li s1, FixedPcdGet32 (PcdScratchRamBase)
+ add s1, s1, s2
+ mul s2, s0, a0
+ sub s1, s1, s2
+ li s2, SBI_SCRATCH_SIZE
+ sub a0, s1, s2
+ ld s0, (sp)
+ ld s1, (__SIZEOF_POINTER__)(sp)
+ ld s2, (__SIZEOF_POINTER__ * 2)(sp)
+ add sp, sp, (3 * __SIZEOF_POINTER__)
+ ret
+
+ .align 3
+ .section .entry, "ax", %progbits
+ .globl _start_hang
+_start_hang:
+ wfi
+ j _start_hang
+
+ .align 3
+ .section .entry, "ax", %progbits
+ .globl _trap_handler
+_trap_handler:
+ /* Swap TP and MSCRATCH */
+ csrrw tp, CSR_MSCRATCH, tp
+
+ /* Save T0 in scratch space */
+ sd t0, SBI_SCRATCH_TMP0_OFFSET(tp)
+
+ /* Check which mode we came from */
+ csrr t0, CSR_MSTATUS
+ srl t0, t0, MSTATUS_MPP_SHIFT
+ and t0, t0, PRV_M
+ xori t0, t0, PRV_M
+ beq t0, zero, _trap_handler_m_mode
+
+ /* We came from S-mode or U-mode */
+_trap_handler_s_mode:
+ /* Set T0 to original SP */
+ add t0, sp, zero
+
+ /* Setup exception stack */
+ add sp, tp, -(SBI_TRAP_REGS_SIZE)
+
+ /* Jump to code common for all modes */
+ j _trap_handler_all_mode
+
+ /* We came from M-mode */
+_trap_handler_m_mode:
+ /* Set T0 to original SP */
+ add t0, sp, zero
+
+ /* Re-use current SP as exception stack */
+ add sp, sp, -(SBI_TRAP_REGS_SIZE)
+
+_trap_handler_all_mode:
+ /* Save original SP (from T0) on stack */
+ sd t0, SBI_TRAP_REGS_OFFSET(sp)(sp)
+
+ /* Restore T0 from scratch space */
+ ld t0, SBI_SCRATCH_TMP0_OFFSET(tp)
+
+ /* Save T0 on stack */
+ sd t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
+
+ /* Swap TP and MSCRATCH */
+ csrrw tp, CSR_MSCRATCH, tp
+
+ /* Save MEPC and MSTATUS CSRs */
+ csrr t0, CSR_MEPC
+ sd t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
+ csrr t0, CSR_MSTATUS
+ sd t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
+
+ /* Save all general regisers except SP and T0 */
+ sd zero, SBI_TRAP_REGS_OFFSET(zero)(sp)
+ sd ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
+ sd gp, SBI_TRAP_REGS_OFFSET(gp)(sp)
+ sd tp, SBI_TRAP_REGS_OFFSET(tp)(sp)
+ sd t1, SBI_TRAP_REGS_OFFSET(t1)(sp)
+ sd t2, SBI_TRAP_REGS_OFFSET(t2)(sp)
+ sd s0, SBI_TRAP_REGS_OFFSET(s0)(sp)
+ sd s1, SBI_TRAP_REGS_OFFSET(s1)(sp)
+ sd a0, SBI_TRAP_REGS_OFFSET(a0)(sp)
+ sd a1, SBI_TRAP_REGS_OFFSET(a1)(sp)
+ sd a2, SBI_TRAP_REGS_OFFSET(a2)(sp)
+ sd a3, SBI_TRAP_REGS_OFFSET(a3)(sp)
+ sd a4, SBI_TRAP_REGS_OFFSET(a4)(sp)
+ sd a5, SBI_TRAP_REGS_OFFSET(a5)(sp)
+ sd a6, SBI_TRAP_REGS_OFFSET(a6)(sp)
+ sd a7, SBI_TRAP_REGS_OFFSET(a7)(sp)
+ sd s2, SBI_TRAP_REGS_OFFSET(s2)(sp)
+ sd s3, SBI_TRAP_REGS_OFFSET(s3)(sp)
+ sd s4, SBI_TRAP_REGS_OFFSET(s4)(sp)
+ sd s5, SBI_TRAP_REGS_OFFSET(s5)(sp)
+ sd s6, SBI_TRAP_REGS_OFFSET(s6)(sp)
+ sd s7, SBI_TRAP_REGS_OFFSET(s7)(sp)
+ sd s8, SBI_TRAP_REGS_OFFSET(s8)(sp)
+ sd s9, SBI_TRAP_REGS_OFFSET(s9)(sp)
+ sd s10, SBI_TRAP_REGS_OFFSET(s10)(sp)
+ sd s11, SBI_TRAP_REGS_OFFSET(s11)(sp)
+ sd t3, SBI_TRAP_REGS_OFFSET(t3)(sp)
+ sd t4, SBI_TRAP_REGS_OFFSET(t4)(sp)
+ sd t5, SBI_TRAP_REGS_OFFSET(t5)(sp)
+ sd t6, SBI_TRAP_REGS_OFFSET(t6)(sp)
+
+ /* Call C routine */
+ add a0, sp, zero
+ csrr a1, CSR_MSCRATCH
+ call sbi_trap_handler
+
+ /* Restore all general regisers except SP and T0 */
+ ld ra, SBI_TRAP_REGS_OFFSET(ra)(sp)
+ ld gp, SBI_TRAP_REGS_OFFSET(gp)(sp)
+ ld tp, SBI_TRAP_REGS_OFFSET(tp)(sp)
+ ld t1, SBI_TRAP_REGS_OFFSET(t1)(sp)
+ ld t2, SBI_TRAP_REGS_OFFSET(t2)(sp)
+ ld s0, SBI_TRAP_REGS_OFFSET(s0)(sp)
+ ld s1, SBI_TRAP_REGS_OFFSET(s1)(sp)
+ ld a0, SBI_TRAP_REGS_OFFSET(a0)(sp)
+ ld a1, SBI_TRAP_REGS_OFFSET(a1)(sp)
+ ld a2, SBI_TRAP_REGS_OFFSET(a2)(sp)
+ ld a3, SBI_TRAP_REGS_OFFSET(a3)(sp)
+ ld a4, SBI_TRAP_REGS_OFFSET(a4)(sp)
+ ld a5, SBI_TRAP_REGS_OFFSET(a5)(sp)
+ ld a6, SBI_TRAP_REGS_OFFSET(a6)(sp)
+ ld a7, SBI_TRAP_REGS_OFFSET(a7)(sp)
+ ld s2, SBI_TRAP_REGS_OFFSET(s2)(sp)
+ ld s3, SBI_TRAP_REGS_OFFSET(s3)(sp)
+ ld s4, SBI_TRAP_REGS_OFFSET(s4)(sp)
+ ld s5, SBI_TRAP_REGS_OFFSET(s5)(sp)
+ ld s6, SBI_TRAP_REGS_OFFSET(s6)(sp)
+ ld s7, SBI_TRAP_REGS_OFFSET(s7)(sp)
+ ld s8, SBI_TRAP_REGS_OFFSET(s8)(sp)
+ ld s9, SBI_TRAP_REGS_OFFSET(s9)(sp)
+ ld s10, SBI_TRAP_REGS_OFFSET(s10)(sp)
+ ld s11, SBI_TRAP_REGS_OFFSET(s11)(sp)
+ ld t3, SBI_TRAP_REGS_OFFSET(t3)(sp)
+ ld t4, SBI_TRAP_REGS_OFFSET(t4)(sp)
+ ld t5, SBI_TRAP_REGS_OFFSET(t5)(sp)
+ ld t6, SBI_TRAP_REGS_OFFSET(t6)(sp)
+
+ /* Restore MEPC and MSTATUS CSRs */
+ ld t0, SBI_TRAP_REGS_OFFSET(mepc)(sp)
+ csrw CSR_MEPC, t0
+ ld t0, SBI_TRAP_REGS_OFFSET(mstatus)(sp)
+ csrw CSR_MSTATUS, t0
+
+ /* Restore T0 */
+ ld t0, SBI_TRAP_REGS_OFFSET(t0)(sp)
+
+ /* Restore SP */
+ ld sp, SBI_TRAP_REGS_OFFSET(sp)(sp)
+
+ mret
+
+ .align 3
+ .section .entry, "ax", %progbits
+ .globl _reset_regs
+_reset_regs:
+
+ /* flush the instruction cache */
+ fence.i
+ /* Reset all registers except ra, a0,a1 */
+ li sp, 0
+ li gp, 0
+ li tp, 0
+ li t0, 0
+ li t1, 0
+ li t2, 0
+ li s0, 0
+ li s1, 0
+ li a2, 0
+ li a3, 0
+ li a4, 0
+ li a5, 0
+ li a6, 0
+ li a7, 0
+ li s2, 0
+ li s3, 0
+ li s4, 0
+ li s5, 0
+ li s6, 0
+ li s7, 0
+ li s8, 0
+ li s9, 0
+ li s10, 0
+ li s11, 0
+ li t3, 0
+ li t4, 0
+ li t5, 0
+ li t6, 0
+ csrw CSR_MSCRATCH, 0
+ ret
+
+ .align 3
+ .section .entry, "ax", %progbits
+ .global fw_prev_arg1
+fw_prev_arg1:
+ /* We return previous arg1 in 'a0' */
+ add a0, zero, zero
+ ret
+
+ .align 3
+ .section .entry, "ax", %progbits
+ .global fw_next_arg1
+fw_next_arg1:
+ /* We return next arg1 in 'a0' */
+ li a0, FixedPcdGet32(PcdRiscVPeiFvBase)
+ ret
+
+ .align 3
+ .section .entry, "ax", %progbits
+ .global fw_next_addr
+fw_next_addr:
+ /* We return next address in 'a0' */
+ la a0, _jump_addr
+ ld a0, (a0)
+ ret
+
+ .align 3
+ .section .entry, "ax", %progbits
+_jump_addr:
+ RISCV_PTR SecCoreStartUpWithStack
diff --git a/Platform/RiscV/Universal/Sec/SecMain.c b/Platform/RiscV/Universal/Sec/SecMain.c
new file mode 100644
index 00000000..40b351ca
--- /dev/null
+++ b/Platform/RiscV/Universal/Sec/SecMain.c
@@ -0,0 +1,524 @@
+/** @file
+ RISC-V SEC phase module.
+
+ Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include "SecMain.h"
+#include <Library/SerialPortLib.h>
+#include <Library/PrintLib.h>
+#include <Library/DebugPrintErrorLevelLib.h>
+#include <sbi/sbi_hart.h>
+#include <sbi/sbi_scratch.h>
+#include <sbi/sbi_platform.h>
+#include <sbi/sbi.h>
+#include <sbi/sbi_init.h>
Please sort includes alphabetically.

+#include <sbi/SbiFirmwareContext.h>
+
+int HartsIn = 0;
UINTN?

+
+EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI mTemporaryRamSupportPpi = {
+ TemporaryRamMigration
+};
+
+EFI_PEI_TEMPORARY_RAM_DONE_PPI mTemporaryRamDonePpi = {
+ TemporaryRamDone
+};
+
+EFI_PEI_PPI_DESCRIPTOR mPrivateDispatchTable[] = {
+ {
+ EFI_PEI_PPI_DESCRIPTOR_PPI,
+ &gEfiTemporaryRamSupportPpiGuid,
+ &mTemporaryRamSupportPpi
+ },
+ {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiTemporaryRamDonePpiGuid,
+ &mTemporaryRamDonePpi
+ },
+};
Can the above three variables all be made STATIC?

+
+/**
+ Locates a section within a series of sections
+ with the specified section type.
+
+ The Instance parameter indicates which instance of the section
+ type to return. (0 is first instance, 1 is second...)
+
+ @param[in] Sections The sections to search
+ @param[in] SizeOfSections Total size of all sections
+ @param[in] SectionType The section type to locate
+ @param[in] Instance The section instance number
+ @param[out] FoundSection The FFS section if found
+
+ @retval EFI_SUCCESS The file and section was found
+ @retval EFI_NOT_FOUND The file and section was not found
+ @retval EFI_VOLUME_CORRUPTED The firmware volume was corrupted
+
+**/
+EFI_STATUS
+FindFfsSectionInstance (
This is a note, not something that needs to be addressed for setting
up the -devel branch: but this function is identical to the one in
<edk2>/OvmfPkg/Sec/SecMain.c and the one in
Platform/Intel/SimicsOpenBoardPkg/SecCore/SecMain.c
We should address this.

+ IN VOID *Sections,
+ IN UINTN SizeOfSections,
+ IN EFI_SECTION_TYPE SectionType,
+ IN UINTN Instance,
+ OUT EFI_COMMON_SECTION_HEADER **FoundSection
+ )
+{
+ EFI_PHYSICAL_ADDRESS CurrentAddress;
+ UINT32 Size;
+ EFI_PHYSICAL_ADDRESS EndOfSections;
+ EFI_COMMON_SECTION_HEADER *Section;
+ EFI_PHYSICAL_ADDRESS EndOfSection;
+
+ //
+ // Loop through the FFS file sections within the PEI Core FFS file
+ //
+ EndOfSection = (EFI_PHYSICAL_ADDRESS)(UINTN) Sections;
+ EndOfSections = EndOfSection + SizeOfSections;
+ for (;;) {
+ if (EndOfSection == EndOfSections) {
+ break;
+ }
+ CurrentAddress = (EndOfSection + 3) & ~(3ULL);
+ if (CurrentAddress >= EndOfSections) {
+ return EFI_VOLUME_CORRUPTED;
+ }
+
+ Section = (EFI_COMMON_SECTION_HEADER*)(UINTN) CurrentAddress;
+
+ Size = SECTION_SIZE (Section);
+ if (Size < sizeof (*Section)) {
+ return EFI_VOLUME_CORRUPTED;
+ }
+
+ EndOfSection = CurrentAddress + Size;
+ if (EndOfSection > EndOfSections) {
+ return EFI_VOLUME_CORRUPTED;
+ }
+
+ //
+ // Look for the requested section type
+ //
+ if (Section->Type == SectionType) {
+ if (Instance == 0) {
+ *FoundSection = Section;
+ return EFI_SUCCESS;
+ } else {
+ Instance--;
+ }
+ }
+ }
+
+ return EFI_NOT_FOUND;
+}
+
+/**
+ Locates a section within a series of sections
+ with the specified section type.
+
+ @param[in] Sections The sections to search
+ @param[in] SizeOfSections Total size of all sections
+ @param[in] SectionType The section type to locate
+ @param[out] FoundSection The FFS section if found
+
+ @retval EFI_SUCCESS The file and section was found
+ @retval EFI_NOT_FOUND The file and section was not found
+ @retval EFI_VOLUME_CORRUPTED The firmware volume was corrupted
+
+**/
+EFI_STATUS
+FindFfsSectionInSections (
The same applies to this one.

+ IN VOID *Sections,
+ IN UINTN SizeOfSections,
+ IN EFI_SECTION_TYPE SectionType,
+ OUT EFI_COMMON_SECTION_HEADER **FoundSection
+ )
+{
+ return FindFfsSectionInstance (
+ Sections,
+ SizeOfSections,
+ SectionType,
+ 0,
+ FoundSection
+ );
+}
+
+/**
+ Locates a FFS file with the specified file type and a section
+ within that file with the specified section type.
+
+ @param[in] Fv The firmware volume to search
+ @param[in] FileType The file type to locate
+ @param[in] SectionType The section type to locate
+ @param[out] FoundSection The FFS section if found
+
+ @retval EFI_SUCCESS The file and section was found
+ @retval EFI_NOT_FOUND The file and section was not found
+ @retval EFI_VOLUME_CORRUPTED The firmware volume was corrupted
+
+**/
+EFI_STATUS
+FindFfsFileAndSection (
And this one.

+ IN EFI_FIRMWARE_VOLUME_HEADER *Fv,
+ IN EFI_FV_FILETYPE FileType,
+ IN EFI_SECTION_TYPE SectionType,
+ OUT EFI_COMMON_SECTION_HEADER **FoundSection
+ )
+{
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS CurrentAddress;
+ EFI_PHYSICAL_ADDRESS EndOfFirmwareVolume;
+ EFI_FFS_FILE_HEADER *File;
+ UINT32 Size;
+ EFI_PHYSICAL_ADDRESS EndOfFile;
+
+ if (Fv->Signature != EFI_FVH_SIGNATURE) {
+ DEBUG ((DEBUG_ERROR, "FV at %p does not have FV header signature\n", Fv));
+ return EFI_VOLUME_CORRUPTED;
+ }
+
+ CurrentAddress = (EFI_PHYSICAL_ADDRESS)(UINTN) Fv;
+ EndOfFirmwareVolume = CurrentAddress + Fv->FvLength;
+
+ //
+ // Loop through the FFS files in the Boot Firmware Volume
+ //
+ for (EndOfFile = CurrentAddress + Fv->HeaderLength; ; ) {
+
+ CurrentAddress = (EndOfFile + 7) & ~(7ULL);
+ if (CurrentAddress > EndOfFirmwareVolume) {
+ return EFI_VOLUME_CORRUPTED;
+ }
+
+ File = (EFI_FFS_FILE_HEADER*)(UINTN) CurrentAddress;
+ Size = *(UINT32*) File->Size & 0xffffff;
+ if (Size < (sizeof (*File) + sizeof (EFI_COMMON_SECTION_HEADER))) {
+ return EFI_VOLUME_CORRUPTED;
+ }
+
+ EndOfFile = CurrentAddress + Size;
+ if (EndOfFile > EndOfFirmwareVolume) {
+ return EFI_VOLUME_CORRUPTED;
+ }
+
+ //
+ // Look for the request file type
+ //
+ if (File->Type != FileType) {
+ continue;
+ }
+
+ Status = FindFfsSectionInSections (
+ (VOID*) (File + 1),
+ (UINTN) EndOfFile - (UINTN) (File + 1),
+ SectionType,
+ FoundSection
+ );
+ if (!EFI_ERROR (Status) || (Status == EFI_VOLUME_CORRUPTED)) {
+ return Status;
+ }
+ }
+}
+
+/**
+ Locates the PEI Core entry point address
+
+ @param[in] Fv The firmware volume to search
+ @param[out] PeiCoreEntryPoint The entry point of the PEI Core image
+
+ @retval EFI_SUCCESS The file and section was found
+ @retval EFI_NOT_FOUND The file and section was not found
+ @retval EFI_VOLUME_CORRUPTED The firmware volume was corrupted
+
+**/
+EFI_STATUS
+FindPeiCoreImageBaseInFv (
And this.

+ IN EFI_FIRMWARE_VOLUME_HEADER *Fv,
+ OUT EFI_PHYSICAL_ADDRESS *PeiCoreImageBase
+ )
+{
+ EFI_STATUS Status;
+ EFI_COMMON_SECTION_HEADER *Section;
+
+ Status = FindFfsFileAndSection (
+ Fv,
+ EFI_FV_FILETYPE_PEI_CORE,
+ EFI_SECTION_PE32,
+ &Section
+ );
+ if (EFI_ERROR (Status)) {
+ Status = FindFfsFileAndSection (
+ Fv,
+ EFI_FV_FILETYPE_PEI_CORE,
+ EFI_SECTION_TE,
+ &Section
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Unable to find PEI Core image\n"));
+ return Status;
+ }
+ }
+ DEBUG ((DEBUG_ERROR, "PeiCoreImageBase found\n"));
+ *PeiCoreImageBase = (EFI_PHYSICAL_ADDRESS)(UINTN)(Section + 1);
+ return EFI_SUCCESS;
+}
+
+/**
+ Locates the PEI Core entry point address
+
+ @param[in,out] Fv The firmware volume to search
+ @param[out] PeiCoreEntryPoint The entry point of the PEI Core image
+
+ @retval EFI_SUCCESS The file and section was found
+ @retval EFI_NOT_FOUND The file and section was not found
+ @retval EFI_VOLUME_CORRUPTED The firmware volume was corrupted
+
+**/
+VOID
+FindPeiCoreImageBase (
+ IN OUT EFI_FIRMWARE_VOLUME_HEADER **BootFv,
+ OUT EFI_PHYSICAL_ADDRESS *PeiCoreImageBase
+ )
+{
+ *PeiCoreImageBase = 0;
+
+ DEBUG ((DEBUG_INFO, "FindPeiCoreImageBaseInFv\n"));
This one is the same with S3 support ripped out, and the above line added.
Can you delete the message, or change it to something more human
friendly? I personally would interpret that as something that was
printed _from_ that function (and in that situation should be using %a
__FUNCTION__).

+ FindPeiCoreImageBaseInFv (*BootFv, PeiCoreImageBase);
+}
+
+/*
+ Find and return Pei Core entry point.
+
+ It also find SEC and PEI Core file debug inforamtion. It will report them if
+ remote debug is enabled.
+
+**/
+VOID
+FindAndReportEntryPoints (
+ IN EFI_FIRMWARE_VOLUME_HEADER **BootFirmwareVolumePtr,
+ OUT EFI_PEI_CORE_ENTRY_POINT *PeiCoreEntryPoint
+ )
+{
+ EFI_STATUS Status;
+ EFI_PHYSICAL_ADDRESS PeiCoreImageBase;
+
+ DEBUG ((DEBUG_INFO, "FindAndReportEntryPoints\n"));
Use %a __FUNCTION__.

+
+ FindPeiCoreImageBase (BootFirmwareVolumePtr, &PeiCoreImageBase);
+ //
+ // Find PEI Core entry point
+ //
+ Status = PeCoffLoaderGetEntryPoint ((VOID *) (UINTN) PeiCoreImageBase, (VOID**) PeiCoreEntryPoint);
+ if (EFI_ERROR(Status)) {
+ *PeiCoreEntryPoint = 0;
+ }
+ DEBUG ((DEBUG_INFO, "PeCoffLoaderGetEntryPoint success: %x\n", *PeiCoreEntryPoint));
+
+ return;
+}
+/*
+ Print out the content of firmware context.
+
+**/
+VOID
+DebutPrintFirmwareContext (
Debut -> Debug?

+ EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *FirmwareContext
+ )
+{
+ DEBUG ((DEBUG_INFO, "[OpenSBI]: OpenSBI Firmware Context at 0x%x\n", FirmwareContext));
Please drop the [OpenSBI] prefix.

+ DEBUG ((DEBUG_INFO, " PEI Service at 0x%x\n\n", FirmwareContext->PeiServiceTable));
+}
+
+EFI_STATUS
+EFIAPI
+TemporaryRamMigration (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
+ IN UINTN CopySize
+ )
+{
+ VOID *OldHeap;
+ VOID *NewHeap;
+ VOID *OldStack;
+ VOID *NewStack;
+ struct sbi_platform *ThisSbiPlatform;
+
+ DEBUG ((DEBUG_INFO,
+ "TemporaryRamMigration(0x%Lx, 0x%Lx, 0x%Lx)\n",
%a
__FUNCTION__

+ TemporaryMemoryBase,
+ PermanentMemoryBase,
+ (UINT64)CopySize
+ ));
+
+ OldHeap = (VOID*)(UINTN)TemporaryMemoryBase;
+ NewHeap = (VOID*)((UINTN)PermanentMemoryBase + (CopySize >> 1));
+
+ OldStack = (VOID*)((UINTN)TemporaryMemoryBase + (CopySize >> 1));
+ NewStack = (VOID*)(UINTN)PermanentMemoryBase;
+
+ CopyMem (NewHeap, OldHeap, CopySize >> 1); // Migrate Heap
+ CopyMem (NewStack, OldStack, CopySize >> 1); // Migrate Stack
+
+ //
+ // Reset firmware context pointer
+ //
+ ThisSbiPlatform = (struct sbi_platform *)sbi_platform_ptr(sbi_scratch_thishart_ptr());
+ ThisSbiPlatform->firmware_context += (unsigned long)((UINTN)NewStack - (UINTN)OldStack);
"unsigned long" is not a type that exists in UEFI.
Please use UINTN. Applies throughout.

+ //
+ // Relocate PEI Service **
+ //
+ ((EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *)ThisSbiPlatform->firmware_context)->PeiServiceTable += (unsigned long)((UINTN)NewStack - (UINTN)OldStack);
The above line is begging for a temporary pointer for the firmware_context.

+ DEBUG ((DEBUG_INFO, "[OpenSBI]: OpenSBI Firmware Context is relocated to 0x%x\n", ThisSbiPlatform->firmware_context));
Please

+ DebutPrintFirmwareContext ((EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT *)ThisSbiPlatform->firmware_context);
+
+ register uintptr_t a0 asm ("a0") = (uintptr_t)((UINTN)NewStack - (UINTN)OldStack);
+ asm volatile ("add sp, sp, a0"::"r"(a0):);
Urgh.
Is there any way this could be broken out into a separate assembler
function instead? If not, we still need to get rid of the uintptr_t:s.

+ return EFI_SUCCESS;
+}
+
+EFI_STATUS EFIAPI TemporaryRamDone (VOID)
+{
+ DEBUG ((DEBUG_INFO, "2nd time PEI core, temporary ram done.\n"));
+ return EFI_SUCCESS;
+}
+
+#if 1
Just delete the #if 1?

+#define GPIO_CTRL_ADDR 0x54002000
+#define GPIO_OUTPUT_VAL 0x0C
+static volatile UINT32 * const gpio = (void *)GPIO_CTRL_ADDR;
+#define REG32(p, i) ((p)[(i)>>2])
+#endif
And the #endif

Moreover, please move the ADDRESS/VALUE macros to SecMain.h, and use
IoLib instead of defining your own variables and macros.

+
+static VOID EFIAPI PeiCore(VOID)
STATIC
Also, please follow coding style for function definition, this is
supposed to be over multiple lines.

+{
+ EFI_SEC_PEI_HAND_OFF SecCoreData;
+ EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint;
+ EFI_FIRMWARE_VOLUME_HEADER *BootFv = (EFI_FIRMWARE_VOLUME_HEADER *)FixedPcdGet32(PcdRiscVPeiFvBase);
+ EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT FirmwareContext;
+ struct sbi_platform *ThisSbiPlatform;
+ UINT32 HartId;
+
+ REG32(gpio, GPIO_OUTPUT_VAL) = 0x88;
+ FindAndReportEntryPoints (&BootFv, &PeiCoreEntryPoint);
+
+ SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
+ SecCoreData.BootFirmwareVolumeBase = BootFv;
+ SecCoreData.BootFirmwareVolumeSize = (UINTN) BootFv->FvLength;
+ SecCoreData.TemporaryRamBase = (VOID*)(UINT64) FixedPcdGet32(PcdTemporaryRamBase);
+ SecCoreData.TemporaryRamSize = (UINTN) FixedPcdGet32(PcdTemporaryRamSize);
+ SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
+ SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize >> 1;
+ SecCoreData.StackBase = (UINT8 *)SecCoreData.TemporaryRamBase + (SecCoreData.TemporaryRamSize >> 1);
Please don't use UINT8 * to get away from pointer arithmetic. It
disguises what function is actually being performed.
(VOID *)((UINTN) ...) is a much preferred form where that level of
description is required.

+ SecCoreData.StackSize = SecCoreData.TemporaryRamSize >> 1;
+
+ //
+ // Print out scratch address of each hart
+ //
+ DEBUG ((DEBUG_INFO, "[OpenSBI]: OpenSBI scratch address for each hart:\n"));
Please drop [OpenSBI] tag.

+ for (HartId = 0; HartId < FixedPcdGet32 (PcdHartCount); HartId ++) {
+ DEBUG ((DEBUG_INFO, " Hart %d: 0x%x\n", HartId, sbi_hart_id_to_scratch(sbi_scratch_thishart_ptr(), HartId)));
Please wrap long line.

+ }
+
+ //
+ // Set up OpepSBI firmware context poitner on boot hart OpenSbi scratch. Firmware context residents in stack and will be
Please wrap long line.

+ // switched to memory when temporary ram migration.
+ //
+ ZeroMem ((VOID *)&FirmwareContext, sizeof (EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT));
+ ThisSbiPlatform = (struct sbi_platform *)sbi_platform_ptr(sbi_scratch_thishart_ptr());
+ if (ThisSbiPlatform->opensbi_version > OPENSBI_VERSION) {
+ DEBUG ((DEBUG_ERROR, "[OpenSBI]: OpenSBI platform table version 0x%x is newer than OpenSBI version 0x%x.\n"
+ "There maybe be some backward compatable issues.\n",
Please drop [OpenSBI] tag. Please convert the two lines to two
separate DEBUG prints.

+ ThisSbiPlatform->opensbi_version,
+ OPENSBI_VERSION
+ ));
+ ASSERT(FALSE);
+ }
+ DEBUG ((DEBUG_INFO, "[OpenSBI]: OpenSBI platform table at address: 0x%x\nFirmware Context is located at 0x%x\n",
Please drop [OpenSBI] tag.

+ ThisSbiPlatform,
+ &FirmwareContext
+ ));
+ ThisSbiPlatform->firmware_context = (unsigned long)&FirmwareContext;
UINTN (probably best to do a global search and replace on this).

+ //
+ // Set firmware context Hart-specific pointer
+ //
+ for (HartId = 0; HartId < FixedPcdGet32 (PcdHartCount); HartId ++) {
+ FirmwareContext.HartSpecific [HartId] = \
+ (EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *)((UINT8 *)sbi_hart_id_to_scratch(sbi_scratch_thishart_ptr(), HartId) - FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE);
Please don't use (UINT8 *) to get away from pointer arithmetic.
UINTN should work fine in this context.

Screaming out for a temporary variable.

+ DEBUG ((DEBUG_INFO, "[OpenSBI]: OpenSBI Hart %d Firmware Context Hart-specific at address: 0x%x\n",
Please drop [OpenSBI] tag.

+ HartId,
+ FirmwareContext.HartSpecific [HartId]
+ ));
+ }
+
+ //
+ // Transfer the control to the PEI core
+ //
+ (*PeiCoreEntryPoint) (&SecCoreData, (EFI_PEI_PPI_DESCRIPTOR *)&mPrivateDispatchTable);
+}
+/**
+ This function initilizes hart specific information and SBI.
+ For the boot hart, it boots system through PEI core and initial SBI in the DXE IPL.
+ For others, it goes to initial SBI and halt.
+
+ the lay out of memory region for each hart is as below delineates,
+
+ _ ____
+ |----Scratch ends | |
+ | | sizeof (sbi_scratch) |
+ | _| |
+ |----Scratch buffer start s <----- *scratch |
+ |----Firmware Context Hart-specific ends _ |
+ | | |
+ | | FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE |
+ | | | PcdOpenSbiStackSize
+ | _| |
+ |----Firmware Context Hart-specific starts <----- **HartFirmwareContext |
+ |----Hart stack top _ |
+ | | |
+ | | |
+ | | Stack |
+ | | |
+ | _| ____|
+ |----Hart stack bottom
+
+**/
+VOID EFIAPI SecCoreStartUpWithStack(unsigned long hartid, struct sbi_scratch *scratch)
Split up over multiple lines.

+{
+ EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartFirmwareContext;
+
+ //
+ // Setup EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC for each hart.
+ //
+ HartFirmwareContext = (EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *)((UINT8 *)scratch - FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE);
Please don't use UINT8 * to get away from pointer arithmetic.
In this context, UINTN should work just fine.

+ HartFirmwareContext->IsaExtensionSupported = RiscVReadMisa ();
+ HartFirmwareContext->MachineVendorId.Value64_L = RiscVReadMVendorId ();
+ HartFirmwareContext->MachineVendorId.Value64_H = 0;
+ HartFirmwareContext->MachineArchId.Value64_L = RiscVReadMArchId ();
+ HartFirmwareContext->MachineArchId.Value64_H = 0;
+ HartFirmwareContext->MachineImplId.Value64_L = RiscVReadMImplId ();
+ HartFirmwareContext->MachineImplId.Value64_H = 0;
+
+#if 0
Please don't leave unused code in.
If you want to keep the printouts for extreme debugging sessions,
change the loglevel to DEBUG_VERBOSE.

+ while (HartsIn != hartid);
+ DEBUG ((DEBUG_INFO, "[OpenSBI]: Initial Firmware Context Hart-specific for HART ID:%d\n", hartid));
Please drop [OpenSBI] tag.

+ DEBUG ((DEBUG_INFO, " Scratch at address: 0x%x\n", scratch));
+ DEBUG ((DEBUG_INFO, " Firmware Context Hart-specific at address: 0x%x\n", HartFirmwareContext));
+ DEBUG ((DEBUG_INFO, " stack pointer at address: 0x%x\n", stack_point));
+ DEBUG ((DEBUG_INFO, " MISA: 0x%x\n", HartFirmwareContext->IsaExtensionSupported));
+ DEBUG ((DEBUG_INFO, " MVENDORID: 0x%x\n", HartFirmwareContext->MachineVendorId.Value64_L));
+ DEBUG ((DEBUG_INFO, " MARCHID: 0x%x\n", HartFirmwareContext->MachineArchId.Value64_L));
+ DEBUG ((DEBUG_INFO, " MIMPID: 0x%x\n\n", HartFirmwareContext->MachineImplId.Value64_L));
+ HartsIn ++;
+ for (;;);
+#endif
+
+ if (hartid == FixedPcdGet32(PcdBootHartId)) {
+ PeiCore();
+ }
+ sbi_init(scratch);
+}
diff --git a/Platform/RiscV/Universal/Sec/SecMain.h b/Platform/RiscV/Universal/Sec/SecMain.h
new file mode 100644
index 00000000..e7565f5e
--- /dev/null
+++ b/Platform/RiscV/Universal/Sec/SecMain.h
@@ -0,0 +1,57 @@
+/** @file
+ RISC-V SEC phase module definitions..
+
+ Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _SECMAIN_H_
+#define _SECMAIN_H_
Plese drop leading _.

+
+#include <PiPei.h>
+#include <Library/PeimEntryPoint.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/PcdLib.h>
+#include <Library/DebugAgentLib.h>
+#include <Library/IoLib.h>
+#include <Library/PeCoffLib.h>
+#include <Library/PeCoffGetEntryPointLib.h>
+#include <Library/PeCoffExtraActionLib.h>
+#include <Library/ExtractGuidedSectionLib.h>
+#include <Library/HobLib.h>
+#include <Ppi/TemporaryRamSupport.h>
+#include <Ppi/TemporaryRamDone.h>
+#include <Library/RiscVCpuLib.h>
Please drop all include statements not required by this file, and add
them instead in the files that do use them.

+
+VOID
+SecMachineModeTrapHandler (
+ IN VOID
+ );
+
+VOID
+EFIAPI
+SecStartupPhase2 (
+ IN VOID *Context
+ );
+
+EFI_STATUS
+EFIAPI
+TemporaryRamMigration (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
+ IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
+ IN UINTN CopySize
+ );
+
+EFI_STATUS
+EFIAPI
+TemporaryRamDone (
+ VOID
+ );
+
+#endif // _SECMAIN_H_
diff --git a/Platform/RiscV/Universal/Sec/SecMain.inf b/Platform/RiscV/Universal/Sec/SecMain.inf
new file mode 100644
index 00000000..c408fc8d
--- /dev/null
+++ b/Platform/RiscV/Universal/Sec/SecMain.inf
@@ -0,0 +1,75 @@
+## @file
+# RISC-V SEC module.
+#
+# Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
Can this be updated to a recent specification version.

+ BASE_NAME = SecMain
+ FILE_GUID = df1ccef6-f301-4a63-9661-fc6030dcc880
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+ ENTRY_POINT = SecMain
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = RISCV64 EBC
Pretty sure EBC is not valid here.

+#
+
+[Sources]
+ SecMain.c
+
+[Sources.RISCV64]
+ Riscv64/SecEntry.s
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ RiscVPkg/RiscVPkg.dec
+ Platform/RiscV/RiscVPlatformPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ BaseMemoryLib
+ PcdLib
+ DebugAgentLib
+ IoLib
+ PeCoffLib
+ PeCoffGetEntryPointLib
+ PeCoffExtraActionLib
+ ExtractGuidedSectionLib
+ RiscVCpuLib
+ PrintLib
+ SerialPortLib
+ RiscVOpensbiLib
+ OpenSbiPlatformLib # This is required library which
+ # provides platform level opensbi
+ # functions.
I don't doubt it, but I can tell it's required from the fact that it
is listed. And the name itself says all of the rest. The comment is
superfluous and can be deleted.

+
+[Ppis]
+ gEfiTemporaryRamSupportPpiGuid # PPI ALWAYS_PRODUCED
+ gEfiTemporaryRamDonePpiGuid # PPI ALWAYS_PRODUCED
+
+[Guids]
+ gUefiRiscVMachineContextGuid
+
+[FixedPcd]
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvBase
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdRiscVPeiFvSize
+
+[Pcd]
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwStartAddress
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdFwEndAddress
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdHartCount
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdBootHartId
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamBase
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdScratchRamSize
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdOpenSbiStackSize
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamBase
+ gUefiRiscVPlatformPkgTokenSpaceGuid.PcdTemporaryRamSize
Please sort the above alphabetically (
apart from where it makes sense not to - for example
PcdFwStartAddress
before
PcdFwEndAddress
makes more sense than the other way around).

/
Leif

--
2.12.0.windows.1