Date   

[Patch v5 13/48] UefiCpuPkg/MpInitLib: Initialize CPU_AP_DATA for CPU APs

Jeff Fan <jeff.fan@...>
 

Initialize CPU_AP_DATA for CPU APs and add GetApState()/SetApState() helper
functions to get/set AP state.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 76 ++++++++++++++++++++++++++++++++++++
UefiCpuPkg/Library/MpInitLib/MpLib.h | 12 ++++++
2 files changed, 88 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index f05db7c..70e5eb1 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -14,6 +14,37 @@

#include "MpLib.h"

+/**
+ Get the Application Processors state.
+
+ @param[in] CpuData The pointer to CPU_AP_DATA of specified AP
+
+ @return The AP status
+**/
+CPU_STATE
+GetApState (
+ IN CPU_AP_DATA *CpuData
+ )
+{
+ return CpuData->State;
+}
+
+/**
+ Set the Application Processors state.
+
+ @param[in] CpuData The pointer to CPU_AP_DATA of specified AP
+ @param[in] State The AP status
+**/
+VOID
+SetApState (
+ IN CPU_AP_DATA *CpuData,
+ IN CPU_STATE State
+ )
+{
+ AcquireSpinLock (&CpuData->ApLock);
+ CpuData->State = State;
+ ReleaseSpinLock (&CpuData->ApLock);
+}

/**
Detect whether Mwait-monitor feature is supported.
@@ -74,6 +105,40 @@ GetApLoopMode (

return ApLoopMode;
}
+/*
+ Initialize CPU AP Data when AP is wakeup at the first time.
+
+ @param[in, out] CpuMpData Pointer to PEI CPU MP Data
+ @param[in] ProcessorNumber The handle number of processor
+ @param[in] BistData Processor BIST data
+
+**/
+VOID
+InitializeApData (
+ IN OUT CPU_MP_DATA *CpuMpData,
+ IN UINTN ProcessorNumber,
+ IN UINT32 BistData
+ )
+{
+ CpuMpData->CpuData[ProcessorNumber].Waiting = FALSE;
+ CpuMpData->CpuData[ProcessorNumber].Health = BistData;
+ CpuMpData->CpuData[ProcessorNumber].CpuHealthy = (BistData == 0) ? TRUE : FALSE;
+ CpuMpData->CpuData[ProcessorNumber].ApicId = GetApicId ();
+ CpuMpData->CpuData[ProcessorNumber].InitialApicId = GetInitialApicId ();
+ if (CpuMpData->CpuData[ProcessorNumber].InitialApicId >= 0xFF) {
+ //
+ // Set x2APIC mode if there are any logical processor reporting
+ // an Initial APIC ID of 255 or greater.
+ //
+ AcquireSpinLock(&CpuMpData->MpLock);
+ CpuMpData->X2ApicEnable = TRUE;
+ ReleaseSpinLock(&CpuMpData->MpLock);
+ }
+
+ InitializeSpinLock(&CpuMpData->CpuData[ProcessorNumber].ApLock);
+ SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateIdle);
+}
+
/**
MP Initialize Library initialization.

@@ -103,6 +168,7 @@ MpInitLibInitialize (
CPU_MP_DATA *CpuMpData;
UINT8 ApLoopMode;
UINT8 *MonitorBuffer;
+ UINTN Index;
UINTN ApResetVectorSize;
UINTN BackupBufferAddr;
MaxLogicalProcessorNumber = PcdGet32(PcdCpuMaxLogicalProcessorNumber);
@@ -138,6 +204,10 @@ MpInitLibInitialize (
CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);
InitializeSpinLock(&CpuMpData->MpLock);
//
+ // Set BSP basic information
+ //
+ InitializeApData (CpuMpData, 0, 0);
+ //
// Save assembly code information
//
CopyMem (&CpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));
@@ -147,6 +217,12 @@ MpInitLibInitialize (
CpuMpData->ApLoopMode = ApLoopMode;
DEBUG ((DEBUG_INFO, "AP Loop Mode is %d\n", CpuMpData->ApLoopMode));
//
+ // Set up APs wakeup signal buffer
+ //
+ for (Index = 0; Index < MaxLogicalProcessorNumber; Index++) {
+ CpuMpData->CpuData[Index].StartupApSignal =
+ (UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);
+ }
// Store BSP's MTRR setting
//
MtrrGetAllMtrrs (&CpuMpData->MtrrTable);
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index e605f8d..84bd872 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -55,6 +55,17 @@ typedef enum {
} AP_INIT_STATE;

//
+// AP state
+//
+typedef enum {
+ CpuStateIdle,
+ CpuStateReady,
+ CpuStateBusy,
+ CpuStateFinished,
+ CpuStateDisabled
+} CPU_STATE;
+
+//
// AP related data
//
typedef struct {
@@ -66,6 +77,7 @@ typedef struct {
UINT32 ApicId;
UINT32 Health;
BOOLEAN CpuHealthy;
+ volatile CPU_STATE State;
BOOLEAN Waiting;
BOOLEAN *Finished;
UINT64 ExpectedTime;
--
2.7.4.windows.1


[Patch v5 12/48] UefiCpuPkg/MpInitLib: Allocate and initialize memory of MP Data buffer

Jeff Fan <jeff.fan@...>
 

v5:
1. Add comment block for enum AP_INIT_STATE and structure CPU_AP_DATA.
2. Add more comment for structure CPU_INFO_IN_HOB.
3. Add more clarification in structure _CPU_MP_DATA for those fields
pass from PEI to DXE.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 49 ++++++++++++++++++++
UefiCpuPkg/Library/MpInitLib/MpLib.h | 88 ++++++++++++++++++++++++++++++++++++
2 files changed, 137 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 32bbaee..f05db7c 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -93,15 +93,64 @@ MpInitLibInitialize (
VOID
)
{
+ UINT32 MaxLogicalProcessorNumber;
+ UINT32 ApStackSize;
MP_ASSEMBLY_ADDRESS_MAP AddressMap;
+ UINTN BufferSize;
UINT32 MonitorFilterSize;
+ VOID *MpBuffer;
+ UINTN Buffer;
+ CPU_MP_DATA *CpuMpData;
UINT8 ApLoopMode;
+ UINT8 *MonitorBuffer;
UINTN ApResetVectorSize;
+ UINTN BackupBufferAddr;
+ MaxLogicalProcessorNumber = PcdGet32(PcdCpuMaxLogicalProcessorNumber);

AsmGetAddressMap (&AddressMap);
ApResetVectorSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);
+ ApStackSize = PcdGet32(PcdCpuApStackSize);
ApLoopMode = GetApLoopMode (&MonitorFilterSize);

+ BufferSize = ApStackSize * MaxLogicalProcessorNumber;
+ BufferSize += MonitorFilterSize * MaxLogicalProcessorNumber;
+ BufferSize += sizeof (CPU_MP_DATA);
+ BufferSize += ApResetVectorSize;
+ BufferSize += (sizeof (CPU_AP_DATA) + sizeof (CPU_INFO_IN_HOB))* MaxLogicalProcessorNumber;
+ MpBuffer = AllocatePages (EFI_SIZE_TO_PAGES (BufferSize));
+ ASSERT (MpBuffer != NULL);
+ ZeroMem (MpBuffer, BufferSize);
+ Buffer = (UINTN) MpBuffer;
+
+ MonitorBuffer = (UINT8 *) (Buffer + ApStackSize * MaxLogicalProcessorNumber);
+ BackupBufferAddr = (UINTN) MonitorBuffer + MonitorFilterSize * MaxLogicalProcessorNumber;
+ CpuMpData = (CPU_MP_DATA *) (BackupBufferAddr + ApResetVectorSize);
+ CpuMpData->Buffer = Buffer;
+ CpuMpData->CpuApStackSize = ApStackSize;
+ CpuMpData->BackupBuffer = BackupBufferAddr;
+ CpuMpData->BackupBufferSize = ApResetVectorSize;
+ CpuMpData->EndOfPeiFlag = FALSE;
+ CpuMpData->WakeupBuffer = (UINTN) -1;
+ CpuMpData->CpuCount = 1;
+ CpuMpData->BspNumber = 0;
+ CpuMpData->WaitEvent = NULL;
+ CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1);
+ CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);
+ InitializeSpinLock(&CpuMpData->MpLock);
+ //
+ // Save assembly code information
+ //
+ CopyMem (&CpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));
+ //
+ // Finally set AP loop mode
+ //
+ CpuMpData->ApLoopMode = ApLoopMode;
+ DEBUG ((DEBUG_INFO, "AP Loop Mode is %d\n", CpuMpData->ApLoopMode));
+ //
+ // Store BSP's MTRR setting
+ //
+ MtrrGetAllMtrrs (&CpuMpData->MtrrTable);
+
return EFI_SUCCESS;
}

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 317facc..e605f8d 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -46,6 +46,47 @@ typedef enum {
} AP_LOOP_MODE;

//
+// AP initialization state during APs wakeup
+//
+typedef enum {
+ ApInitConfig = 1,
+ ApInitReconfig = 2,
+ ApInitDone = 3
+} AP_INIT_STATE;
+
+//
+// AP related data
+//
+typedef struct {
+ SPIN_LOCK ApLock;
+ volatile UINT32 *StartupApSignal;
+ volatile UINTN ApFunction;
+ volatile UINTN ApFunctionArgument;
+ UINT32 InitialApicId;
+ UINT32 ApicId;
+ UINT32 Health;
+ BOOLEAN CpuHealthy;
+ BOOLEAN Waiting;
+ BOOLEAN *Finished;
+ UINT64 ExpectedTime;
+ UINT64 CurrentTime;
+ UINT64 TotalTime;
+ EFI_EVENT WaitEvent;
+} CPU_AP_DATA;
+
+//
+// Basic CPU information saved in Guided HOB.
+// Because the contents will be shard between PEI and DXE,
+// we need to make sure the each fields offset same in different
+// architecture.
+//
+typedef struct {
+ UINT32 InitialApicId;
+ UINT32 ApicId;
+ UINT32 Health;
+} CPU_INFO_IN_HOB;
+
+//
// AP reset code information including code address and size,
// this structure will be shared be C code and assembly code.
// It is natural aligned by design.
@@ -58,6 +99,8 @@ typedef struct {
UINTN RelocateApLoopFuncSize;
} MP_ASSEMBLY_ADDRESS_MAP;

+typedef struct _CPU_MP_DATA CPU_MP_DATA;
+
#pragma pack(1)

//
@@ -79,9 +122,54 @@ typedef struct {
UINTN DataSegment;
UINTN EnableExecuteDisable;
UINTN Cr3;
+ CPU_MP_DATA *CpuMpData;
} MP_CPU_EXCHANGE_INFO;

#pragma pack()
+
+//
+// CPU MP Data save in memory
+//
+struct _CPU_MP_DATA {
+ UINT64 CpuInfoInHob;
+ UINT32 CpuCount;
+ UINT32 BspNumber;
+ //
+ // The above fields data will be passed from PEI to DXE
+ // Please make sure the fields offset same in the different
+ // architecture.
+ //
+ SPIN_LOCK MpLock;
+ UINTN Buffer;
+ UINTN CpuApStackSize;
+ MP_ASSEMBLY_ADDRESS_MAP AddressMap;
+ UINTN WakeupBuffer;
+ UINTN BackupBuffer;
+ UINTN BackupBufferSize;
+ BOOLEAN EndOfPeiFlag;
+
+ volatile UINT32 StartCount;
+ volatile UINT32 FinishedCount;
+ volatile UINT32 RunningCount;
+ BOOLEAN SingleThread;
+ EFI_AP_PROCEDURE Procedure;
+ VOID *ProcArguments;
+ BOOLEAN *Finished;
+ UINT64 ExpectedTime;
+ UINT64 CurrentTime;
+ UINT64 TotalTime;
+ EFI_EVENT WaitEvent;
+ UINTN **FailedCpuList;
+
+ AP_INIT_STATE InitFlag;
+ BOOLEAN X2ApicEnable;
+ MTRR_SETTINGS MtrrTable;
+ UINT8 ApLoopMode;
+ UINT8 ApTargetCState;
+ UINT16 PmCodeSegment;
+ CPU_AP_DATA *CpuData;
+ volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;
+};
/**
Assembly code to place AP into safe loop mode.

--
2.7.4.windows.1


[Patch v5 11/48] UefiCpuPkg/MpInitLib: Get ApLoopMode and MointorFilter size

Jeff Fan <jeff.fan@...>
 

Firstly, get ApLoopMode from PcdCpuApLoopMode. If MonitorMwait feature is not
supported, update ApLoopMode to ApHltLoop. If MonitorMwait feature is supported,
get MointorFilter size by CPUID.[EAX=05H]:EBX.BIT0-15.

v5:
1. Add comment block for enum AP_LOOP_MODE.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/Library/MpInitLib/MpLib.c | 63 ++++++++++++++++++++++++++++++++++++
UefiCpuPkg/Library/MpInitLib/MpLib.h | 10 ++++++
2 files changed, 73 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 3ac79b6..32bbaee 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -16,6 +16,65 @@


/**
+ Detect whether Mwait-monitor feature is supported.
+
+ @retval TRUE Mwait-monitor feature is supported.
+ @retval FALSE Mwait-monitor feature is not supported.
+**/
+BOOLEAN
+IsMwaitSupport (
+ VOID
+ )
+{
+ CPUID_VERSION_INFO_ECX VersionInfoEcx;
+
+ AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &VersionInfoEcx.Uint32, NULL);
+ return (VersionInfoEcx.Bits.MONITOR == 1) ? TRUE : FALSE;
+}
+
+/**
+ Get AP loop mode.
+
+ @param[out] MonitorFilterSize Returns the largest monitor-line size in bytes.
+
+ @return The AP loop mode.
+**/
+UINT8
+GetApLoopMode (
+ OUT UINT32 *MonitorFilterSize
+ )
+{
+ UINT8 ApLoopMode;
+ CPUID_MONITOR_MWAIT_EBX MonitorMwaitEbx;
+
+ ASSERT (MonitorFilterSize != NULL);
+
+ ApLoopMode = PcdGet8 (PcdCpuApLoopMode);
+ ASSERT (ApLoopMode >= ApInHltLoop && ApLoopMode <= ApInRunLoop);
+ if (ApLoopMode == ApInMwaitLoop) {
+ if (!IsMwaitSupport ()) {
+ //
+ // If processor does not support MONITOR/MWAIT feature,
+ // force AP in Hlt-loop mode
+ //
+ ApLoopMode = ApInHltLoop;
+ }
+ }
+
+ if (ApLoopMode != ApInMwaitLoop) {
+ *MonitorFilterSize = sizeof (UINT32);
+ } else {
+ //
+ // CPUID.[EAX=05H]:EBX.BIT0-15: Largest monitor-line size in bytes
+ // CPUID.[EAX=05H].EDX: C-states supported using MWAIT
+ //
+ AsmCpuid (CPUID_MONITOR_MWAIT, NULL, &MonitorMwaitEbx.Uint32, NULL, NULL);
+ *MonitorFilterSize = MonitorMwaitEbx.Bits.LargestMonitorLineSize;
+ }
+
+ return ApLoopMode;
+}
+/**
MP Initialize Library initialization.

This service will allocate AP reset vector and wakeup all APs to do APs
@@ -35,10 +94,14 @@ MpInitLibInitialize (
)
{
MP_ASSEMBLY_ADDRESS_MAP AddressMap;
+ UINT32 MonitorFilterSize;
+ UINT8 ApLoopMode;
UINTN ApResetVectorSize;

AsmGetAddressMap (&AddressMap);
ApResetVectorSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);
+ ApLoopMode = GetApLoopMode (&MonitorFilterSize);
+
return EFI_SUCCESS;
}

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 2be1351..317facc 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -36,6 +36,16 @@
#include <Library/HobLib.h>

//
+// AP loop state when APs are in idle state
+// It's value is the same with PcdCpuApLoopMode
+//
+typedef enum {
+ ApInHltLoop = 1,
+ ApInMwaitLoop = 2,
+ ApInRunLoop = 3
+} AP_LOOP_MODE;
+
+//
// AP reset code information including code address and size,
// this structure will be shared be C code and assembly code.
// It is natural aligned by design.
--
2.7.4.windows.1


[Patch v5 10/48] UefiCpuPkg/MpInitLib: Add MP_ASSEMBLY_ADDRESS_MAP

Jeff Fan <jeff.fan@...>
 

In MpInitLibInitialize(), invoke AsmGetAddress() to get get assembly functions'
entry addresses and the sizes from returned MP_ASSEMBLY_ADDRESS_MAP structure.

v5:
1. Add more detailed comments for structure MP_ASSEMBLY_ADDRESS_MAP.

v4:
1. Add AsmRelocateApLoop information return in AsmGetAddress().

v3:
1. Rename AsmRellocateApLoop to AsmRelocateApLoop.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 2 ++
UefiCpuPkg/Library/MpInitLib/MpLib.c | 7 ++++++-
UefiCpuPkg/Library/MpInitLib/MpLib.h | 25 +++++++++++++++++++++++++
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 3 +++
4 files changed, 36 insertions(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
index 49f5503..8f6f0bf 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -204,6 +204,8 @@ ASM_PFX(AsmGetAddressMap):
mov dword [ebx], RendezvousFunnelProcStart
mov dword [ebx + 4h], Flat32Start - RendezvousFunnelProcStart
mov dword [ebx + 8h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
+ mov dword [ebx + 0Ch], AsmRelocateApLoopStart
+ mov dword [ebx + 10h], AsmRelocateApLoopEnd - AsmRelocateApLoopStart

popad
ret
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 12bd04e..3ac79b6 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -34,7 +34,12 @@ MpInitLibInitialize (
VOID
)
{
- return EFI_UNSUPPORTED;
+ MP_ASSEMBLY_ADDRESS_MAP AddressMap;
+ UINTN ApResetVectorSize;
+
+ AsmGetAddressMap (&AddressMap);
+ ApResetVectorSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);
+ return EFI_SUCCESS;
}

/**
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 39ec5de..2be1351 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -35,6 +35,18 @@
#include <Library/MtrrLib.h>
#include <Library/HobLib.h>

+//
+// AP reset code information including code address and size,
+// this structure will be shared be C code and assembly code.
+// It is natural aligned by design.
+//
+typedef struct {
+ UINT8 *RendezvousFunnelAddress;
+ UINTN ModeEntryOffset;
+ UINTN RendezvousFunnelSize;
+ UINT8 *RelocateApLoopFuncAddress;
+ UINTN RelocateApLoopFuncSize;
+} MP_ASSEMBLY_ADDRESS_MAP;

#pragma pack(1)

@@ -81,5 +93,18 @@ VOID
IN UINTN ApTargetCState,
IN UINTN PmCodeSegment
);
+
+/**
+ Assembly code to get starting address and size of the rendezvous entry for APs.
+ Information for fixing a jump instruction in the code is also returned.
+
+ @param[out] AddressMap Output buffer for address map information.
+**/
+VOID
+EFIAPI
+AsmGetAddressMap (
+ OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap
+ );
+
#endif

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index d5d7efe..090e9fa 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -239,6 +239,9 @@ ASM_PFX(AsmGetAddressMap):
mov qword [rcx], rax
mov qword [rcx + 8h], LongModeStart - RendezvousFunnelProcStart
mov qword [rcx + 10h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
+ mov rax, ASM_PFX(AsmRelocateApLoop)
+ mov qword [rcx + 18h], rax
+ mov qword [rcx + 20h], AsmRelocateApLoopEnd - AsmRelocateApLoopStart
ret

;-------------------------------------------------------------------------------------
--
2.7.4.windows.1


[Patch v5 09/48] UefiCpuPkg/MpInitLib: Add AsmRelocateApLoop() assembly code

Jeff Fan <jeff.fan@...>
 

AsmRelocateApLoop() is used to place APs into MWAIT-loop if MonitorMwait
feature is supported before hand-off to OS, or place APs into HLT-loop if
MonitorMwait feature is not supported.

If the current mode is long mode, we will switch APs to protected mode
before placing APs in MWAIT-loop or HLT-loop. Thus, once APs wakeup from
loop, APs needn't the page table that may be crashed by OS.

v3:
1. Rename AsmRellocateApLoop to AsmRelocateApLoop.
2. Fix typo Proteced to Protected.
3. Fix typo segement to segment
4. Use word MONITOR instead of mwait-monitor.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
---
UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 24 ++++++++++++
UefiCpuPkg/Library/MpInitLib/MpLib.h | 21 ++++++++++
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 54 ++++++++++++++++++++++++++
3 files changed, 99 insertions(+)

diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
index 8bacb42..49f5503 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -169,6 +169,30 @@ CProcedureInvoke:
RendezvousFunnelProcEnd:

;-------------------------------------------------------------------------------------
+; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment);
+;-------------------------------------------------------------------------------------
+global ASM_PFX(AsmRelocateApLoop)
+ASM_PFX(AsmRelocateApLoop):
+AsmRelocateApLoopStart:
+ cmp byte [esp + 4], 1
+ jnz HltLoop
+MwaitLoop:
+ mov eax, esp
+ xor ecx, ecx
+ xor edx, edx
+ monitor
+ mov eax, [esp + 8] ; Mwait Cx, Target C-State per eax[7:4]
+ shl eax, 4
+ mwait
+ jmp MwaitLoop
+HltLoop:
+ cli
+ hlt
+ jmp HltLoop
+ ret
+AsmRelocateApLoopEnd:
+
+;-------------------------------------------------------------------------------------
; AsmGetAddressMap (&AddressMap);
;-------------------------------------------------------------------------------------
global ASM_PFX(AsmGetAddressMap)
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 28a3cd4..39ec5de 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -60,5 +60,26 @@ typedef struct {
} MP_CPU_EXCHANGE_INFO;

#pragma pack()
+/**
+ Assembly code to place AP into safe loop mode.
+
+ Place AP into targeted C-State if MONITOR is supported, otherwise
+ place AP into hlt state.
+ Place AP in protected mode if the current is long mode. Due to AP maybe
+ wakeup by some hardware event. It could avoid accessing page table that
+ may not available during booting to OS.
+
+ @param[in] MwaitSupport TRUE indicates MONITOR is supported.
+ FALSE indicates MONITOR is not supported.
+ @param[in] ApTargetCState Target C-State value.
+ @param[in] PmCodeSegment Protected mode code segment value.
+**/
+typedef
+VOID
+(EFIAPI * ASM_RELOCATE_AP_LOOP) (
+ IN BOOLEAN MwaitSupport,
+ IN UINTN ApTargetCState,
+ IN UINTN PmCodeSegment
+ );
#endif

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index 3c55ffa..d5d7efe 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -177,6 +177,60 @@ CProcedureInvoke:
RendezvousFunnelProcEnd:

;-------------------------------------------------------------------------------------
+; AsmRelocateApLoop (MwaitSupport, ApTargetCState, PmCodeSegment);
+;-------------------------------------------------------------------------------------
+global ASM_PFX(AsmRelocateApLoop)
+ASM_PFX(AsmRelocateApLoop):
+AsmRelocateApLoopStart:
+ push rcx
+ push rdx
+
+ lea rsi, [PmEntry] ; rsi <- The start address of transition code
+
+ push r8
+ push rsi
+ DB 0x48
+ retf
+BITS 32
+PmEntry:
+ mov eax, cr0
+ btr eax, 31 ; Clear CR0.PG
+ mov cr0, eax ; Disable paging and caches
+
+ mov ebx, edx ; Save EntryPoint to rbx, for rdmsr will overwrite rdx
+ mov ecx, 0xc0000080
+ rdmsr
+ and ah, ~ 1 ; Clear LME
+ wrmsr
+ mov eax, cr4
+ and al, ~ (1 << 5) ; Clear PAE
+ mov cr4, eax
+
+ pop edx
+ add esp, 4
+ pop ecx,
+ add esp, 4
+ cmp cl, 1 ; Check mwait-monitor support
+ jnz HltLoop
+ mov ebx, edx ; Save C-State to ebx
+MwaitLoop:
+ mov eax, esp ; Set Monitor Address
+ xor ecx, ecx ; ecx = 0
+ xor edx, edx ; edx = 0
+ monitor
+ shl ebx, 4
+ mov eax, ebx ; Mwait Cx, Target C-State per eax[7:4]
+ mwait
+ jmp MwaitLoop
+HltLoop:
+ cli
+ hlt
+ jmp HltLoop
+ ret
+BITS 64
+AsmRelocateApLoopEnd:
+
+;-------------------------------------------------------------------------------------
; AsmGetAddressMap (&AddressMap);
;-------------------------------------------------------------------------------------
global ASM_PFX(AsmGetAddressMap)
--
2.7.4.windows.1


[Patch v5 08/48] UefiCpuPkg/MpInitLib: Add EnableExecuteDisable in MP_CPU_EXCHANGE_INFO

Jeff Fan <jeff.fan@...>
 

EnableExecuteDisable in MP_CPU_EXCHANGE_INFO is used to tell AP reset vector if
enable execute disable feature on APs. This feature should be enabled before CR3
is written.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc | 2 ++
UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 30 ++++++++++++++++++++++++++
UefiCpuPkg/Library/MpInitLib/MpLib.h | 1 +
UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc | 4 +++-
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 13 +++++++++++
5 files changed, 49 insertions(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
index 015396a..60add86 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
@@ -36,4 +36,6 @@ ModeOffsetLocation equ LockLocation + 20h
NumApsExecutingLocation equ LockLocation + 24h
CodeSegmentLocation equ LockLocation + 28h
DataSegmentLocation equ LockLocation + 2Ch
+EnableExecuteDisableLocation equ LockLocation + 30h
+Cr3Location equ LockLocation + 3Ch

diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
index 7050413..8bacb42 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -85,6 +85,36 @@ Flat32Start: ; protected mode entry point
mov ss, dx

mov esi, ebx
+
+ mov edi, esi
+ add edi, EnableExecuteDisableLocation
+ cmp byte [edi], 0
+ jz SkipEnableExecuteDisable
+
+ ;
+ ; Enable IA32 PAE execute disable
+ ;
+
+ mov ecx, 0xc0000080
+ rdmsr
+ bts eax, 11
+ wrmsr
+
+ mov edi, esi
+ add edi, Cr3Location
+ mov eax, dword [edi]
+ mov cr3, eax
+
+ mov eax, cr4
+ bts eax, 5
+ mov cr4, eax
+
+ mov eax, cr0
+ bts eax, 31
+ mov cr0, eax
+
+SkipEnableExecuteDisable:
+
mov edi, esi
add edi, LockLocation
mov eax, NotVacantFlag
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 92d1dd9..28a3cd4 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -55,6 +55,7 @@ typedef struct {
UINTN NumApsExecuting;
UINTN CodeSegment;
UINTN DataSegment;
+ UINTN EnableExecuteDisable;
UINTN Cr3;
} MP_CPU_EXCHANGE_INFO;

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
index 5aac212..d533741 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
@@ -36,6 +36,8 @@ ModeOffsetLocation equ LockLocation + 3Ch
NumApsExecutingLocation equ LockLocation + 44h
CodeSegmentLocation equ LockLocation + 4Ch
DataSegmentLocation equ LockLocation + 54h
-Cr3Location equ LockLocation + 5Ch
+EnableExecuteDisableLocation equ LockLocation + 5Ch
+Cr3Location equ LockLocation + 64h
+

;-------------------------------------------------------------------------------
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index 848992c..3c55ffa 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -69,6 +69,19 @@ o32 lgdt [cs:si]
mov si, IdtrLocation
o32 lidt [cs:si]

+ mov si, EnableExecuteDisableLocation
+ cmp byte [si], 0
+ jz SkipEnableExecuteDisableBit
+
+ ;
+ ; Enable execute disable bit
+ ;
+ mov ecx, 0c0000080h ; EFER MSR number
+ rdmsr ; Read EFER
+ bts eax, 11 ; Enable Execute Disable Bit
+ wrmsr ; Write EFER
+
+SkipEnableExecuteDisableBit:

mov di, DataSegmentLocation
mov edi, [di] ; Save long mode DS in edi
--
2.7.4.windows.1


[Patch v5 07/48] UefiCpuPkg/MpInitLib: Fix typo and clean up the code

Jeff Fan <jeff.fan@...>
 

1. Rename NumApsExecutingLoction to NumApsExecutingLocation
2. Update some comments in NASM files.
3. Remove PeiCpuMpData from MP_CPU_EXCHANGE_INFO.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc | 2 +-
UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 10 +++++-----
UefiCpuPkg/Library/MpInitLib/MpLib.h | 1 -
UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc | 2 +-
UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 14 +++++++-------
5 files changed, 14 insertions(+), 15 deletions(-)

diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
index 773eab3..015396a 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
@@ -33,7 +33,7 @@ GdtrLocation equ LockLocation + 10h
IdtrLocation equ LockLocation + 16h
BufferStartLocation equ LockLocation + 1Ch
ModeOffsetLocation equ LockLocation + 20h
-NumApsExecutingLoction equ LockLocation + 24h
+NumApsExecutingLocation equ LockLocation + 24h
CodeSegmentLocation equ LockLocation + 28h
DataSegmentLocation equ LockLocation + 2Ch

diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
index 0852a5b..7050413 100644
--- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
@@ -71,8 +71,8 @@ o32 lidt [cs:si]
xor ax, ax
mov ds, ax

- mov eax, cr0 ;Get control register 0
- or eax, 000000003h ;Set PE bit (bit #0) & MP
+ mov eax, cr0 ; Get control register 0
+ or eax, 000000003h ; Set PE bit (bit #0) & MP
mov cr0, eax

jmp 0:strict dword 0 ; far jump to protected mode
@@ -95,7 +95,7 @@ TestLock:
jz TestLock

mov edi, esi
- add edi, NumApsExecutingLoction
+ add edi, NumApsExecutingLocation
inc dword [edi]
mov ebx, [edi]

@@ -133,9 +133,9 @@ CProcedureInvoke:
add edi, ApProcedureLocation
mov eax, [edi]

- call eax ; invoke C function
+ call eax ; Invoke C function

- jmp $ ; never reach here
+ jmp $ ; Never reach here
RendezvousFunnelProcEnd:

;-------------------------------------------------------------------------------------
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 0453c22..92d1dd9 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -56,7 +56,6 @@ typedef struct {
UINTN CodeSegment;
UINTN DataSegment;
UINTN Cr3;
- PEI_CPU_MP_DATA *PeiCpuMpData;
} MP_CPU_EXCHANGE_INFO;

#pragma pack()
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
index 00f57ce..5aac212 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
@@ -33,7 +33,7 @@ GdtrLocation equ LockLocation + 20h
IdtrLocation equ LockLocation + 2Ah
BufferStartLocation equ LockLocation + 34h
ModeOffsetLocation equ LockLocation + 3Ch
-NumApsExecutingLoction equ LockLocation + 44h
+NumApsExecutingLocation equ LockLocation + 44h
CodeSegmentLocation equ LockLocation + 4Ch
DataSegmentLocation equ LockLocation + 54h
Cr3Location equ LockLocation + 5Ch
diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index f19c75f..848992c 100644
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -57,7 +57,7 @@ BITS 16
mov di, CodeSegmentLocation
mov edx, [di]
mov di, ax
- sub di, 02h
+ sub di, 02h
mov [di],dx ; Patch long mode CS
sub di, 04h
add eax, ebx
@@ -117,7 +117,7 @@ TestLock:
jz TestLock

mov edi, esi
- add edi, NumApsExecutingLoction
+ add edi, NumApsExecutingLocation
inc dword [edi]
mov ebx, [edi]

@@ -138,8 +138,8 @@ Releaselock:
xchg qword [edi], rax

CProcedureInvoke:
- push rbp ; push BIST data at top of AP stack
- xor rbp, rbp ; clear ebp for call stack trace
+ push rbp ; Push BIST data at top of AP stack
+ xor rbp, rbp ; Clear ebp for call stack trace
push rbp
mov rbp, rsp

@@ -157,9 +157,9 @@ CProcedureInvoke:
mov rax, qword [edi]

sub rsp, 20h
- call rax ; invoke C function
+ call rax ; Invoke C function
add rsp, 20h
- jmp $
+ jmp $ ; Should never reach here

RendezvousFunnelProcEnd:

@@ -176,7 +176,7 @@ ASM_PFX(AsmGetAddressMap):

;-------------------------------------------------------------------------------------
;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
-;about to become an AP. It switches it'stack with the current AP.
+;about to become an AP. It switches its stack with the current AP.
;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
;-------------------------------------------------------------------------------------
global ASM_PFX(AsmExchangeRole)
--
2.7.4.windows.1


[Patch v5 06/48] UefiCpuPkg/MpInitLib: Add AP assembly code and MP_CPU_EXCHANGE_INFO

Jeff Fan <jeff.fan@...>
 

Add assembly code for AP reset vector and the definition of MP_CPU_EXCHANGE_INFO
that are used to exchange the data between C code and assembly code when AP wake
up.

v4:
1. Copy MP_CPU_EXCHANGE_INFO from UefiCpuPkg/CpuMpPei/CpuMpPei.h
2. Copy MpEqu.inc and MpFuncs.nasm from UefiCpuPkg/CpuMpPei.

v3:
1. Rename NumApsExecutingLoction to NumApsExecutingLocation
2. Add whitespace after ; in .nasm file

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
---
UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 8 ++++++++
.../{CpuMpPei => Library/MpInitLib}/Ia32/MpEqu.inc | 0
.../MpInitLib}/Ia32/MpFuncs.nasm | 0
UefiCpuPkg/Library/MpInitLib/MpLib.h | 24 ++++++++++++++++++++++
UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf | 8 ++++++++
.../{CpuMpPei => Library/MpInitLib}/X64/MpEqu.inc | 0
.../MpInitLib}/X64/MpFuncs.nasm | 0
7 files changed, 40 insertions(+)
copy UefiCpuPkg/{CpuMpPei => Library/MpInitLib}/Ia32/MpEqu.inc (100%)
copy UefiCpuPkg/{CpuMpPei => Library/MpInitLib}/Ia32/MpFuncs.nasm (100%)
copy UefiCpuPkg/{CpuMpPei => Library/MpInitLib}/X64/MpEqu.inc (100%)
copy UefiCpuPkg/{CpuMpPei => Library/MpInitLib}/X64/MpFuncs.nasm (100%)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
index 1f131c0..e9a2725 100644
--- a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -27,6 +27,14 @@ [Defines]
# VALID_ARCHITECTURES = IA32 X64
#

+[Sources.IA32]
+ Ia32/MpEqu.inc
+ Ia32/MpFuncs.nasm
+
+[Sources.X64]
+ X64/MpEqu.inc
+ X64/MpFuncs.nasm
+
[Sources.common]
DxeMpLib.c
MpLib.c
diff --git a/UefiCpuPkg/CpuMpPei/Ia32/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
similarity index 100%
copy from UefiCpuPkg/CpuMpPei/Ia32/MpEqu.inc
copy to UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc
diff --git a/UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
similarity index 100%
copy from UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.nasm
copy to UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 66425d3..0453c22 100644
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -36,5 +36,29 @@
#include <Library/HobLib.h>


+#pragma pack(1)
+
+//
+// MP CPU exchange information for AP reset code
+// This structure is required to be packed because fixed field offsets
+// into this structure are used in assembly code in this module
+//
+typedef struct {
+ UINTN Lock;
+ UINTN StackStart;
+ UINTN StackSize;
+ UINTN CFunction;
+ IA32_DESCRIPTOR GdtrProfile;
+ IA32_DESCRIPTOR IdtrProfile;
+ UINTN BufferStart;
+ UINTN ModeOffset;
+ UINTN NumApsExecuting;
+ UINTN CodeSegment;
+ UINTN DataSegment;
+ UINTN Cr3;
+ PEI_CPU_MP_DATA *PeiCpuMpData;
+} MP_CPU_EXCHANGE_INFO;
+
+#pragma pack()
#endif

diff --git a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index 014a248..c195a38 100644
--- a/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -27,6 +27,14 @@ [Defines]
# VALID_ARCHITECTURES = IA32 X64
#

+[Sources.IA32]
+ Ia32/MpEqu.inc
+ Ia32/MpFuncs.nasm
+
+[Sources.X64]
+ X64/MpEqu.inc
+ X64/MpFuncs.nasm
+
[Sources.common]
PeiMpLib.c
MpLib.c
diff --git a/UefiCpuPkg/CpuMpPei/X64/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
similarity index 100%
copy from UefiCpuPkg/CpuMpPei/X64/MpEqu.inc
copy to UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
diff --git a/UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
similarity index 100%
copy from UefiCpuPkg/CpuMpPei/X64/MpFuncs.nasm
copy to UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
--
2.7.4.windows.1


[Patch v5 05/48] UefiCpuPkg/MpInitLib: Add two instances PeiMpInitLib and DxeMpInitLib

Jeff Fan <jeff.fan@...>
 

Add two MP Initialize Library instances PeiMpInitLib.inf and DxeMpInitLib.inf
with NULL implementation.

One PeiMpInitLib.inf is consumed by PEI MP driver. Another DxeMpInitLib.inf is
consumed by DXE MP driver.

Place MpInitLibStartupAllAPs()/MpInitLibStartupThisAp()/MpInitLibSwitchBSP()/
MpInitLibEnableDisableAP() into PeiMpLib.c and DxeMpLib.c, because they have
the different implementations and will be updated in latter patches.

v5:
1. Add back PeiExceptionHandlerLib.inf in UefiCpuPkg.dsc. It is removed
incorrectly.

v4:
1. Return EFI_UNSUPPORTED instead of EFI_SUCCESS for NULL implementation of
all Functions.
2. Sync MpInitLibxxx functions header updating described in v4 part of Patch
#4.

v3:
1. Rename MpInitLibSwitchBsp to MpInitLibSwitchBSP to match PI spec

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
---
UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf | 61 ++++++++++
.../Library/MpInitLib/DxeMpInitLib.uni | 12 +-
.../MpInitLib.h => Library/MpInitLib/DxeMpLib.c} | 123 +++------------------
UefiCpuPkg/Library/MpInitLib/MpLib.c | 119 ++++++++++++++++++++
UefiCpuPkg/Library/MpInitLib/MpLib.h | 40 +++++++
.../MpInitLib/PeiMpInitLib.inf} | 65 +++--------
.../Library/MpInitLib/PeiMpInitLib.uni | 12 +-
.../MpInitLib.h => Library/MpInitLib/PeiMpLib.c} | 123 ++++-----------------
UefiCpuPkg/UefiCpuPkg.dsc | 2 +
9 files changed, 291 insertions(+), 266 deletions(-)
create mode 100644 UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
copy MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferExtraDxe.uni => UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.uni (60%)
copy UefiCpuPkg/{Include/Library/MpInitLib.h => Library/MpInitLib/DxeMpLib.c} (78%)
create mode 100644 UefiCpuPkg/Library/MpInitLib/MpLib.c
create mode 100644 UefiCpuPkg/Library/MpInitLib/MpLib.h
copy UefiCpuPkg/{CpuMpPei/CpuMpPei.inf => Library/MpInitLib/PeiMpInitLib.inf} (54%)
copy MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferExtraDxe.uni => UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.uni (60%)
copy UefiCpuPkg/{Include/Library/MpInitLib.h => Library/MpInitLib/PeiMpLib.c} (78%)

diff --git a/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
new file mode 100644
index 0000000..1f131c0
--- /dev/null
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
@@ -0,0 +1,61 @@
+## @file
+# MP Initialize Library instance for DXE driver.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DxeMpInitLib
+ MODULE_UNI_FILE = DxeMpInitLib.uni
+ FILE_GUID = B88F7146-9834-4c55-BFAC-481CC0C33736
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.1
+ LIBRARY_CLASS = MpInitLib|DXE_DRIVER
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+[Sources.common]
+ DxeMpLib.c
+ MpLib.c
+ MpLib.h
+
+[Packages]
+ MdePkg/MdePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+
+[LibraryClasses]
+ BaseLib
+ LocalApicLib
+ MemoryAllocationLib
+ HobLib
+ MtrrLib
+ CpuLib
+ UefiCpuLib
+ UefiBootServicesTableLib
+ HobLib
+
+[Guids]
+ gEfiEventExitBootServicesGuid ## CONSUMES ## Event
+
+[Pcd]
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApInitTimeOutInMicroSeconds ## SOMETIMES_CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode ## CONSUMES
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate ## SOMETIMES_CONSUMES
+
diff --git a/MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferExtraDxe.uni b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.uni
similarity index 60%
copy from MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferExtraDxe.uni
copy to UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.uni
index 14b3a69..99d7997 100644
--- a/MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferExtraDxe.uni
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.uni
@@ -1,5 +1,7 @@
// /** @file
-// SmmCommunicationBuffer Localized Strings and Content
+// MP Initialize Library instance for DXE driver.
+//
+// MP Initialize Library instance for DXE driver.
//
// Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
//
@@ -13,6 +15,8 @@
//
// **/

-#string STR_PROPERTIES_MODULE_NAME
-#language en-US
-"SMM Communication Buffer DXE Driver"
+
+#string STR_MODULE_ABSTRACT #language en-US "MP Initialize Library instance for DXE driver."
+
+#string STR_MODULE_DESCRIPTION #language en-US "MP Initialize Library instance for DXE driver."
+
diff --git a/UefiCpuPkg/Include/Library/MpInitLib.h b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
similarity index 78%
copy from UefiCpuPkg/Include/Library/MpInitLib.h
copy to UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
index 3e19382..46a48a4 100644
--- a/UefiCpuPkg/Include/Library/MpInitLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
@@ -1,5 +1,5 @@
/** @file
- Multiple-Processor initialization Library.
+ MP initialize support functions for DXE phase.

Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
@@ -12,82 +12,7 @@

**/

-#ifndef __MP_INIT_LIB_H__
-#define __MP_INIT_LIB_H__
-
-#include <Ppi/SecPlatformInformation.h>
-#include <Protocol/MpService.h>
-
-/**
- MP Initialize Library initialization.
-
- This service will allocate AP reset vector and wakeup all APs to do APs
- initialization.
-
- This service must be invoked before all other MP Initialize Library
- service are invoked.
-
- @retval EFI_SUCCESS MP initialization succeeds.
- @retval Others MP initialization fails.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibInitialize (
- VOID
- );
-
-/**
- Retrieves the number of logical processor in the platform and the number of
- those logical processors that are enabled on this boot. This service may only
- be called from the BSP.
-
- @param[out] NumberOfProcessors Pointer to the total number of logical
- processors in the system, including the BSP
- and disabled APs.
- @param[out] NumberOfEnabledProcessors Pointer to the number of enabled logical
- processors that exist in system, including
- the BSP.
-
- @retval EFI_SUCCESS The number of logical processors and enabled
- logical processors was retrieved.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER NumberOfProcessors is NULL and NumberOfEnabledProcessors
- is NULL.
- @retval EFI_NOT_READY MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibGetNumberOfProcessors (
- OUT UINTN *NumberOfProcessors, OPTIONAL
- OUT UINTN *NumberOfEnabledProcessors OPTIONAL
- );
-
-/**
- Gets detailed MP-related information on the requested processor at the
- instant this call is made. This service may only be called from the BSP.
-
- @param[in] ProcessorNumber The handle number of processor.
- @param[out] ProcessorInfoBuffer A pointer to the buffer where information for
- the requested processor is deposited.
- @param[out] HealthData Return processor health data.
-
- @retval EFI_SUCCESS Processor information was returned.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist in the platform.
- @retval EFI_NOT_READY MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibGetProcessorInfo (
- IN UINTN ProcessorNumber,
- OUT EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer,
- OUT EFI_HEALTH_FLAGS *HealthData OPTIONAL
- );
+#include "MpLib.h"

/**
This service executes a caller provided function on all enabled APs.
@@ -173,7 +98,10 @@ MpInitLibStartupAllAPs (
IN UINTN TimeoutInMicroseconds,
IN VOID *ProcedureArgument OPTIONAL,
OUT UINTN **FailedCpuList OPTIONAL
- );
+ )
+{
+ return EFI_UNSUPPORTED;
+}

/**
This service lets the caller get one enabled AP to execute a caller-provided
@@ -255,7 +183,10 @@ MpInitLibStartupThisAP (
IN UINTN TimeoutInMicroseconds,
IN VOID *ProcedureArgument OPTIONAL,
OUT BOOLEAN *Finished OPTIONAL
- );
+ )
+{
+ return EFI_UNSUPPORTED;
+}

/**
This service switches the requested AP to be the BSP from that point onward.
@@ -288,7 +219,10 @@ EFIAPI
MpInitLibSwitchBSP (
IN UINTN ProcessorNumber,
IN BOOLEAN EnableOldBSP
- );
+ )
+{
+ return EFI_UNSUPPORTED;
+}

/**
This service lets the caller enable or disable an AP from this point onward.
@@ -326,28 +260,7 @@ MpInitLibEnableDisableAP (
IN UINTN ProcessorNumber,
IN BOOLEAN EnableAP,
IN UINT32 *HealthFlag OPTIONAL
- );
-
-/**
- This return the handle number for the calling processor. This service may be
- called from the BSP and APs.
-
- @param[out] ProcessorNumber Pointer to the handle number of AP.
- The range is from 0 to the total number of
- logical processors minus 1. The total number of
- logical processors can be retrieved by
- MpInitLibGetNumberOfProcessors().
-
- @retval EFI_SUCCESS The current processor handle number was returned
- in ProcessorNumber.
- @retval EFI_INVALID_PARAMETER ProcessorNumber is NULL.
- @retval EFI_NOT_READY MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibWhoAmI (
- OUT UINTN *ProcessorNumber
- );
-
-#endif
+ )
+{
+ return EFI_UNSUPPORTED;
+}
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
new file mode 100644
index 0000000..12bd04e
--- /dev/null
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -0,0 +1,119 @@
+/** @file
+ CPU MP Initialize Library common functions.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "MpLib.h"
+
+
+/**
+ MP Initialize Library initialization.
+
+ This service will allocate AP reset vector and wakeup all APs to do APs
+ initialization.
+
+ This service must be invoked before all other MP Initialize Library
+ service are invoked.
+
+ @retval EFI_SUCCESS MP initialization succeeds.
+ @retval Others MP initialization fails.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibInitialize (
+ VOID
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+
+/**
+ Gets detailed MP-related information on the requested processor at the
+ instant this call is made. This service may only be called from the BSP.
+
+ @param[in] ProcessorNumber The handle number of processor.
+ @param[out] ProcessorInfoBuffer A pointer to the buffer where information for
+ the requested processor is deposited.
+ @param[out] HealthData Return processor health data.
+
+ @retval EFI_SUCCESS Processor information was returned.
+ @retval EFI_DEVICE_ERROR The calling processor is an AP.
+ @retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL.
+ @retval EFI_NOT_FOUND The processor with the handle specified by
+ ProcessorNumber does not exist in the platform.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibGetProcessorInfo (
+ IN UINTN ProcessorNumber,
+ OUT EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer,
+ OUT EFI_HEALTH_FLAGS *HealthData OPTIONAL
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+/**
+ This return the handle number for the calling processor. This service may be
+ called from the BSP and APs.
+
+ @param[out] ProcessorNumber Pointer to the handle number of AP.
+ The range is from 0 to the total number of
+ logical processors minus 1. The total number of
+ logical processors can be retrieved by
+ MpInitLibGetNumberOfProcessors().
+
+ @retval EFI_SUCCESS The current processor handle number was returned
+ in ProcessorNumber.
+ @retval EFI_INVALID_PARAMETER ProcessorNumber is NULL.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibWhoAmI (
+ OUT UINTN *ProcessorNumber
+ )
+{
+ return EFI_UNSUPPORTED;
+}
+/**
+ Retrieves the number of logical processor in the platform and the number of
+ those logical processors that are enabled on this boot. This service may only
+ be called from the BSP.
+
+ @param[out] NumberOfProcessors Pointer to the total number of logical
+ processors in the system, including the BSP
+ and disabled APs.
+ @param[out] NumberOfEnabledProcessors Pointer to the number of enabled logical
+ processors that exist in system, including
+ the BSP.
+
+ @retval EFI_SUCCESS The number of logical processors and enabled
+ logical processors was retrieved.
+ @retval EFI_DEVICE_ERROR The calling processor is an AP.
+ @retval EFI_INVALID_PARAMETER NumberOfProcessors is NULL and NumberOfEnabledProcessors
+ is NULL.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibGetNumberOfProcessors (
+ OUT UINTN *NumberOfProcessors, OPTIONAL
+ OUT UINTN *NumberOfEnabledProcessors OPTIONAL
+ )
+{
+ return EFI_UNSUPPORTED;
+}
diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
new file mode 100644
index 0000000..66425d3
--- /dev/null
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -0,0 +1,40 @@
+/** @file
+ Common header file for MP Initialize Library.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _MP_LIB_H_
+#define _MP_LIB_H_
+
+#include <PiPei.h>
+
+#include <Register/Cpuid.h>
+#include <Register/Msr.h>
+#include <Register/LocalApic.h>
+#include <Register/Microcode.h>
+
+#include <Library/MpInitLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/DebugLib.h>
+#include <Library/LocalApicLib.h>
+#include <Library/CpuLib.h>
+#include <Library/UefiCpuLib.h>
+#include <Library/TimerLib.h>
+#include <Library/SynchronizationLib.h>
+#include <Library/MtrrLib.h>
+#include <Library/HobLib.h>
+
+
+#endif
+
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.inf b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
similarity index 54%
copy from UefiCpuPkg/CpuMpPei/CpuMpPei.inf
copy to UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
index 5f45662..014a248 100644
--- a/UefiCpuPkg/CpuMpPei/CpuMpPei.inf
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
@@ -1,7 +1,7 @@
## @file
-# CPU driver installs CPU PI Multi-processor PPI.
+# MP Initialize Library instance for PEI driver.
#
-# Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -14,12 +14,12 @@

[Defines]
INF_VERSION = 0x00010005
- BASE_NAME = CpuMpPei
- MODULE_UNI_FILE = CpuMpPei.uni
- FILE_GUID = EDADEB9D-DDBA-48BD-9D22-C1C169C8C5C6
+ BASE_NAME = PeiMpInitLib
+ MODULE_UNI_FILE = PeiMpInitLib.uni
+ FILE_GUID = B00F6090-7739-4830-B906-E0032D388987
MODULE_TYPE = PEIM
- VERSION_STRING = 1.0
- ENTRY_POINT = CpuMpPeimInit
+ VERSION_STRING = 1.1
+ LIBRARY_CLASS = MpInitLib|PEIM

#
# The following information is for reference only and not required by the build tools.
@@ -27,55 +27,28 @@ [Defines]
# VALID_ARCHITECTURES = IA32 X64
#

-[Sources]
- CpuMpPei.h
- CpuMpPei.c
- CpuBist.c
- Microcode.h
- Microcode.c
- PeiMpServices.h
- PeiMpServices.c
-
-[Sources.IA32]
- Ia32/MpEqu.inc
- Ia32/MpFuncs.asm
- Ia32/MpFuncs.nasm
-
-[Sources.X64]
- X64/MpEqu.inc
- X64/MpFuncs.asm
- X64/MpFuncs.nasm
+[Sources.common]
+ PeiMpLib.c
+ MpLib.c
+ MpLib.h

[Packages]
MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
UefiCpuPkg/UefiCpuPkg.dec

[LibraryClasses]
BaseLib
- BaseMemoryLib
- DebugLib
- HobLib
LocalApicLib
- MtrrLib
- PcdLib
- PeimEntryPoint
+ MemoryAllocationLib
+ HobLib
PeiServicesLib
- ReportStatusCodeLib
- SynchronizationLib
- TimerLib
- UefiCpuLib
+ MtrrLib
CpuLib
- CpuExceptionHandlerLib
+ UefiCpuLib
+ SynchronizationLib

[Ppis]
- gEfiPeiMpServicesPpiGuid ## PRODUCES
gEfiEndOfPeiSignalPpiGuid ## NOTIFY
- gEfiSecPlatformInformationPpiGuid ## SOMETIMES_CONSUMES
- ## SOMETIMES_CONSUMES
- ## SOMETIMES_PRODUCES
- gEfiSecPlatformInformation2PpiGuid
- gEfiVectorHandoffInfoPpiGuid ## SOMETIMES_CONSUMES

[Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber ## CONSUMES
@@ -86,9 +59,3 @@ [Pcd]
gUefiCpuPkgTokenSpaceGuid.PcdCpuApLoopMode ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuApTargetCstate ## SOMETIMES_CONSUMES

-[Depex]
- gEfiPeiMemoryDiscoveredPpiGuid
-
-[UserExtensions.TianoCore."ExtraFiles"]
- CpuMpPeiExtra.uni
-
diff --git a/MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferExtraDxe.uni b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.uni
similarity index 60%
copy from MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferExtraDxe.uni
copy to UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.uni
index 14b3a69..d16f306 100644
--- a/MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferExtraDxe.uni
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.uni
@@ -1,5 +1,7 @@
// /** @file
-// SmmCommunicationBuffer Localized Strings and Content
+// MP Initialize Library instance for PEI driver.
+//
+// MP Initialize Library instance for PEI driver.
//
// Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
//
@@ -13,6 +15,8 @@
//
// **/

-#string STR_PROPERTIES_MODULE_NAME
-#language en-US
-"SMM Communication Buffer DXE Driver"
+
+#string STR_MODULE_ABSTRACT #language en-US "MP Initialize Library instance for PEI driver."
+
+#string STR_MODULE_DESCRIPTION #language en-US "MP Initialize Library instance for PEI driver."
+
diff --git a/UefiCpuPkg/Include/Library/MpInitLib.h b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
similarity index 78%
copy from UefiCpuPkg/Include/Library/MpInitLib.h
copy to UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
index 3e19382..a7e9fb8 100644
--- a/UefiCpuPkg/Include/Library/MpInitLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
@@ -1,5 +1,5 @@
/** @file
- Multiple-Processor initialization Library.
+ MP initialize support functions for PEI phase.

Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
@@ -12,82 +12,7 @@

**/

-#ifndef __MP_INIT_LIB_H__
-#define __MP_INIT_LIB_H__
-
-#include <Ppi/SecPlatformInformation.h>
-#include <Protocol/MpService.h>
-
-/**
- MP Initialize Library initialization.
-
- This service will allocate AP reset vector and wakeup all APs to do APs
- initialization.
-
- This service must be invoked before all other MP Initialize Library
- service are invoked.
-
- @retval EFI_SUCCESS MP initialization succeeds.
- @retval Others MP initialization fails.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibInitialize (
- VOID
- );
-
-/**
- Retrieves the number of logical processor in the platform and the number of
- those logical processors that are enabled on this boot. This service may only
- be called from the BSP.
-
- @param[out] NumberOfProcessors Pointer to the total number of logical
- processors in the system, including the BSP
- and disabled APs.
- @param[out] NumberOfEnabledProcessors Pointer to the number of enabled logical
- processors that exist in system, including
- the BSP.
-
- @retval EFI_SUCCESS The number of logical processors and enabled
- logical processors was retrieved.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER NumberOfProcessors is NULL and NumberOfEnabledProcessors
- is NULL.
- @retval EFI_NOT_READY MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibGetNumberOfProcessors (
- OUT UINTN *NumberOfProcessors, OPTIONAL
- OUT UINTN *NumberOfEnabledProcessors OPTIONAL
- );
-
-/**
- Gets detailed MP-related information on the requested processor at the
- instant this call is made. This service may only be called from the BSP.
-
- @param[in] ProcessorNumber The handle number of processor.
- @param[out] ProcessorInfoBuffer A pointer to the buffer where information for
- the requested processor is deposited.
- @param[out] HealthData Return processor health data.
-
- @retval EFI_SUCCESS Processor information was returned.
- @retval EFI_DEVICE_ERROR The calling processor is an AP.
- @retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL.
- @retval EFI_NOT_FOUND The processor with the handle specified by
- ProcessorNumber does not exist in the platform.
- @retval EFI_NOT_READY MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibGetProcessorInfo (
- IN UINTN ProcessorNumber,
- OUT EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer,
- OUT EFI_HEALTH_FLAGS *HealthData OPTIONAL
- );
+#include "MpLib.h"

/**
This service executes a caller provided function on all enabled APs.
@@ -173,7 +98,10 @@ MpInitLibStartupAllAPs (
IN UINTN TimeoutInMicroseconds,
IN VOID *ProcedureArgument OPTIONAL,
OUT UINTN **FailedCpuList OPTIONAL
- );
+ )
+{
+ return EFI_UNSUPPORTED;
+}

/**
This service lets the caller get one enabled AP to execute a caller-provided
@@ -255,7 +183,10 @@ MpInitLibStartupThisAP (
IN UINTN TimeoutInMicroseconds,
IN VOID *ProcedureArgument OPTIONAL,
OUT BOOLEAN *Finished OPTIONAL
- );
+ )
+{
+ return EFI_UNSUPPORTED;
+}

/**
This service switches the requested AP to be the BSP from that point onward.
@@ -287,8 +218,11 @@ EFI_STATUS
EFIAPI
MpInitLibSwitchBSP (
IN UINTN ProcessorNumber,
- IN BOOLEAN EnableOldBSP
- );
+ IN BOOLEAN EnableOldBSP
+ )
+{
+ return EFI_UNSUPPORTED;
+}

/**
This service lets the caller enable or disable an AP from this point onward.
@@ -326,28 +260,9 @@ MpInitLibEnableDisableAP (
IN UINTN ProcessorNumber,
IN BOOLEAN EnableAP,
IN UINT32 *HealthFlag OPTIONAL
- );
-
-/**
- This return the handle number for the calling processor. This service may be
- called from the BSP and APs.
+ )
+{
+ return EFI_UNSUPPORTED;
+}

- @param[out] ProcessorNumber Pointer to the handle number of AP.
- The range is from 0 to the total number of
- logical processors minus 1. The total number of
- logical processors can be retrieved by
- MpInitLibGetNumberOfProcessors().
-
- @retval EFI_SUCCESS The current processor handle number was returned
- in ProcessorNumber.
- @retval EFI_INVALID_PARAMETER ProcessorNumber is NULL.
- @retval EFI_NOT_READY MP Initialize Library is not initialized.
-
-**/
-EFI_STATUS
-EFIAPI
-MpInitLibWhoAmI (
- OUT UINTN *ProcessorNumber
- );

-#endif
diff --git a/UefiCpuPkg/UefiCpuPkg.dsc b/UefiCpuPkg/UefiCpuPkg.dsc
index b35f41b..5701a7a 100644
--- a/UefiCpuPkg/UefiCpuPkg.dsc
+++ b/UefiCpuPkg/UefiCpuPkg.dsc
@@ -115,6 +115,8 @@ [Components.IA32, Components.X64]
UefiCpuPkg/Library/CpuExceptionHandlerLib/SecPeiCpuExceptionHandlerLib.inf
UefiCpuPkg/Library/CpuExceptionHandlerLib/SmmCpuExceptionHandlerLib.inf
UefiCpuPkg/Library/CpuExceptionHandlerLib/PeiCpuExceptionHandlerLib.inf
+ UefiCpuPkg/Library/MpInitLib/PeiMpInitLib.inf
+ UefiCpuPkg/Library/MpInitLib/DxeMpInitLib.inf
UefiCpuPkg/Library/MtrrLib/MtrrLib.inf
UefiCpuPkg/Library/PlatformSecLibNull/PlatformSecLibNull.inf
UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
--
2.7.4.windows.1


[Patch v5 04/48] UefiCpuPkg/MpInitLib: Add MP Initialize library class definition

Jeff Fan <jeff.fan@...>
 

MP Initialize library provides basic functionalities to do APs initialization,
to manage MP information and to wakeup APs to execute AP task.

It could be consumed by CPU MP PEI or DXE drivers to provide CPU MP PPI/Protocol
services.

v4:
1. MpInitLibGetProcessorInfo():
Update HealthData type from UINT32 to EFI_HEALTH_FLAGS.
Add #include <Ppi/SecPlatformInformation.h>
2. MpInitLibSwitchBSP():
Return EFI_DEVICE_ERROR instead of EFI_SUCCESS if the calling processor is
an AP.
3. MpInitLibStartupThisAP():
Fix several incorrect references to "APs" to match PI spec.
4. MpInitLibSwitchBSP() and MpInitLibEnableDisableAP():
Fix incorrect description on ProcessorNumber.
5. Trim whitespace at end of line.

v3:
1. Add whitespace after MpInitLibInitialize
2. Rename MpInitLibSwitchBsp to MpInitLibSwitchBSP to match PI spec

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
---
UefiCpuPkg/Include/Library/MpInitLib.h | 353 +++++++++++++++++++++++++++++++++
UefiCpuPkg/UefiCpuPkg.dec | 4 +
2 files changed, 357 insertions(+)
create mode 100644 UefiCpuPkg/Include/Library/MpInitLib.h

diff --git a/UefiCpuPkg/Include/Library/MpInitLib.h b/UefiCpuPkg/Include/Library/MpInitLib.h
new file mode 100644
index 0000000..3e19382
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/MpInitLib.h
@@ -0,0 +1,353 @@
+/** @file
+ Multiple-Processor initialization Library.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __MP_INIT_LIB_H__
+#define __MP_INIT_LIB_H__
+
+#include <Ppi/SecPlatformInformation.h>
+#include <Protocol/MpService.h>
+
+/**
+ MP Initialize Library initialization.
+
+ This service will allocate AP reset vector and wakeup all APs to do APs
+ initialization.
+
+ This service must be invoked before all other MP Initialize Library
+ service are invoked.
+
+ @retval EFI_SUCCESS MP initialization succeeds.
+ @retval Others MP initialization fails.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibInitialize (
+ VOID
+ );
+
+/**
+ Retrieves the number of logical processor in the platform and the number of
+ those logical processors that are enabled on this boot. This service may only
+ be called from the BSP.
+
+ @param[out] NumberOfProcessors Pointer to the total number of logical
+ processors in the system, including the BSP
+ and disabled APs.
+ @param[out] NumberOfEnabledProcessors Pointer to the number of enabled logical
+ processors that exist in system, including
+ the BSP.
+
+ @retval EFI_SUCCESS The number of logical processors and enabled
+ logical processors was retrieved.
+ @retval EFI_DEVICE_ERROR The calling processor is an AP.
+ @retval EFI_INVALID_PARAMETER NumberOfProcessors is NULL and NumberOfEnabledProcessors
+ is NULL.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibGetNumberOfProcessors (
+ OUT UINTN *NumberOfProcessors, OPTIONAL
+ OUT UINTN *NumberOfEnabledProcessors OPTIONAL
+ );
+
+/**
+ Gets detailed MP-related information on the requested processor at the
+ instant this call is made. This service may only be called from the BSP.
+
+ @param[in] ProcessorNumber The handle number of processor.
+ @param[out] ProcessorInfoBuffer A pointer to the buffer where information for
+ the requested processor is deposited.
+ @param[out] HealthData Return processor health data.
+
+ @retval EFI_SUCCESS Processor information was returned.
+ @retval EFI_DEVICE_ERROR The calling processor is an AP.
+ @retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL.
+ @retval EFI_NOT_FOUND The processor with the handle specified by
+ ProcessorNumber does not exist in the platform.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibGetProcessorInfo (
+ IN UINTN ProcessorNumber,
+ OUT EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer,
+ OUT EFI_HEALTH_FLAGS *HealthData OPTIONAL
+ );
+
+/**
+ This service executes a caller provided function on all enabled APs.
+
+ @param[in] Procedure A pointer to the function to be run on
+ enabled APs of the system. See type
+ EFI_AP_PROCEDURE.
+ @param[in] SingleThread If TRUE, then all the enabled APs execute
+ the function specified by Procedure one by
+ one, in ascending order of processor handle
+ number. If FALSE, then all the enabled APs
+ execute the function specified by Procedure
+ simultaneously.
+ @param[in] WaitEvent The event created by the caller with CreateEvent()
+ service. If it is NULL, then execute in
+ blocking mode. BSP waits until all APs finish
+ or TimeoutInMicroSeconds expires. If it's
+ not NULL, then execute in non-blocking mode.
+ BSP requests the function specified by
+ Procedure to be started on all the enabled
+ APs, and go on executing immediately. If
+ all return from Procedure, or TimeoutInMicroSeconds
+ expires, this event is signaled. The BSP
+ can use the CheckEvent() or WaitForEvent()
+ services to check the state of event. Type
+ EFI_EVENT is defined in CreateEvent() in
+ the Unified Extensible Firmware Interface
+ Specification.
+ @param[in] TimeoutInMicrosecsond Indicates the time limit in microseconds for
+ APs to return from Procedure, either for
+ blocking or non-blocking mode. Zero means
+ infinity. If the timeout expires before
+ all APs return from Procedure, then Procedure
+ on the failed APs is terminated. All enabled
+ APs are available for next function assigned
+ by MpInitLibStartupAllAPs() or
+ MPInitLibStartupThisAP().
+ If the timeout expires in blocking mode,
+ BSP returns EFI_TIMEOUT. If the timeout
+ expires in non-blocking mode, WaitEvent
+ is signaled with SignalEvent().
+ @param[in] ProcedureArgument The parameter passed into Procedure for
+ all APs.
+ @param[out] FailedCpuList If NULL, this parameter is ignored. Otherwise,
+ if all APs finish successfully, then its
+ content is set to NULL. If not all APs
+ finish before timeout expires, then its
+ content is set to address of the buffer
+ holding handle numbers of the failed APs.
+ The buffer is allocated by MP Initialization
+ library, and it's the caller's responsibility to
+ free the buffer with FreePool() service.
+ In blocking mode, it is ready for consumption
+ when the call returns. In non-blocking mode,
+ it is ready when WaitEvent is signaled. The
+ list of failed CPU is terminated by
+ END_OF_CPU_LIST.
+
+ @retval EFI_SUCCESS In blocking mode, all APs have finished before
+ the timeout expired.
+ @retval EFI_SUCCESS In non-blocking mode, function has been dispatched
+ to all enabled APs.
+ @retval EFI_UNSUPPORTED A non-blocking mode request was made after the
+ UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
+ signaled.
+ @retval EFI_UNSUPPORTED WaitEvent is not NULL if non-blocking mode is not
+ supported.
+ @retval EFI_DEVICE_ERROR Caller processor is AP.
+ @retval EFI_NOT_STARTED No enabled APs exist in the system.
+ @retval EFI_NOT_READY Any enabled APs are busy.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+ @retval EFI_TIMEOUT In blocking mode, the timeout expired before
+ all enabled APs have finished.
+ @retval EFI_INVALID_PARAMETER Procedure is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibStartupAllAPs (
+ IN EFI_AP_PROCEDURE Procedure,
+ IN BOOLEAN SingleThread,
+ IN EFI_EVENT WaitEvent OPTIONAL,
+ IN UINTN TimeoutInMicroseconds,
+ IN VOID *ProcedureArgument OPTIONAL,
+ OUT UINTN **FailedCpuList OPTIONAL
+ );
+
+/**
+ This service lets the caller get one enabled AP to execute a caller-provided
+ function.
+
+ @param[in] Procedure A pointer to the function to be run on the
+ designated AP of the system. See type
+ EFI_AP_PROCEDURE.
+ @param[in] ProcessorNumber The handle number of the AP. The range is
+ from 0 to the total number of logical
+ processors minus 1. The total number of
+ logical processors can be retrieved by
+ MpInitLibGetNumberOfProcessors().
+ @param[in] WaitEvent The event created by the caller with CreateEvent()
+ service. If it is NULL, then execute in
+ blocking mode. BSP waits until this AP finish
+ or TimeoutInMicroSeconds expires. If it's
+ not NULL, then execute in non-blocking mode.
+ BSP requests the function specified by
+ Procedure to be started on this AP,
+ and go on executing immediately. If this AP
+ return from Procedure or TimeoutInMicroSeconds
+ expires, this event is signaled. The BSP
+ can use the CheckEvent() or WaitForEvent()
+ services to check the state of event. Type
+ EFI_EVENT is defined in CreateEvent() in
+ the Unified Extensible Firmware Interface
+ Specification.
+ @param[in] TimeoutInMicrosecsond Indicates the time limit in microseconds for
+ this AP to finish this Procedure, either for
+ blocking or non-blocking mode. Zero means
+ infinity. If the timeout expires before
+ this AP returns from Procedure, then Procedure
+ on the AP is terminated. The
+ AP is available for next function assigned
+ by MpInitLibStartupAllAPs() or
+ MpInitLibStartupThisAP().
+ If the timeout expires in blocking mode,
+ BSP returns EFI_TIMEOUT. If the timeout
+ expires in non-blocking mode, WaitEvent
+ is signaled with SignalEvent().
+ @param[in] ProcedureArgument The parameter passed into Procedure on the
+ specified AP.
+ @param[out] Finished If NULL, this parameter is ignored. In
+ blocking mode, this parameter is ignored.
+ In non-blocking mode, if AP returns from
+ Procedure before the timeout expires, its
+ content is set to TRUE. Otherwise, the
+ value is set to FALSE. The caller can
+ determine if the AP returned from Procedure
+ by evaluating this value.
+
+ @retval EFI_SUCCESS In blocking mode, specified AP finished before
+ the timeout expires.
+ @retval EFI_SUCCESS In non-blocking mode, the function has been
+ dispatched to specified AP.
+ @retval EFI_UNSUPPORTED A non-blocking mode request was made after the
+ UEFI event EFI_EVENT_GROUP_READY_TO_BOOT was
+ signaled.
+ @retval EFI_UNSUPPORTED WaitEvent is not NULL if non-blocking mode is not
+ supported.
+ @retval EFI_DEVICE_ERROR The calling processor is an AP.
+ @retval EFI_TIMEOUT In blocking mode, the timeout expired before
+ the specified AP has finished.
+ @retval EFI_NOT_READY The specified AP is busy.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+ @retval EFI_NOT_FOUND The processor with the handle specified by
+ ProcessorNumber does not exist.
+ @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP or disabled AP.
+ @retval EFI_INVALID_PARAMETER Procedure is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibStartupThisAP (
+ IN EFI_AP_PROCEDURE Procedure,
+ IN UINTN ProcessorNumber,
+ IN EFI_EVENT WaitEvent OPTIONAL,
+ IN UINTN TimeoutInMicroseconds,
+ IN VOID *ProcedureArgument OPTIONAL,
+ OUT BOOLEAN *Finished OPTIONAL
+ );
+
+/**
+ This service switches the requested AP to be the BSP from that point onward.
+ This service changes the BSP for all purposes. This call can only be performed
+ by the current BSP.
+
+ @param[in] ProcessorNumber The handle number of AP that is to become the new
+ BSP. The range is from 0 to the total number of
+ logical processors minus 1. The total number of
+ logical processors can be retrieved by
+ MpInitLibGetNumberOfProcessors().
+ @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an
+ enabled AP. Otherwise, it will be disabled.
+
+ @retval EFI_SUCCESS BSP successfully switched.
+ @retval EFI_UNSUPPORTED Switching the BSP cannot be completed prior to
+ this service returning.
+ @retval EFI_UNSUPPORTED Switching the BSP is not supported.
+ @retval EFI_DEVICE_ERROR The calling processor is an AP.
+ @retval EFI_NOT_FOUND The processor with the handle specified by
+ ProcessorNumber does not exist.
+ @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the current BSP or
+ a disabled AP.
+ @retval EFI_NOT_READY The specified AP is busy.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibSwitchBSP (
+ IN UINTN ProcessorNumber,
+ IN BOOLEAN EnableOldBSP
+ );
+
+/**
+ This service lets the caller enable or disable an AP from this point onward.
+ This service may only be called from the BSP.
+
+ @param[in] ProcessorNumber The handle number of AP.
+ The range is from 0 to the total number of
+ logical processors minus 1. The total number of
+ logical processors can be retrieved by
+ MpInitLibGetNumberOfProcessors().
+ @param[in] EnableAP Specifies the new state for the processor for
+ enabled, FALSE for disabled.
+ @param[in] HealthFlag If not NULL, a pointer to a value that specifies
+ the new health status of the AP. This flag
+ corresponds to StatusFlag defined in
+ EFI_MP_SERVICES_PROTOCOL.GetProcessorInfo(). Only
+ the PROCESSOR_HEALTH_STATUS_BIT is used. All other
+ bits are ignored. If it is NULL, this parameter
+ is ignored.
+
+ @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.
+ @retval EFI_UNSUPPORTED Enabling or disabling an AP cannot be completed
+ prior to this service returning.
+ @retval EFI_UNSUPPORTED Enabling or disabling an AP is not supported.
+ @retval EFI_DEVICE_ERROR The calling processor is an AP.
+ @retval EFI_NOT_FOUND Processor with the handle specified by ProcessorNumber
+ does not exist.
+ @retval EFI_INVALID_PARAMETER ProcessorNumber specifies the BSP.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibEnableDisableAP (
+ IN UINTN ProcessorNumber,
+ IN BOOLEAN EnableAP,
+ IN UINT32 *HealthFlag OPTIONAL
+ );
+
+/**
+ This return the handle number for the calling processor. This service may be
+ called from the BSP and APs.
+
+ @param[out] ProcessorNumber Pointer to the handle number of AP.
+ The range is from 0 to the total number of
+ logical processors minus 1. The total number of
+ logical processors can be retrieved by
+ MpInitLibGetNumberOfProcessors().
+
+ @retval EFI_SUCCESS The current processor handle number was returned
+ in ProcessorNumber.
+ @retval EFI_INVALID_PARAMETER ProcessorNumber is NULL.
+ @retval EFI_NOT_READY MP Initialize Library is not initialized.
+
+**/
+EFI_STATUS
+EFIAPI
+MpInitLibWhoAmI (
+ OUT UINTN *ProcessorNumber
+ );
+
+#endif
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index ef46318..8674533 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -50,6 +50,10 @@ [LibraryClasses.IA32, LibraryClasses.X64]
##
SmmCpuFeaturesLib|Include/Library/SmmCpuFeaturesLib.h

+ ## @libraryclass Provides functions to support MP services on CpuMpPei and CpuDxe module.
+ ##
+ MpInitLib|Include/Library/MpInitLib.h
+
[Guids]
gUefiCpuPkgTokenSpaceGuid = { 0xac05bf33, 0x995a, 0x4ed4, { 0xaa, 0xb8, 0xef, 0x7a, 0xe8, 0xf, 0x5c, 0xb0 }}

--
2.7.4.windows.1


[Patch v5 03/48] UefiCpuPkg/CpuS3DataDxe: Move StartupVector allocation to EndOfDxe()

Jeff Fan <jeff.fan@...>
 

Currently, we will allocate StartupVector buffer under 1MB at entry point
function. But some modules may allocate some hard code address under 1MB.
For example, LegacyBiosDxe driver tries to manage some legacy range under
640KB.

To avoid the conflicts, we move StartupVector buffer allocation to End Of
DXE event callback function.

v4:
Update the Context parameter is used as a pointer to AcpiCpuDataEx, then
we needn't to add the global variable.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
---
UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c | 42 +++++++++++++++++---------------
UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf | 2 +-
2 files changed, 24 insertions(+), 20 deletions(-)

diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
index 9fb47dc..7bd928f 100644
--- a/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
+++ b/UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c
@@ -9,7 +9,7 @@ number of CPUs reported by the MP Services Protocol, so this module does not
support hot plug CPUs. This module can be copied into a CPU specific package
and customized if these additional features are required.

-Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
+Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015, Red Hat, Inc.

This program and the accompanying materials
@@ -84,20 +84,36 @@ AllocateAcpiNvsMemoryBelow4G (
/**
Callback function executed when the EndOfDxe event group is signaled.

- We delay saving the MTRR settings until BDS signals EndOfDxe.
+ We delay allocating StartupVector and saving the MTRR settings until BDS signals EndOfDxe.

@param[in] Event Event whose notification function is being invoked.
@param[out] Context Pointer to the MTRR_SETTINGS buffer to fill in.
**/
VOID
EFIAPI
-SaveMtrrsOnEndOfDxe (
+CpuS3DataOnEndOfDxe (
IN EFI_EVENT Event,
OUT VOID *Context
)
{
+ EFI_STATUS Status;
+ ACPI_CPU_DATA_EX *AcpiCpuDataEx;
+
+ AcpiCpuDataEx = (ACPI_CPU_DATA_EX *) Context;
+ //
+ // Allocate a 4KB reserved page below 1MB
+ //
+ AcpiCpuDataEx->AcpiCpuData.StartupVector = BASE_1MB - 1;
+ Status = gBS->AllocatePages (
+ AllocateMaxAddress,
+ EfiReservedMemoryType,
+ 1,
+ &AcpiCpuDataEx->AcpiCpuData.StartupVector
+ );
+ ASSERT_EFI_ERROR (Status);
+
DEBUG ((EFI_D_VERBOSE, "%a\n", __FUNCTION__));
- MtrrGetAllMtrrs (Context);
+ MtrrGetAllMtrrs (&AcpiCpuDataEx->MtrrTable);

//
// Close event, so it will not be invoked again.
@@ -162,18 +178,6 @@ CpuS3DataInitialize (
ASSERT_EFI_ERROR (Status);

//
- // Allocate a 4KB reserved page below 1MB
- //
- AcpiCpuData->StartupVector = BASE_1MB - 1;
- Status = gBS->AllocatePages (
- AllocateMaxAddress,
- EfiReservedMemoryType,
- 1,
- &AcpiCpuData->StartupVector
- );
- ASSERT_EFI_ERROR (Status);
-
- //
// Get the number of CPUs
//
Status = MpServices->GetNumberOfProcessors (
@@ -255,13 +259,13 @@ CpuS3DataInitialize (

//
// Register EFI_END_OF_DXE_EVENT_GROUP_GUID event.
- // The notification function saves MTRRs for ACPI_CPU_DATA
+ // The notification function allocates StartupVector and saves MTRRs for ACPI_CPU_DATA
//
Status = gBS->CreateEventEx (
EVT_NOTIFY_SIGNAL,
TPL_CALLBACK,
- SaveMtrrsOnEndOfDxe,
- &AcpiCpuDataEx->MtrrTable,
+ CpuS3DataOnEndOfDxe,
+ AcpiCpuData,
&gEfiEndOfDxeEventGroupGuid,
&Event
);
diff --git a/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf b/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
index 857e12b..608e19f 100644
--- a/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
+++ b/UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf
@@ -9,7 +9,7 @@
# support hot plug CPUs. This module can be copied into a CPU specific package
# and customized if these additional features are required.
#
-# Copyright (c) 2013-2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2013-2016, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2015, Red Hat, Inc.
#
# This program and the accompanying materials
--
2.7.4.windows.1


[Patch v5 02/48] UefiCpuPkg/MpInitLib: Add microcode definitions defined in IA32 SDM

Jeff Fan <jeff.fan@...>
 

Add microcode definitions defined in Intel(R) 64 and IA-32 Architectures
Software Developer's Manual Volume 3A, Section 9.11.

v4:
1. ProcessorSignature type changed to CPU_MICROCODE_PROCESSOR_SIGNATURE
2. Add pack(1) for structure CPU_MICROCODE_HEADER and
CPU_MICROCODE_EXTENDED_TABLE.
v3:
1. Update SDM date to June, 2016
2. Mention BCD format in CPU_MICROCODE_DATE
3. Rename ProcessorChecksum to Checksum to match SDM.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
UefiCpuPkg/Include/Register/Microcode.h | 200 ++++++++++++++++++++++++++++++++
1 file changed, 200 insertions(+)
create mode 100644 UefiCpuPkg/Include/Register/Microcode.h

diff --git a/UefiCpuPkg/Include/Register/Microcode.h b/UefiCpuPkg/Include/Register/Microcode.h
new file mode 100644
index 0000000..94529a1
--- /dev/null
+++ b/UefiCpuPkg/Include/Register/Microcode.h
@@ -0,0 +1,200 @@
+/** @file
+ Microcode Definitions.
+
+ Microcode Definitions based on contents of the
+ Intel(R) 64 and IA-32 Architectures Software Developer's Manual
+ Volume 3A, Section 9.11 Microcode Definitions
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Specification Reference:
+ Intel(R) 64 and IA-32 Architectures Software Developer's Manual, Volume 3A,
+ June 2016, Chapter 9 Processor Management and Initialization, Section 9-11.
+
+**/
+
+#ifndef __MICROCODE_H__
+#define __MICROCODE_H__
+
+///
+/// CPU Microcode Date in BCD format
+///
+typedef union {
+ struct {
+ UINT32 Year:16;
+ UINT32 Day:8;
+ UINT32 Month:8;
+ } Bits;
+ UINT32 Uint32;
+} CPU_MICROCODE_DATE;
+
+///
+/// CPU Microcode Processor Signature format
+///
+typedef union {
+ struct {
+ UINT32 Stepping:4;
+ UINT32 Model:4;
+ UINT32 Family:4;
+ UINT32 Type:2;
+ UINT32 Reserved1:2;
+ UINT32 ExtendedModel:4;
+ UINT32 ExtendedFamily:8;
+ UINT32 Reserved2:4;
+ } Bits;
+ UINT32 Uint32;
+} CPU_MICROCODE_PROCESSOR_SIGNATURE;
+
+#pragma pack (1)
+
+///
+/// Microcode Update Format definition
+///
+typedef struct {
+ ///
+ /// Version number of the update header
+ ///
+ UINT32 HeaderVersion;
+ ///
+ /// Unique version number for the update, the basis for the update
+ /// signature provided by the processor to indicate the current update
+ /// functioning within the processor. Used by the BIOS to authenticate
+ /// the update and verify that the processor loads successfully. The
+ /// value in this field cannot be used for processor stepping identification
+ /// alone. This is a signed 32-bit number.
+ ///
+ UINT32 UpdateRevision;
+ ///
+ /// Date of the update creation in binary format: mmddyyyy (e.g.
+ /// 07/18/98 is 07181998H).
+ ///
+ CPU_MICROCODE_DATE Date;
+ ///
+ /// Extended family, extended model, type, family, model, and stepping
+ /// of processor that requires this particular update revision (e.g.,
+ /// 00000650H). Each microcode update is designed specifically for a
+ /// given extended family, extended model, type, family, model, and
+ /// stepping of the processor.
+ /// The BIOS uses the processor signature field in conjunction with the
+ /// CPUID instruction to determine whether or not an update is
+ /// appropriate to load on a processor. The information encoded within
+ /// this field exactly corresponds to the bit representations returned by
+ /// the CPUID instruction.
+ ///
+ CPU_MICROCODE_PROCESSOR_SIGNATURE ProcessorSignature;
+ ///
+ /// Checksum of Update Data and Header. Used to verify the integrity of
+ /// the update header and data. Checksum is correct when the
+ /// summation of all the DWORDs (including the extended Processor
+ /// Signature Table) that comprise the microcode update result in
+ /// 00000000H.
+ ///
+ UINT32 Checksum;
+ ///
+ /// Version number of the loader program needed to correctly load this
+ /// update. The initial version is 00000001H
+ ///
+ UINT32 LoaderRevision;
+ ///
+ /// Platform type information is encoded in the lower 8 bits of this 4-
+ /// byte field. Each bit represents a particular platform type for a given
+ /// CPUID. The BIOS uses the processor flags field in conjunction with
+ /// the platform Id bits in MSR (17H) to determine whether or not an
+ /// update is appropriate to load on a processor. Multiple bits may be set
+ /// representing support for multiple platform IDs.
+ ///
+ UINT32 ProcessorFlags;
+ ///
+ /// Specifies the size of the encrypted data in bytes, and must be a
+ /// multiple of DWORDs. If this value is 00000000H, then the microcode
+ /// update encrypted data is 2000 bytes (or 500 DWORDs).
+ ///
+ UINT32 DataSize;
+ ///
+ /// Specifies the total size of the microcode update in bytes. It is the
+ /// summation of the header size, the encrypted data size and the size of
+ /// the optional extended signature table. This value is always a multiple
+ /// of 1024.
+ ///
+ UINT32 TotalSize;
+ ///
+ /// Reserved fields for future expansion.
+ ///
+ UINT8 Reserved[12];
+} CPU_MICROCODE_HEADER;
+
+///
+/// Extended Signature Table Header Field Definitions
+///
+typedef struct {
+ ///
+ /// Specifies the number of extended signature structures (Processor
+ /// Signature[n], processor flags[n] and checksum[n]) that exist in this
+ /// microcode update
+ ///
+ UINT32 ExtendedSignatureCount;
+ ///
+ /// Checksum of update extended processor signature table. Used to
+ /// verify the integrity of the extended processor signature table.
+ /// Checksum is correct when the summation of the DWORDs that
+ /// comprise the extended processor signature table results in
+ /// 00000000H.
+ ///
+ UINT32 ExtendedChecksum;
+ ///
+ /// Reserved fields.
+ ///
+ UINT8 Reserved[12];
+} CPU_MICROCODE_EXTENDED_TABLE_HEADER;
+
+///
+/// Extended Signature Table Field Definitions
+///
+typedef struct {
+ ///
+ /// Extended family, extended model, type, family, model, and stepping
+ /// of processor that requires this particular update revision (e.g.,
+ /// 00000650H). Each microcode update is designed specifically for a
+ /// given extended family, extended model, type, family, model, and
+ /// stepping of the processor.
+ /// The BIOS uses the processor signature field in conjunction with the
+ /// CPUID instruction to determine whether or not an update is
+ /// appropriate to load on a processor. The information encoded within
+ /// this field exactly corresponds to the bit representations returned by
+ /// the CPUID instruction.
+ ///
+ CPU_MICROCODE_PROCESSOR_SIGNATURE ProcessorSignature;
+ ///
+ /// Platform type information is encoded in the lower 8 bits of this 4-
+ /// byte field. Each bit represents a particular platform type for a given
+ /// CPUID. The BIOS uses the processor flags field in conjunction with
+ /// the platform Id bits in MSR (17H) to determine whether or not an
+ /// update is appropriate to load on a processor. Multiple bits may be set
+ /// representing support for multiple platform IDs.
+ ///
+ UINT32 ProcessorFlag;
+ ///
+ /// Used by utility software to decompose a microcode update into
+ /// multiple microcode updates where each of the new updates is
+ /// constructed without the optional Extended Processor Signature
+ /// Table.
+ /// To calculate the Checksum, substitute the Primary Processor
+ /// Signature entry and the Processor Flags entry with the
+ /// corresponding Extended Patch entry. Delete the Extended Processor
+ /// Signature Table entries. The Checksum is correct when the
+ /// summation of all DWORDs that comprise the created Extended
+ /// Processor Patch results in 00000000H.
+ ///
+ UINT32 Checksum;
+} CPU_MICROCODE_EXTENDED_TABLE;
+
+#pragma pack ()
+
+#endif
--
2.7.4.windows.1


[Patch v5 01/48] UefiCpuPkg/LocalApic.h: Remove duplicated/conflicted definitions

Jeff Fan <jeff.fan@...>
 

#define MSR_IA32_APIC_BASE_ADDRESS is duplicated with #define MSR_IA32_APIC_BASE
defined in UefiCpuPkg/Include/Register/ArchitecturalMsr.h, so we could remove it
and update the modules to use MSR_IA32_APIC_BASE from ArchitecturalMsr.h.

Structure MSR_IA32_APIC_BASE conflicts with #define MSR_IA32_APIC_BASE defined
in UefiCpuPkg/Include/Register/ArchitecturalMsr.h, so we could remove it and
update the modules to use structure MSR_IA32_APIC_BASE_REGISTER from
ArchitecturalMsr.h.

v5:
1. Update SourceLevelDebugPkg to use APIC Base MSR from ArchitecturalMsr.h.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Cc: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
---
.../DebugAgent/DebugAgentCommon/DebugAgent.h | 1 +
.../Library/DebugAgent/DebugAgentCommon/DebugMp.c | 5 ++-
UefiCpuPkg/CpuMpPei/CpuMpPei.h | 1 +
UefiCpuPkg/CpuMpPei/PeiMpServices.c | 20 ++++-----
UefiCpuPkg/Include/Register/LocalApic.h | 20 +--------
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 29 ++++++------
.../BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 51 +++++++++++-----------
7 files changed, 58 insertions(+), 69 deletions(-)

diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.h b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.h
index 64e4c3e..18b93a3 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.h
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugAgent.h
@@ -34,6 +34,7 @@
#include <Library/PrintLib.h>
#include <Library/PeCoffGetEntryPointLib.h>
#include <Library/PeCoffExtraActionLib.h>
+#include <Register/ArchitecturalMsr.h>

#include <TransferProtocol.h>
#include <ImageDebugSupport.h>
diff --git a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugMp.c b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugMp.c
index bdb6742..db9eb6a 100644
--- a/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugMp.c
+++ b/SourceLevelDebugPkg/Library/DebugAgent/DebugAgentCommon/DebugMp.c
@@ -141,6 +141,8 @@ IsBsp (
IN UINT32 ProcessorIndex
)
{
+ MSR_IA32_APIC_BASE_REGISTER MsrApicBase;
+
//
// If there are less than 2 CPUs detected, then the currently executing CPU
// must be the BSP. This avoids an access to an MSR that may not be supported
@@ -150,7 +152,8 @@ IsBsp (
return TRUE;
}

- if (AsmMsrBitFieldRead64 (MSR_IA32_APIC_BASE_ADDRESS, 8, 8) == 1) {
+ MsrApicBase.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
+ if (MsrApicBase.Bits.BSP == 1) {
if (mDebugMpContext.BspIndex != ProcessorIndex) {
AcquireMpSpinLock (&mDebugMpContext.MpContextSpinLock);
mDebugMpContext.BspIndex = ProcessorIndex;
diff --git a/UefiCpuPkg/CpuMpPei/CpuMpPei.h b/UefiCpuPkg/CpuMpPei/CpuMpPei.h
index b2e578b..0d1a14a 100644
--- a/UefiCpuPkg/CpuMpPei/CpuMpPei.h
+++ b/UefiCpuPkg/CpuMpPei/CpuMpPei.h
@@ -25,6 +25,7 @@

#include <Register/Cpuid.h>
#include <Register/LocalApic.h>
+#include <Register/Msr.h>

#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
diff --git a/UefiCpuPkg/CpuMpPei/PeiMpServices.c b/UefiCpuPkg/CpuMpPei/PeiMpServices.c
index e784377..e06fdf1 100644
--- a/UefiCpuPkg/CpuMpPei/PeiMpServices.c
+++ b/UefiCpuPkg/CpuMpPei/PeiMpServices.c
@@ -1,7 +1,7 @@
/** @file
Implementation of Multiple Processor PPI services.

- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -729,9 +729,9 @@ PeiSwitchBSP (
IN BOOLEAN EnableOldBSP
)
{
- PEI_CPU_MP_DATA *PeiCpuMpData;
- UINTN CallerNumber;
- MSR_IA32_APIC_BASE ApicBaseMsr;
+ PEI_CPU_MP_DATA *PeiCpuMpData;
+ UINTN CallerNumber;
+ MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;

PeiCpuMpData = GetMpHobData ();
if (PeiCpuMpData == NULL) {
@@ -774,9 +774,9 @@ PeiSwitchBSP (
//
// Clear the BSP bit of MSR_IA32_APIC_BASE
//
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- ApicBaseMsr.Bits.Bsp = 0;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
+ ApicBaseMsr.Bits.BSP = 0;
+ AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);

PeiCpuMpData->BSPInfo.State = CPU_SWITCH_STATE_IDLE;
PeiCpuMpData->APInfo.State = CPU_SWITCH_STATE_IDLE;
@@ -805,9 +805,9 @@ PeiSwitchBSP (
//
// Set the BSP bit of MSR_IA32_APIC_BASE on new BSP
//
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- ApicBaseMsr.Bits.Bsp = 1;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
+ ApicBaseMsr.Bits.BSP = 1;
+ AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
//
// Set old BSP enable state
//
diff --git a/UefiCpuPkg/Include/Register/LocalApic.h b/UefiCpuPkg/Include/Register/LocalApic.h
index 346cce6..cfb6d76 100644
--- a/UefiCpuPkg/Include/Register/LocalApic.h
+++ b/UefiCpuPkg/Include/Register/LocalApic.h
@@ -1,7 +1,7 @@
/** @file
IA32 Local APIC Definitions.

- Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -16,11 +16,6 @@
#define __LOCAL_APIC_H__

//
-// Definitions for IA32 architectural MSRs
-//
-#define MSR_IA32_APIC_BASE_ADDRESS 0x1B
-
-//
// Definition for Local APIC registers and related values
//
#define XAPIC_ID_OFFSET 0x20
@@ -53,19 +48,6 @@
#define LOCAL_APIC_DESTINATION_SHORTHAND_ALL_INCLUDING_SELF 2
#define LOCAL_APIC_DESTINATION_SHORTHAND_ALL_EXCLUDING_SELF 3

-typedef union {
- struct {
- UINT32 Reserved0:8; ///< Reserved.
- UINT32 Bsp:1; ///< Processor is BSP.
- UINT32 Reserved1:1; ///< Reserved.
- UINT32 Extd:1; ///< Enable x2APIC mode.
- UINT32 En:1; ///< xAPIC global enable/disable.
- UINT32 ApicBaseLow:20; ///< APIC Base physical address. The actual field width depends on physical address width.
- UINT32 ApicBaseHigh:32;
- } Bits;
- UINT64 Uint64;
-} MSR_IA32_APIC_BASE;
-
//
// Local APIC Version Register.
//
diff --git a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
index 1fca66e..8d0fb02 100644
--- a/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c
@@ -3,7 +3,7 @@

This local APIC library instance supports xAPIC mode only.

- Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -15,6 +15,7 @@
**/

#include <Register/Cpuid.h>
+#include <Register/Msr.h>
#include <Register/LocalApic.h>

#include <Library/BaseLib.h>
@@ -67,7 +68,7 @@ GetLocalApicBaseAddress (
VOID
)
{
- MSR_IA32_APIC_BASE ApicBaseMsr;
+ MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;

if (!LocalApicBaseAddressMsrSupported ()) {
//
@@ -77,10 +78,10 @@ GetLocalApicBaseAddress (
return PcdGet32 (PcdCpuLocalApicBaseAddress);
}

- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);

- return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHigh, 32)) +
- (((UINTN)ApicBaseMsr.Bits.ApicBaseLow) << 12);
+ return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHi, 32)) +
+ (((UINTN)ApicBaseMsr.Bits.ApicBase) << 12);
}

/**
@@ -97,7 +98,7 @@ SetLocalApicBaseAddress (
IN UINTN BaseAddress
)
{
- MSR_IA32_APIC_BASE ApicBaseMsr;
+ MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;

ASSERT ((BaseAddress & (SIZE_4KB - 1)) == 0);

@@ -108,12 +109,12 @@ SetLocalApicBaseAddress (
return;
}

- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);

- ApicBaseMsr.Bits.ApicBaseLow = (UINT32) (BaseAddress >> 12);
- ApicBaseMsr.Bits.ApicBaseHigh = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));
+ ApicBaseMsr.Bits.ApicBase = (UINT32) (BaseAddress >> 12);
+ ApicBaseMsr.Bits.ApicBaseHi = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));

- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
+ AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
}

/**
@@ -246,18 +247,18 @@ GetApicMode (
{
DEBUG_CODE (
{
- MSR_IA32_APIC_BASE ApicBaseMsr;
+ MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;

//
// Check to see if the CPU supports the APIC Base Address MSR
//
if (LocalApicBaseAddressMsrSupported ()) {
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
//
// Local APIC should have been enabled
//
- ASSERT (ApicBaseMsr.Bits.En != 0);
- ASSERT (ApicBaseMsr.Bits.Extd == 0);
+ ASSERT (ApicBaseMsr.Bits.EN != 0);
+ ASSERT (ApicBaseMsr.Bits.EXTD == 0);
}
}
);
diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index 38f5370..4c42696 100644
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -4,7 +4,7 @@
This local APIC library instance supports x2APIC capable processors
which have xAPIC and x2APIC modes.

- Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -16,6 +16,7 @@
**/

#include <Register/Cpuid.h>
+#include <Register/Msr.h>
#include <Register/LocalApic.h>

#include <Library/BaseLib.h>
@@ -68,7 +69,7 @@ GetLocalApicBaseAddress (
VOID
)
{
- MSR_IA32_APIC_BASE ApicBaseMsr;
+ MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;

if (!LocalApicBaseAddressMsrSupported ()) {
//
@@ -78,10 +79,10 @@ GetLocalApicBaseAddress (
return PcdGet32 (PcdCpuLocalApicBaseAddress);
}

- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);

- return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHigh, 32)) +
- (((UINTN)ApicBaseMsr.Bits.ApicBaseLow) << 12);
+ return (UINTN)(LShiftU64 ((UINT64) ApicBaseMsr.Bits.ApicBaseHi, 32)) +
+ (((UINTN)ApicBaseMsr.Bits.ApicBase) << 12);
}

/**
@@ -98,7 +99,7 @@ SetLocalApicBaseAddress (
IN UINTN BaseAddress
)
{
- MSR_IA32_APIC_BASE ApicBaseMsr;
+ MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;

ASSERT ((BaseAddress & (SIZE_4KB - 1)) == 0);

@@ -109,12 +110,12 @@ SetLocalApicBaseAddress (
return;
}

- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);

- ApicBaseMsr.Bits.ApicBaseLow = (UINT32) (BaseAddress >> 12);
- ApicBaseMsr.Bits.ApicBaseHigh = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));
+ ApicBaseMsr.Bits.ApicBase = (UINT32) (BaseAddress >> 12);
+ ApicBaseMsr.Bits.ApicBaseHi = (UINT32) (RShiftU64((UINT64) BaseAddress, 32));

- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
+ AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
}

/**
@@ -301,7 +302,7 @@ GetApicMode (
VOID
)
{
- MSR_IA32_APIC_BASE ApicBaseMsr;
+ MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;

if (!LocalApicBaseAddressMsrSupported ()) {
//
@@ -310,12 +311,12 @@ GetApicMode (
return LOCAL_APIC_MODE_XAPIC;
}

- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
//
// Local APIC should have been enabled
//
- ASSERT (ApicBaseMsr.Bits.En != 0);
- if (ApicBaseMsr.Bits.Extd != 0) {
+ ASSERT (ApicBaseMsr.Bits.EN != 0);
+ if (ApicBaseMsr.Bits.EXTD != 0) {
return LOCAL_APIC_MODE_X2APIC;
} else {
return LOCAL_APIC_MODE_XAPIC;
@@ -339,8 +340,8 @@ SetApicMode (
IN UINTN ApicMode
)
{
- UINTN CurrentMode;
- MSR_IA32_APIC_BASE ApicBaseMsr;
+ UINTN CurrentMode;
+ MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;

if (!LocalApicBaseAddressMsrSupported ()) {
//
@@ -355,9 +356,9 @@ SetApicMode (
case LOCAL_APIC_MODE_XAPIC:
break;
case LOCAL_APIC_MODE_X2APIC:
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- ApicBaseMsr.Bits.Extd = 1;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
+ ApicBaseMsr.Bits.EXTD = 1;
+ AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
break;
default:
ASSERT (FALSE);
@@ -369,12 +370,12 @@ SetApicMode (
// Transition from x2APIC mode to xAPIC mode is a two-step process:
// x2APIC -> Local APIC disabled -> xAPIC
//
- ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE_ADDRESS);
- ApicBaseMsr.Bits.Extd = 0;
- ApicBaseMsr.Bits.En = 0;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
- ApicBaseMsr.Bits.En = 1;
- AsmWriteMsr64 (MSR_IA32_APIC_BASE_ADDRESS, ApicBaseMsr.Uint64);
+ ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
+ ApicBaseMsr.Bits.EXTD = 0;
+ ApicBaseMsr.Bits.EN = 0;
+ AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
+ ApicBaseMsr.Bits.EN = 1;
+ AsmWriteMsr64 (MSR_IA32_APIC_BASE, ApicBaseMsr.Uint64);
break;
case LOCAL_APIC_MODE_X2APIC:
break;
--
2.7.4.windows.1


[Patch v5 00/48] MP Initialize Library

Jeff Fan <jeff.fan@...>
 

We add MP Initialize Library defined in UefiCpuPkg/Include/Library/MpInitLib.h.
It will provide basic functionalities of MP services and could be consumed by
CPU MP PEI and CPU MP DXE to produce CPU MP PPI and CPU MP Protocol. Then most
of code could be shared between PEI and DXE modules.

PeiMpInitLib and DxeMpInitLib are added to make the CpuMpPei and CpuDxe more
simply.

I also updated the Ovmf Platform and Quark platform to consume MP Initialize
library.

Thanks Laszlo to verify on OVMF and Mike to verify on Quark.

v5:
1. Update Patches #1, #5, #10 - #12, #14, #16 - #18, #20, #21, #28, #29, #37,
#43.
2. Add Patches #44, #48
(Please see the patches commit log for more details)

v4:
1. Update Patches #2 - #6, #10, #15, #28, #30, #31, #33, #34, #38, #41, #43.
2. Add Patches #7, #8, #42, #44 - #46.
3. Add Reviewed-by: Laszlo Ersek <lersek@redhat.com> on Patches #1, #2.
(Please see the patches commit log for more details)

v3:
1. Update Patch #2, #4 - #8, #28, #33, #36, #38 per Giri's comments to
a. Update SDM date to June, 2016
b. Mention BCD format in CPU_MICROCODE_DATE
c. Rename ProcessorChecksum to Checksum to match SDM.
d. Add whitespace after MpInitLibInitialize
e. Rename MpInitLibSwitchBsp to MpInitLibSwitchBSP to match PI spec.
f. Rename NumApsExecutingLoction to NumApsExecutingLocation
g. Add whitespace after ; in .nasm file
h. Rename *RellocateAp* to *RelocateAp*
2. Update Patch #16, #17, #29-#32 to
a. Use CamelCase for mStopCheckAllApsStatus and CheckAndUpdateApsStatus().
3. Update Patch #36 and #39 to
a. Add PeiMpInitLib instance in UefiCpuPkg.dsc
b. Add DxeMpInitLib instance in UefiCpuPkg.dsc
4. Update Patch #39 and #40 to
a. move the code of consuming MP Initialize library from patch #40 to
patch #39.
5. Update Patch #1, #3 - #8, #16 to
a. Add Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>

I fork the whole tree with the updated v3 patches
at https://github.com/vanjeff/edk2/tree/MpInitLibV5 for review.


Jeff Fan (48):
UefiCpuPkg/LocalApic.h: Remove duplicated/conflicted definitions
UefiCpuPkg/MpInitLib: Add microcode definitions defined in IA32 SDM
UefiCpuPkg/CpuS3DataDxe: Move StartupVector allocation to EndOfDxe()
UefiCpuPkg/MpInitLib: Add MP Initialize library class definition
UefiCpuPkg/MpInitLib: Add two instances PeiMpInitLib and DxeMpInitLib
UefiCpuPkg/MpInitLib: Add AP assembly code and MP_CPU_EXCHANGE_INFO
UefiCpuPkg/MpInitLib: Fix typo and clean up the code
UefiCpuPkg/MpInitLib: Add EnableExecuteDisable in MP_CPU_EXCHANGE_INFO
UefiCpuPkg/MpInitLib: Add AsmRelocateApLoop() assembly code
UefiCpuPkg/MpInitLib: Add MP_ASSEMBLY_ADDRESS_MAP
UefiCpuPkg/MpInitLib: Get ApLoopMode and MointorFilter size
UefiCpuPkg/MpInitLib: Allocate and initialize memory of MP Data buffer
UefiCpuPkg/MpInitLib: Initialize CPU_AP_DATA for CPU APs
UefiCpuPkg/MpInitLib: Add CPU_VOLATILE_REGISTERS & worker functions
UefiCpuPkg/MpInitLib: Add MicrocodeDetect() and load microcode on BSP
UefiCpuPkg/MpInitLib: Save CPU MP Data pointer
UefiCpuPkg/MpInitLib: Register one End of PEI callback function
UefiCpuPkg/MpInitLib: Register one period event to check APs status
UefiCpuPkg/MpInitLib: Allocate AP reset vector buffer under 1MB
UefiCpuPkg/MpInitLib: Add ApWakeupFunction() executed by assembly code
UefiCpuPkg/MpInitLib: Fill MP_CPU_EXCHANGE_INFO fields
UefiCpuPkg/MpInitLib: Add WakeUpAP()
UefiCpuPkg/MpInitLib: Send INIT-SIPI-SIPI to get processor count
UefiCpuPkg/MpInitLib: Enable x2APIC mode on BSP/APs
UefiCpuPkg/MpInitLib: Sort processor by ascending order of APIC ID
UefiCpuPkg/MpInitLib: Skip collect processor count if GUIDed HOB exist
UefiCpuPkg/MpInitLib: Implementation of
MpInitLibGetNumberOfProcessors()
UefiCpuPkg/MpInitLib: Implementation of MpInitLibGetProcessorInfo()
UefiCpuPkg/MpInitLib: Implementation of MpInitLibWhoAmI()
UefiCpuPkg/MpInitLib: Implementation of MpInitLibSwitchBSP()
UefiCpuPkg/MpInitLib: Implementation of MpInitLibEnableDisableAP()
UefiCpuPkg/MpInitLib: Check APs Status and update APs status
UefiCpuPkg/MpInitLib: Implementation of MpInitLibStartupThisAP()
UefiCpuPkg/MpInitLib: Implementation of MpInitLibStartupAllAPs()
UefiCpuPkg/MpInitLib: Place APs in safe loop before hand-off to OS
OvmfPkg: Add MpInitLib reference in DSC files.
QuarkPlatformPkg: Add MpInitLib reference in DSC files.
UefiCpuPkg/CpuMpPei: Consume MpInitLib to produce CPU MP PPI services
UefiCpuPkg/CpuMpPei: Remove unused files and codes
UefiCpuPkg/CpuMpPei: Delete PeiMpServices.c and PeiMpServices.h
UefiCpuPkg/CpuDxe: Consume MpInitLib to produce CPU MP Protocol
services
UefiCpuPkg/CpuDxe: Move SetMtrrsFromBuffer() location.
UefiCpuPkg/CpuDxe: Remove unused codes and files
UefiCpuPkg/CpuDxe: Remove PcdCpuMaxLogicalProcessorNumber consuming
MdePkg/MpService.h: Fixed typo in function header to match PI spec
MdePkg/MpService.h: Trim whitespace at end of line
UefiCpuPkg/CpuDxe: Fixed typo in function header to match PI spec
UefiCpuPkg/PiSmmCpuDxeSmm: Add gEfiVariableArchProtocolGuid dependency

MdePkg/Include/Protocol/MpService.h | 490 ++---
OvmfPkg/OvmfPkgIa32.dsc | 2 +
OvmfPkg/OvmfPkgIa32X64.dsc | 2 +
OvmfPkg/OvmfPkgX64.dsc | 2 +
QuarkPlatformPkg/Quark.dsc | 2 +
QuarkPlatformPkg/QuarkMin.dsc | 4 +-
.../DebugAgent/DebugAgentCommon/DebugAgent.h | 1 +
.../Library/DebugAgent/DebugAgentCommon/DebugMp.c | 5 +-
UefiCpuPkg/CpuDxe/ApStartup.c | 478 -----
UefiCpuPkg/CpuDxe/CpuDxe.c | 17 +-
UefiCpuPkg/CpuDxe/CpuDxe.h | 13 +-
UefiCpuPkg/CpuDxe/CpuDxe.inf | 17 +-
UefiCpuPkg/CpuDxe/CpuDxe.uni | 10 +-
UefiCpuPkg/CpuDxe/CpuDxeExtra.uni | 4 +-
UefiCpuPkg/CpuDxe/CpuMp.c | 1306 +------------
UefiCpuPkg/CpuDxe/CpuMp.h | 186 +-
UefiCpuPkg/CpuDxe/Ia32/MpAsm.asm | 76 -
UefiCpuPkg/CpuDxe/Ia32/MpAsm.nasm | 68 -
UefiCpuPkg/CpuDxe/X64/MpAsm.asm | 76 -
UefiCpuPkg/CpuDxe/X64/MpAsm.nasm | 70 -
UefiCpuPkg/CpuMpPei/CpuBist.c | 53 +-
UefiCpuPkg/CpuMpPei/CpuMpPei.c | 1118 ++++-------
UefiCpuPkg/CpuMpPei/CpuMpPei.h | 515 ++---
UefiCpuPkg/CpuMpPei/CpuMpPei.inf | 32 +-
UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.asm | 250 ---
UefiCpuPkg/CpuMpPei/Microcode.h | 58 -
UefiCpuPkg/CpuMpPei/PeiMpServices.c | 956 ----------
UefiCpuPkg/CpuMpPei/PeiMpServices.h | 377 ----
UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm | 290 ---
UefiCpuPkg/CpuS3DataDxe/CpuS3Data.c | 42 +-
UefiCpuPkg/CpuS3DataDxe/CpuS3DataDxe.inf | 2 +-
UefiCpuPkg/Include/Library/MpInitLib.h | 353 ++++
UefiCpuPkg/Include/Register/LocalApic.h | 20 +-
UefiCpuPkg/Include/Register/Microcode.h | 200 ++
UefiCpuPkg/Library/BaseXApicLib/BaseXApicLib.c | 29 +-
.../BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 51 +-
.../MpInitLib/DxeMpInitLib.inf} | 68 +-
.../MpInitLib/DxeMpInitLib.uni} | 12 +-
UefiCpuPkg/Library/MpInitLib/DxeMpLib.c | 649 +++++++
.../{CpuMpPei => Library/MpInitLib}/Ia32/MpEqu.inc | 4 +-
.../MpInitLib}/Ia32/MpFuncs.nasm | 66 +-
.../{CpuMpPei => Library/MpInitLib}/Microcode.c | 77 +-
UefiCpuPkg/Library/MpInitLib/MpLib.c | 2013 ++++++++++++++++++++
UefiCpuPkg/Library/MpInitLib/MpLib.h | 554 ++++++
.../MpInitLib/PeiMpInitLib.inf} | 60 +-
.../MpInitLib/PeiMpInitLib.uni} | 12 +-
UefiCpuPkg/Library/MpInitLib/PeiMpLib.c | 643 +++++++
.../{CpuMpPei => Library/MpInitLib}/X64/MpEqu.inc | 6 +-
.../MpInitLib}/X64/MpFuncs.nasm | 84 +-
UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 4 +-
UefiCpuPkg/UefiCpuPkg.dec | 4 +
UefiCpuPkg/UefiCpuPkg.dsc | 4 +
52 files changed, 5777 insertions(+), 5658 deletions(-)
delete mode 100644 UefiCpuPkg/CpuDxe/ApStartup.c
delete mode 100644 UefiCpuPkg/CpuDxe/Ia32/MpAsm.asm
delete mode 100644 UefiCpuPkg/CpuDxe/Ia32/MpAsm.nasm
delete mode 100644 UefiCpuPkg/CpuDxe/X64/MpAsm.asm
delete mode 100644 UefiCpuPkg/CpuDxe/X64/MpAsm.nasm
delete mode 100644 UefiCpuPkg/CpuMpPei/Ia32/MpFuncs.asm
delete mode 100644 UefiCpuPkg/CpuMpPei/Microcode.h
delete mode 100644 UefiCpuPkg/CpuMpPei/PeiMpServices.c
delete mode 100644 UefiCpuPkg/CpuMpPei/PeiMpServices.h
delete mode 100644 UefiCpuPkg/CpuMpPei/X64/MpFuncs.asm
create mode 100644 UefiCpuPkg/Include/Library/MpInitLib.h
create mode 100644 UefiCpuPkg/Include/Register/Microcode.h
copy UefiCpuPkg/{CpuMpPei/CpuMpPei.inf => Library/MpInitLib/DxeMpInitLib.inf} (52%)
copy UefiCpuPkg/{CpuDxe/CpuDxeExtra.uni => Library/MpInitLib/DxeMpInitLib.uni} (53%)
create mode 100644 UefiCpuPkg/Library/MpInitLib/DxeMpLib.c
rename UefiCpuPkg/{CpuMpPei => Library/MpInitLib}/Ia32/MpEqu.inc (88%)
rename UefiCpuPkg/{CpuMpPei => Library/MpInitLib}/Ia32/MpFuncs.nasm (77%)
rename UefiCpuPkg/{CpuMpPei => Library/MpInitLib}/Microcode.c (68%)
create mode 100644 UefiCpuPkg/Library/MpInitLib/MpLib.c
create mode 100644 UefiCpuPkg/Library/MpInitLib/MpLib.h
copy UefiCpuPkg/{CpuMpPei/CpuMpPei.inf => Library/MpInitLib/PeiMpInitLib.inf} (58%)
copy UefiCpuPkg/{CpuDxe/CpuDxeExtra.uni => Library/MpInitLib/PeiMpInitLib.uni} (53%)
create mode 100644 UefiCpuPkg/Library/MpInitLib/PeiMpLib.c
rename UefiCpuPkg/{CpuMpPei => Library/MpInitLib}/X64/MpEqu.inc (88%)
rename UefiCpuPkg/{CpuMpPei => Library/MpInitLib}/X64/MpFuncs.nasm (73%)

--
2.7.4.windows.1


Re: [PATCH v5 5/8] ArmPkg: add prebuilt glue binaries for GCC5 LTO support

Leif Lindholm <leif.lindholm@...>
 

On Mon, Aug 01, 2016 at 10:01:34AM +0200, Ard Biesheuvel wrote:
GCC in LTO mode interoperates poorly with non-standard libraries that
provide implementations of compiler intrinsics such as memcpy/memset
or the stack protector entry points. Such libraries need to be built
in non-LTO mode, and then referenced explicitly on the linker command
line using a -plugin-opt=-pass-through=-lxxx linker option.

However, if these intrinsics are also referenced directly, the LTO
version of the code will be pulled in, and will happily satisfy all
other references to the same symbol.

So add a pair of glue libraries, for ARM and AARCH64, that reference
the known intrinsics. Since the binaries live under ArmPkg directly,
we can reference them in tools_def.txt. Under LD garbage collection,
the object itself will be pruned, and so will the intrinsics that end
up unused by the module.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
If everyone else is happy about this binary file inclusion, I
certainly don't object (given that the source is included).

Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

---
ArmPkg/Library/GccLto/liblto-aarch64.a | Bin 0 -> 1016 bytes
ArmPkg/Library/GccLto/liblto-aarch64.s | 27 +++++++++
ArmPkg/Library/GccLto/liblto-arm.a | Bin 0 -> 2096 bytes
ArmPkg/Library/GccLto/liblto-arm.s | 61 ++++++++++++++++++++
4 files changed, 88 insertions(+)

diff --git a/ArmPkg/Library/GccLto/liblto-aarch64.a b/ArmPkg/Library/GccLto/liblto-aarch64.a
new file mode 100644
index 0000000000000000000000000000000000000000..2ab00238f0dad882abf08a1fb9623c9cdea9f17b
GIT binary patch
literal 1016
zcmbu7&rZTX5XPqz6oLo!M8btcV>pmaJb3R#Pab@Ovb0qUG$GwJk&}<*)yMErJh~su
zhGA(FBh#ci^V@G{X8(NLKR&dgh`dGgNxR5Xq8|a14Nj;_ot@whUR;}*D0W|+#ne8)
z+crcqtbp?TKuy$d;Fk^js)5sWPGwPMt2G8wSV~i4b+$;e`67MRugg8~@}{d?w$pJf
z%hU2Z13wYMF8ko8f}aWQH5;VNy0m&m%Ghc<&b?O^ORa42Zb{|ZYEm;}M9QPwkz0*h
zki8>ef}gYSE})e*bOFvFk<j^57EYNXKak(^fcXvc@Z~)5d^m*lCr*Hz|6PAkvlcbK
oxX>*EVPSp5Eivz1-~TrQyaBwMaQ{8W!rrlD%!Td{2n*}~0;u;a`v3p{

literal 0
HcmV?d00001

diff --git a/ArmPkg/Library/GccLto/liblto-aarch64.s b/ArmPkg/Library/GccLto/liblto-aarch64.s
new file mode 100644
index 000000000000..45000d327758
--- /dev/null
+++ b/ArmPkg/Library/GccLto/liblto-aarch64.s
@@ -0,0 +1,27 @@
+//
+// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+//
+// This program and the accompanying materials are licensed and made available under
+// the terms and conditions of the BSD License that accompanies this distribution.
+// The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php.
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+
+//
+// GCC in LTO mode interoperates poorly with non-standard libraries that
+// provide implementations of compiler intrinsics such as memcpy/memset
+// or the stack protector entry points.
+//
+// By referencing these functions from a non-LTO object that can be passed
+// to the linker via the -plugin-opt=-pass-through=-lxxx options, the
+// intrinsics are included in the link in a way that allows them to be
+// pruned again if no other references to them exist.
+//
+
+ .long memcpy - .
+ .long memset - .
+ .long __stack_chk_fail - .
+ .long __stack_chk_guard - .
diff --git a/ArmPkg/Library/GccLto/liblto-arm.a b/ArmPkg/Library/GccLto/liblto-arm.a
new file mode 100644
index 0000000000000000000000000000000000000000..d811c09573a35ea87a8002ecf01be18e1c6e7fd3
GIT binary patch
literal 2096
zcmd6o%WKq76vn?XQ*C|Js#WW|YOD1@u(oJH7cHm=wjd(Xg%C3{sS}#eGD-SEunQLz
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zvPafpsg(EM+QeEU%F9+!7AJXjt<6BM=oX+)l${4fw*md4-N1n8cCac_8FW^32XIbw
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wAAvlV^sI41<6<;hHcoUy=A?e-|05l;7C8giM-Tt9*KBPx@rv+1OG3`f-+dwCzyJUM

literal 0
HcmV?d00001

diff --git a/ArmPkg/Library/GccLto/liblto-arm.s b/ArmPkg/Library/GccLto/liblto-arm.s
new file mode 100644
index 000000000000..bc16320a46c0
--- /dev/null
+++ b/ArmPkg/Library/GccLto/liblto-arm.s
@@ -0,0 +1,61 @@
+//
+// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
+//
+// This program and the accompanying materials are licensed and made available under
+// the terms and conditions of the BSD License that accompanies this distribution.
+// The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php.
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+
+//
+// GCC in LTO mode interoperates poorly with non-standard libraries that
+// provide implementations of compiler intrinsics such as memcpy/memset
+// or the stack protector entry points.
+//
+// By referencing these functions from a non-LTO object that can be passed
+// to the linker via the -plugin-opt=-pass-through=-lxxx options, the
+// intrinsics are included in the link in a way that allows them to be
+// pruned again if no other references to them exist.
+//
+
+ .long memcpy - .
+ .long memset - .
+ .long __stack_chk_fail - .
+ .long __stack_chk_guard - .
+ .long __ashrdi3 - .
+ .long __ashldi3 - .
+ .long __aeabi_idiv - .
+ .long __aeabi_idivmod - .
+ .long __aeabi_uidiv - .
+ .long __aeabi_uidivmod - .
+ .long __divdi3 - .
+ .long __divsi3 - .
+ .long __lshrdi3 - .
+ .long __aeabi_memcpy - .
+ .long __aeabi_memset - .
+ .long memmove - .
+ .long __modsi3 - .
+ .long __moddi3 - .
+ .long __muldi3 - .
+ .long __aeabi_lmul - .
+ .long __ARM_ll_mullu - .
+ .long __udivsi3 - .
+ .long __umodsi3 - .
+ .long __udivdi3 - .
+ .long __umoddi3 - .
+ .long __udivmoddi4 - .
+ .long __clzsi2 - .
+ .long __ctzsi2 - .
+ .long __ucmpdi2 - .
+ .long __switch8 - .
+ .long __switchu8 - .
+ .long __switch16 - .
+ .long __switch32 - .
+ .long __aeabi_ulcmp - .
+ .long __aeabi_uldivmod - .
+ .long __aeabi_ldivmod - .
+ .long __aeabi_llsr - .
+ .long __aeabi_llsl - .
--
2.7.4


Re: [PATCH] OvmfPkg: use StatusCode Router and Handler from MdeModulePkg

Laszlo Ersek
 

On 08/02/16 03:13, Laszlo Ersek wrote:

(1) So, here's what I would like to see in the commit message:

----------

In the Platform Init v1.4a spec,
- Volume 1 "4.7 Status Code Service" defines the
EFI_PEI_REPORT_STATUS_CODE.ReportStatusCode() service,
sorry, the above is a typo, I meant EFI_PEI_SERVICES.ReportStatusCode().


- Volume 1 "6.3.5 Status Code PPI (Optional)" defines the
EFI_PEI_PROGRESS_CODE_PPI (equivalent to the above),
- Volume 2 "14.2 Status Code Runtime Protocol" defines the
EFI_STATUS_CODE_PROTOCOL.

These allow PEIMs and DXE (and later) modules to report status codes.

Currently OvmfPkg uses modules from under
"IntelFrameworkModulePkg/Universal/StatusCode/", which produce the above
abstractions (PPI and PROTOCOL) directly, and write the status codes, as
they are reported, to the serial port or to a memory buffer. This is
called "handling" the status codes.

In the Platform Init v1.4a spec,
- Volume 3 "7.2.2 Report Status Code Handler PPI" defines
EFI_PEI_RSC_HANDLER_PPI,
- Volume 3 "7.2.1 Report Status Code Handler Protocol" defines
EFI_RSC_HANDLER_PROTOCOL.

These allow PEIMs and runtime DXE drivers to register several callbacks
for status code handling.
The woring here would also be better if we said "These allow several
PEIMs and runtime DXE drivers to register callbacks for status code
handling". In other words, "several" should refer to the drivers, not
the callbacks.


MdeModulePkg offers a PEIM under
"MdeModulePkg/Universal/ReportStatusCodeRouter/Pei" that procudes both
EFI_PEI_PROGRESS_CODE_PPI and EFI_PEI_RSC_HANDLER_PPI, and a runtime DXE
driver under "MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe"
that produces both EFI_STATUS_CODE_PROTOCOL and EFI_RSC_HANDLER_PROTOCOL.

MdeModulePkg also offers status code handler modules under
MdeModulePkg/Universal/StatusCodeHandler/ that depend on
EFI_PEI_RSC_HANDLER_PPI and EFI_RSC_HANDLER_PROTOCOL, respectively.

The StatusCodeHandler modules register themselves with
ReportStatusCodeRouter through EFI_PEI_RSC_HANDLER_PPI /
EFI_RSC_HANDLER_PROTOCOL. When another module reports a status code
through EFI_PEI_PROGRESS_CODE_PPI / EFI_STATUS_CODE_PROTOCOL, it reaches
phase-matching ReportStatusCodeRouter module first, which in turn passes
"it reaches [the] phase-matching" -- the definite article missing.

Sorry about these typos, it was very late last night when I wrote the email.

Thanks!
Laszlo

the status code to the pre-registered, phase-matching StatusCodeHandler
module.

The status code handling in the StatusCodeHandler modules is identical
to the one currently provided by the IntelFrameworkModulePkg modules.
Replace the IntelFareworkModulePkg modules with the MdeModulePkg ones,
so we can decrease our dependency on IntelFareworkModulePkg.

----------


[patch] MdeModulePkg/FvSimpleFileSystem: fix assertions when FV is empty

Feng Tian <feng.tian@...>
 

The original code will assert when dealing with those empty FVs.
The fix is used to solve this bug.

Cc: Chao Zhang <chao.b.zhang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Feng Tian <feng.tian@intel.com>
---
.../Universal/FvSimpleFileSystemDxe/FvSimpleFileSystem.c | 9 +++++++--
.../FvSimpleFileSystemDxe/FvSimpleFileSystemEntryPoint.c | 6 +++++-
2 files changed, 12 insertions(+), 3 deletions(-)

diff --git a/MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystem.c b/MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystem.c
index c6137ac..b81110f 100644
--- a/MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystem.c
+++ b/MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystem.c
@@ -526,7 +526,10 @@ FvSimpleFileSystemOpen (
InitializeListHead (&NewFile->Link);
InsertHeadList (&Instance->FileHead, &NewFile->Link);

- NewFile->DirReadNext = FVFS_GET_FIRST_FILE_INFO (Instance);
+ NewFile->DirReadNext = NULL;
+ if (!IsListEmpty (&Instance->FileInfoHead)) {
+ NewFile->DirReadNext = FVFS_GET_FIRST_FILE_INFO (Instance);
+ }

*NewHandle = &NewFile->FileProtocol;
return EFI_SUCCESS;
@@ -821,7 +824,9 @@ FvSimpleFileSystemSetPosition (
//
// Reset directory position to first entry
//
- File->DirReadNext = FVFS_GET_FIRST_FILE_INFO (Instance);
+ if (File->DirReadNext) {
+ File->DirReadNext = FVFS_GET_FIRST_FILE_INFO (Instance);
+ }
} else if (Position == 0xFFFFFFFFFFFFFFFFull) {
File->Position = File->FvFileInfo->FileInfo.FileSize;
} else {
diff --git a/MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemEntryPoint.c b/MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemEntryPoint.c
index 7167fb9..4e6089b 100644
--- a/MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemEntryPoint.c
+++ b/MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemEntryPoint.c
@@ -223,7 +223,11 @@ FvSimpleFileSystemOpenVolume (
}
}

- Instance->Root->DirReadNext = FVFS_GET_FIRST_FILE_INFO (Instance);
+ Instance->Root->DirReadNext = NULL;
+ if (!IsListEmpty (&Instance->FileInfoHead)) {
+ Instance->Root->DirReadNext = FVFS_GET_FIRST_FILE_INFO (Instance);
+ }
+
*RootFile = &Instance->Root->FileProtocol;
return Status;
}
--
2.7.1.windows.2


Re: [Patch] MdeModulePkg LoadFileOnFv2: Fix the potential NULL pointer access

Tian, Feng <feng.tian@...>
 

Reviewed-by: Feng Tian <feng.tian@intel.com>

Thanks
Feng

-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Liming Gao
Sent: Tuesday, August 2, 2016 1:39 PM
To: edk2-devel@lists.01.org
Subject: [edk2] [Patch] MdeModulePkg LoadFileOnFv2: Fix the potential NULL pointer access

Check NULL pointer before access it.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
---
MdeModulePkg/Universal/LoadFileOnFv2/LoadFileOnFv2.c | 6 ++++++
1 file changed, 6 insertions(+)

diff --git a/MdeModulePkg/Universal/LoadFileOnFv2/LoadFileOnFv2.c b/MdeModulePkg/Universal/LoadFileOnFv2/LoadFileOnFv2.c
index 9eea50d..18a07d8 100644
--- a/MdeModulePkg/Universal/LoadFileOnFv2/LoadFileOnFv2.c
+++ b/MdeModulePkg/Universal/LoadFileOnFv2/LoadFileOnFv2.c
@@ -345,6 +345,9 @@ FvNotificationEvent (
Index = 0;
BufferSize = sizeof (EFI_HANDLE);
Handle = AllocateZeroPool (BufferSize);
+ if (Handle == NULL) {
+ return;
+ }
Status = gBS->LocateHandle (
ByProtocol,
&gEfiFirmwareVolume2ProtocolGuid, @@ -355,6 +358,9 @@ FvNotificationEvent (
if (EFI_BUFFER_TOO_SMALL == Status) {
FreePool (Handle);
Handle = AllocateZeroPool (BufferSize);
+ if (Handle == NULL) {
+ return;
+ }
Status = gBS->LocateHandle (
ByProtocol,
&gEfiFirmwareVolume2ProtocolGuid,
--
2.8.0.windows.1

_______________________________________________
edk2-devel mailing list
edk2-devel@lists.01.org
https://lists.01.org/mailman/listinfo/edk2-devel


Re: [PATCH] MdePkg: move to 'hidden' visibility for all symbols under GCC/X64

Ard Biesheuvel
 

On 2 August 2016 at 04:49, Gao, Liming <liming.gao@intel.com> wrote:
Reviewed-by: Liming Gao <liming.gao@intel.com>
Thanks
Pushed as 28ade7b802e0

--
Ard.

-----Original Message-----
From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org]
Sent: Monday, August 01, 2016 2:57 PM
To: Shi, Steven <steven.shi@intel.com>; Zhu, Yonghong
<yonghong.zhu@intel.com>; Gao, Liming <liming.gao@intel.com>; Justen,
Jordan L <jordan.l.justen@intel.com>; edk2-devel@lists.01.org
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH] MdePkg: move to 'hidden' visibility for all symbols under
GCC/X64

When using GCC to build for X64, we switched to the position independent
small code model, which is much more efficient in terms of code generation
and runtime relocation footprint, and produces binaries that can execute
correctly from any offset.

However, the PIC routines are by default geared towards hosted binaries
containing symbol references that may resolve to definitions in other
dynamic objects, and for this reason, external symbol references are
indirected via a GOT entry by default (which also results in a .reloc fixup
entry) unless we annotate them.

For this reason, we introduced the 'protected' visibility annotation for
all symbol definitions and references, by setting the GCC visibility
pragma. However, as it turns out, this is not sufficient for all versions
of GCC, and in some cases (GCC 5.x using the GCC49 toolchain tag), may
still result in GOT based relocations.

So switch to 'hidden' visibility instead, which is slightly stronger, and
fixes this issue for the versions of GCC that exhibit the problem.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
MdePkg/Include/X64/ProcessorBind.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Include/X64/ProcessorBind.h
b/MdePkg/Include/X64/ProcessorBind.h
index a4aad3e524e8..666cc8e8bd16 100644
--- a/MdePkg/Include/X64/ProcessorBind.h
+++ b/MdePkg/Include/X64/ProcessorBind.h
@@ -29,12 +29,12 @@

#if defined(__GNUC__) && defined(__pic__)
//
-// Mark all symbol declarations and references as protected, meaning they
will
+// Mark all symbol declarations and references as hidden, meaning they will
// not be subject to symbol preemption. This allows the compiler to refer to
// symbols directly using relative references rather than via the GOT, which
// contains absolute symbol addresses that are subject to runtime relocation.
//
-#pragma GCC visibility push (protected)
+#pragma GCC visibility push (hidden)
#endif

#if defined(__INTEL_COMPILER)
--
2.7.4


Re: [patch] BaseTool/UPT: Not expand macro for UserExtension

Zhu, Yonghong <yonghong.zhu@...>
 

Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>

Best Regards,
Zhu Yonghong

-----Original Message-----
From: Chen, Hesheng
Sent: Monday, August 01, 2016 11:26 PM
To: edk2-devel@lists.01.org
Cc: Zhu, Yonghong <yonghong.zhu@intel.com>
Subject: [patch] BaseTool/UPT: Not expand macro for UserExtension

All MACRO values defined by the DEFINE statements n any section (except [Userextensions] sections other than TianoCore."ExtraFiles) of the INF or DEC file must be expanded before processing of the file.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: hesschen <hesheng.chen@intel.com>
---
BaseTools/Source/Python/UPT/Parser/DecParser.py | 16 +++++++++++++++-
1 file changed, 15 insertions(+), 1 deletion(-)

diff --git a/BaseTools/Source/Python/UPT/Parser/DecParser.py b/BaseTools/Source/Python/UPT/Parser/DecParser.py
index e6658a9..937047f 100644
--- a/BaseTools/Source/Python/UPT/Parser/DecParser.py
+++ b/BaseTools/Source/Python/UPT/Parser/DecParser.py
@@ -270,7 +270,21 @@ class _DecBase:
self._LoggerError(ST.ERR_DECPARSE_BACKSLASH_EMPTY)
CatLine += Line

- self._RawData.CurrentLine = self._ReplaceMacro(CatLine)
+ #
+ # All MACRO values defined by the DEFINE statements in any section
+ # (except [Userextensions] sections for Intel) of the INF or DEC file
+ # must be expanded before processing of the file.
+ #
+ __IsReplaceMacro = True
+ Header = self._RawData.CurrentScope[0] if self._RawData.CurrentScope else None
+ if Header and len(Header) > 2:
+ if Header[0].upper() == 'USEREXTENSIONS' and not (Header[1] == 'TianoCore' and Header[2] == '"ExtraFiles"'):
+ __IsReplaceMacro = False
+ if __IsReplaceMacro:
+ self._RawData.CurrentLine = self._ReplaceMacro(CatLine)
+ else:
+ self._RawData.CurrentLine = CatLine
+
return CatLine, CommentList

## Parse
--
2.7.2.windows.1