Date   

Re: [PATCH v5] Platforms/ARM/Juno: Create SMBIOS/DMI data for Juno

Leif Lindholm <leif.lindholm@...>
 

On Thu, Jul 28, 2016 at 09:41:57AM -0500, Jeremy Linton wrote:
SMBIOS data is consumed by a wide range of enterprise applications.

Fill in the basic requirements of the SMBIOS specification by hardcoding
the minimum required structures and data using Juno information. Only the
juno revision, memory ranges and CPU types are dynamic.

Add the resulting Juno SmbiosPlatformDxe and MdeModulePkg/SmbiosDxe to the
build and firmware image. With these changes, the EFI BDS, EFI shell,
and Linux dmidecode command return useful information.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeremy Linton <jeremy.linton@arm.com>
Thanks, Jeremy.
Pushed to OpenPlatformPkg.

---
Platforms/ARM/Juno/ArmJuno.dsc | 12 +
Platforms/ARM/Juno/ArmJuno.fdf | 6 +
.../ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c | 865 +++++++++++++++++++++
.../Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf | 68 ++
4 files changed, 951 insertions(+)
create mode 100644 Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c
create mode 100644 Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf

diff --git a/Platforms/ARM/Juno/ArmJuno.dsc b/Platforms/ARM/Juno/ArmJuno.dsc
index 84c2441..c51d8f2 100644
--- a/Platforms/ARM/Juno/ArmJuno.dsc
+++ b/Platforms/ARM/Juno/ArmJuno.dsc
@@ -178,6 +178,12 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile|{ 0x83, 0xA5, 0x04, 0x7C, 0x3E, 0x9E, 0x1C, 0x4F, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }

+ #
+ # SMBIOS entry point version
+ #
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0300
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosDocRev|0x0
+
[PcdsPatchableInModule]
# Console Resolution (Full HD)
gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|1920
@@ -312,6 +318,12 @@
}

#
+ # SMBIOS/DMI
+ #
+ MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ OpenPlatformPkg/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+
+ #
# Bds
#
MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
diff --git a/Platforms/ARM/Juno/ArmJuno.fdf b/Platforms/ARM/Juno/ArmJuno.fdf
index a01db20..04d9a3c 100644
--- a/Platforms/ARM/Juno/ArmJuno.fdf
+++ b/Platforms/ARM/Juno/ArmJuno.fdf
@@ -202,6 +202,12 @@ FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
INF SecurityPkg/RandomNumberGenerator/RngDxe/RngDxe.inf

#
+ # SMBIOS/DMI
+ #
+ INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ INF OpenPlatformPkg/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
+
+ #
# Bds
#
INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
diff --git a/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c
new file mode 100644
index 0000000..fe5498e
--- /dev/null
+++ b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.c
@@ -0,0 +1,865 @@
+/** @file
+ This driver installs SMBIOS information for ARM Juno platforms
+
+ Copyright (c) 2015, ARM Limited. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+#include <ArmPlatform.h>
+#include <IndustryStandard/SmBios.h>
+#include <Library/ArmLib.h>
+#include <Library/BaseLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/DebugLib.h>
+#include <Library/IoLib.h>
+#include <Library/MemoryAllocationLib.h>
+#include <Library/PcdLib.h>
+#include <Library/UefiBootServicesTableLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <PiDxe.h>
+#include <Protocol/Smbios.h>
+
+#define TYPE0_STRINGS \
+ "EFI Development Kit II / ARM LTD\0" /* Vendor */ \
+ "EDK II\0" /* BiosVersion */ \
+ __DATE__"\0" /* BiosReleaseDate */
+
+#define TYPE1_STRINGS \
+ "ARM LTD\0" /* Manufacturer */ \
+ "ARM Juno Development Platform\0" /* Product Name */ \
+ "None\0" /* Version */ \
+ " \0" /* 20 character buffer */
+
+#define TYPE2_STRINGS \
+ "ARM LTD\0" /* Manufacturer */ \
+ "ARM Juno Development Platform\0" /* Product Name */ \
+ "R0\0" /* Version */ \
+ "Serial Not Set\0" /* Serial */ \
+ "Base of Chassis\0" /* board location */ \
+ "R1\0" /* Version */ \
+ "R2\0" /* Version */
+
+#define TYPE3_STRINGS \
+ "ARM LTD\0" /* Manufacturer */ \
+ "None\0" /* Version */ \
+ "Serial Not Set\0" /* Serial */
+
+#define TYPE4_STRINGS \
+ "BGA-1156\0" /* socket type */ \
+ "ARM LTD\0" /* manufactuer */ \
+ "Cortex-A57\0" /* processor 1 description */ \
+ "Cortex-A53\0" /* processor 2 description */ \
+ "Cortex-A72\0" /* processor 2 description */ \
+ "0xd03\0" /* A53 part number */ \
+ "0xd07\0" /* A57 part number */ \
+ "0xd08\0" /* A72 part number */
+
+#define TYPE7_STRINGS \
+ "L1 Instruction\0" /* L1I */ \
+ "L1 Data\0" /* L1D */ \
+ "L2\0" /* L2 */
+
+#define TYPE9_STRINGS \
+ "PCIE_SLOT0\0" /* Slot0 */ \
+ "PCIE_SLOT1\0" /* Slot1 */ \
+ "PCIE_SLOT2\0" /* Slot2 */ \
+ "PCIE_SLOT3\0" /* Slot3 */
+
+#define TYPE16_STRINGS \
+ "\0" /* nothing */
+
+#define TYPE17_STRINGS \
+ "RIGHT SIDE\0" /* location */ \
+ "BANK 0\0" /* bank description */
+
+#define TYPE19_STRINGS \
+ "\0" /* nothing */
+
+#define TYPE32_STRINGS \
+ "\0" /* nothing */
+
+
+//
+// Type definition and contents of the default SMBIOS table.
+// This table covers only the minimum structures required by
+// the SMBIOS specification (section 6.2, version 3.0)
+//
+#pragma pack(1)
+typedef struct {
+ SMBIOS_TABLE_TYPE0 Base;
+ INT8 Strings[sizeof(TYPE0_STRINGS)];
+} ARM_TYPE0;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE1 Base;
+ UINT8 Strings[sizeof(TYPE1_STRINGS)];
+} ARM_TYPE1;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE2 Base;
+ UINT8 Strings[sizeof(TYPE2_STRINGS)];
+} ARM_TYPE2;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE3 Base;
+ UINT8 Strings[sizeof(TYPE3_STRINGS)];
+} ARM_TYPE3;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE4 Base;
+ UINT8 Strings[sizeof(TYPE4_STRINGS)];
+} ARM_TYPE4;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE7 Base;
+ UINT8 Strings[sizeof(TYPE7_STRINGS)];
+} ARM_TYPE7;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE9 Base;
+ UINT8 Strings[sizeof(TYPE9_STRINGS)];
+} ARM_TYPE9;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE16 Base;
+ UINT8 Strings[sizeof(TYPE16_STRINGS)];
+} ARM_TYPE16;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE17 Base;
+ UINT8 Strings[sizeof(TYPE17_STRINGS)];
+} ARM_TYPE17;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE19 Base;
+ UINT8 Strings[sizeof(TYPE19_STRINGS)];
+} ARM_TYPE19;
+
+typedef struct {
+ SMBIOS_TABLE_TYPE32 Base;
+ UINT8 Strings[sizeof(TYPE32_STRINGS)];
+} ARM_TYPE32;
+
+// SMBIOS tables often reference each other using
+// fixed constants, define a list of these constants
+// for our hardcoded tables
+enum SMBIOS_REFRENCE_HANDLES {
+ SMBIOS_HANDLE_A57_L1I = 0x1000,
+ SMBIOS_HANDLE_A57_L1D,
+ SMBIOS_HANDLE_A57_L2,
+ SMBIOS_HANDLE_A53_L1I,
+ SMBIOS_HANDLE_A53_L1D,
+ SMBIOS_HANDLE_A53_L2,
+ SMBIOS_HANDLE_MOTHERBOARD,
+ SMBIOS_HANDLE_CHASSIS,
+ SMBIOS_HANDLE_A72_CLUSTER,
+ SMBIOS_HANDLE_A57_CLUSTER,
+ SMBIOS_HANDLE_A53_CLUSTER,
+ SMBIOS_HANDLE_MEMORY,
+ SMBIOS_HANDLE_DIMM
+};
+
+#define SERIAL_LEN 10 //this must be less than the buffer len allocated in the type1 structure
+
+#pragma pack()
+
+// BIOS information (section 7.1)
+STATIC ARM_TYPE0 mArmDefaultType0 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_BIOS_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE0), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 1, // SMBIOS_TABLE_STRING Vendor
+ 2, // SMBIOS_TABLE_STRING BiosVersion
+ 0xE800,// UINT16 BiosSegment
+ 3, // SMBIOS_TABLE_STRING BiosReleaseDate
+ 0, // UINT8 BiosSize
+ {
+ 0,0,0,0,0,0,
+ 1, //PCI supported
+ 0,
+ 1, //PNP supported
+ 0,
+ 1, //BIOS upgradable
+ 0, 0, 0,
+ 1, //Boot from CD
+ 1, //selectable boot
+ }, // MISC_BIOS_CHARACTERISTICS BiosCharacteristics
+ { // BIOSCharacteristicsExtensionBytes[2]
+ 0x3,
+ 0xC,
+ },
+ 0, // UINT8 SystemBiosMajorRelease
+ 0, // UINT8 SystemBiosMinorRelease
+ 0xFF, // UINT8 EmbeddedControllerFirmwareMajorRelease
+ 0xFF // UINT8 EmbeddedControllerFirmwareMinorRelease
+ },
+ // Text strings (unformatted area)
+ TYPE0_STRINGS
+};
+
+// System information (section 7.2)
+STATIC CONST ARM_TYPE1 mArmDefaultType1 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_INFORMATION,
+ sizeof(SMBIOS_TABLE_TYPE1),
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 1, //Manufacturer
+ 2, //Product Name
+ 3, //Version
+ 4, //Serial
+ { 0x8a95d198, 0x7f46, 0x11e5, { 0xbf,0x8b,0x08,0x00,0x27,0x04,0xd4,0x8e }}, //UUID
+ 6, //Wakeup type
+ 0, //SKU
+ 0, //Family
+ },
+ // Text strings (unformatted)
+ TYPE1_STRINGS
+};
+
+// Baseboard (section 7.3)
+STATIC ARM_TYPE2 mArmDefaultType2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_BASEBOARD_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE2), // UINT8 Length
+ SMBIOS_HANDLE_MOTHERBOARD,
+ },
+ 1, //Manufacturer
+ 2, //Product Name
+ 3, //Version
+ 4, //Serial
+ 0, //Asset tag
+ {1}, //motherboard, not replaceable
+ 5, //location of board
+ SMBIOS_HANDLE_CHASSIS,
+ BaseBoardTypeMotherBoard,
+ 1,
+ {SMBIOS_HANDLE_A53_CLUSTER}, //,SMBIOS_HANDLE_A53_CLUSTER,SMBIOS_HANDLE_MEMORY},
+ },
+ TYPE2_STRINGS
+};
+
+// Enclosure
+STATIC CONST ARM_TYPE3 mArmDefaultType3 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_ENCLOSURE, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE3), // UINT8 Length
+ SMBIOS_HANDLE_CHASSIS,
+ },
+ 1, //Manufacturer
+ 4, //enclosure type (low profile desktop)
+ 2, //version
+ 3, //serial
+ 0, //asset tag
+ ChassisStateUnknown, //boot chassis state
+ ChassisStateSafe, //power supply state
+ ChassisStateSafe, //thermal state
+ ChassisSecurityStatusNone, //security state
+ {0,0,0,0,}, //OEM defined
+ 1, //1U height
+ 1, //number of power cords
+ 0, //no contained elements
+ },
+ TYPE3_STRINGS
+};
+
+// Processor
+STATIC CONST ARM_TYPE4 mArmDefaultType4_a72 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE4), // UINT8 Length
+ SMBIOS_HANDLE_A72_CLUSTER,
+ },
+ 1, //socket type
+ 3, //processor type CPU
+ ProcessorFamilyIndicatorFamily2, //processor family, acquire from field2
+ 2, //manufactuer
+ {{0,},{0.}}, //processor id
+ 5, //version
+ {0,0,0,0,0,1}, //voltage
+ 0, //external clock
+ 1200, //max speed
+ 1200, //current speed
+ 0x41, //status
+ ProcessorUpgradeOther,
+ SMBIOS_HANDLE_A57_L1I, //l1 cache handle
+ SMBIOS_HANDLE_A57_L2, //l2 cache handle
+ 0xFFFF, //l3 cache handle
+ 0, //serial not set
+ 0, //asset not set
+ 8, //part number
+ 2, //core count in socket
+ 2, //enabled core count in socket
+ 0, //threads per socket
+ 0xEC, // processor characteristics
+ ProcessorFamilyARM, //ARM core
+ },
+ TYPE4_STRINGS
+};
+
+STATIC CONST ARM_TYPE4 mArmDefaultType4_a57 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE4), // UINT8 Length
+ SMBIOS_HANDLE_A57_CLUSTER,
+ },
+ 1, //socket type
+ 3, //processor type CPU
+ ProcessorFamilyIndicatorFamily2, //processor family, acquire from field2
+ 2, //manufactuer
+ {{0,},{0.}}, //processor id
+ 3, //version
+ {0,0,0,0,0,1}, //voltage
+ 0, //external clock
+ 1200, //max speed
+ 1200, //current speed
+ 0x41, //status
+ ProcessorUpgradeOther,
+ SMBIOS_HANDLE_A57_L1I, //l1 cache handle
+ SMBIOS_HANDLE_A57_L2, //l2 cache handle
+ 0xFFFF, //l3 cache handle
+ 0, //serial not set
+ 0, //asset not set
+ 7, //part number
+ 2, //core count in socket
+ 2, //enabled core count in socket
+ 0, //threads per socket
+ 0xEC, // processor characteristics
+ ProcessorFamilyARM, //ARM core
+ },
+ TYPE4_STRINGS
+};
+
+STATIC CONST ARM_TYPE4 mArmDefaultType4_a53 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PROCESSOR_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE4), // UINT8 Length
+ SMBIOS_HANDLE_A53_CLUSTER,
+ },
+ 1, //socket type
+ 3, //processor type CPU
+ ProcessorFamilyIndicatorFamily2, //processor family, acquire from field2
+ 2, //manufactuer
+ {{0,},{0.}}, //processor id
+ 4, //version
+ {0,0,0,0,0,1}, //voltage
+ 0, //external clock
+ 650, //max speed
+ 650, //current speed
+ 0x41, //status
+ ProcessorUpgradeOther,
+ SMBIOS_HANDLE_A53_L1I, //l1 cache handle
+ SMBIOS_HANDLE_A53_L2, //l2 cache handle
+ 0xFFFF, //l3 cache handle
+ 0, //serial not set
+ 0, //asset not set
+ 6, //part number
+ 4, //core count in socket
+ 4, //enabled core count in socket
+ 0, //threads per socket
+ 0xEC, // processor characteristics
+ ProcessorFamilyARM, //ARM core
+ },
+ TYPE4_STRINGS
+};
+
+// Cache
+STATIC CONST ARM_TYPE7 mArmDefaultType7_a57_l1i = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_A57_L1I,
+ },
+ 1,
+ 0x380, //L1 enabled, unknown WB
+ 48, //48k i cache max
+ 48, //48k installed
+ {0,1}, //SRAM type
+ {0,1}, //SRAM type
+ 0, //unkown speed
+ CacheErrorParity, //parity checking
+ CacheTypeInstruction, //instruction cache
+ CacheAssociativityOther, //three way
+ },
+ TYPE7_STRINGS
+};
+
+STATIC CONST ARM_TYPE7 mArmDefaultType7_a53_l1i = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_A53_L1I,
+ },
+ 1,
+ 0x380, //L1 enabled, unknown WB
+ 32, //32k i cache max
+ 32, //32k installed
+ {0,1}, //SRAM type
+ {0,1}, //SRAM type
+ 0, //unkown speed
+ CacheErrorParity, //parity checking
+ CacheTypeInstruction, //instruction cache
+ CacheAssociativity2Way, //two way
+ },
+ TYPE7_STRINGS
+};
+
+STATIC CONST ARM_TYPE7 mArmDefaultType7_a57_l1d = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_A57_L1D,
+ },
+ 2,
+ 0x180, //L1 enabled, WB
+ 32, //32k d cache max
+ 32, //32k installed
+ {0,1}, //SRAM type
+ {0,1}, //SRAM type
+ 0, //unkown speed
+ CacheErrorSingleBit, //ECC checking
+ CacheTypeData, //instruction cache
+ CacheAssociativity2Way, //two way associative
+ },
+ TYPE7_STRINGS
+};
+
+STATIC CONST ARM_TYPE7 mArmDefaultType7_a53_l1d = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_A53_L1D,
+ },
+ 2,
+ 0x180, //L1 enabled, WB
+ 32, //32k d cache max
+ 32, //32k installed
+ {0,1}, //SRAM type
+ {0,1}, //SRAM type
+ 0, //unkown speed
+ CacheErrorSingleBit, //ECC checking
+ CacheTypeData, //instruction cache
+ CacheAssociativity4Way, //four way associative
+ },
+ TYPE7_STRINGS
+};
+
+STATIC CONST ARM_TYPE7 mArmDefaultType7_a57_l2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_A57_L2,
+ },
+ 3,
+ 0x181, //L2 enabled, WB
+ 2048, //2M d cache max
+ 2048, //2M installed
+ {0,1}, //SRAM type
+ {0,1}, //SRAM type
+ 0, //unkown speed
+ CacheErrorSingleBit, //ECC checking
+ CacheTypeUnified, //instruction cache
+ CacheAssociativity16Way, //16 way associative
+ },
+ TYPE7_STRINGS
+};
+
+STATIC CONST ARM_TYPE7 mArmDefaultType7_a53_l2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_CACHE_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE7), // UINT8 Length
+ SMBIOS_HANDLE_A53_L2,
+ },
+ 3,
+ 0x181, //L2 enabled, WB
+ 1024, //1M D cache max
+ 1024, //1M installed
+ {0,1}, //SRAM type
+ {0,1}, //SRAM type
+ 0, //unkown speed
+ CacheErrorSingleBit, //ECC checking
+ CacheTypeUnified, //instruction cache
+ CacheAssociativity16Way, //16 way associative
+ },
+ TYPE7_STRINGS
+};
+
+// Slots
+STATIC CONST ARM_TYPE9 mArmDefaultType9_0 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 1, //slot 0
+ SlotTypePciExpressGen2X4,
+ SlotDataBusWidth1X,
+ SlotUsageUnknown,
+ SlotLengthShort,
+ 0,
+ {1}, //unknown
+ {1,0,1}, //PME and SMBUS
+ 0,
+ 2,
+ 1,
+ },
+ TYPE9_STRINGS
+};
+
+STATIC CONST ARM_TYPE9 mArmDefaultType9_1 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 1, //slot 0
+ SlotTypePciExpressGen2X4,
+ SlotDataBusWidth1X,
+ SlotUsageUnknown,
+ SlotLengthShort,
+ 0,
+ {1},
+ {1,0,1}, //PME and SMBUS
+ 0,
+ 2,
+ 2,
+ },
+ TYPE9_STRINGS
+};
+
+STATIC CONST ARM_TYPE9 mArmDefaultType9_2 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 1, //slot 0
+ SlotTypePciExpressGen2X8,
+ SlotDataBusWidth4X,
+ SlotUsageUnknown,
+ SlotLengthShort,
+ 0,
+ {1},
+ {1,0,1}, //PME and SMBUS
+ 0,
+ 2,
+ 3,
+ },
+ TYPE9_STRINGS
+};
+
+STATIC CONST ARM_TYPE9 mArmDefaultType9_3 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_SLOTS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE9), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 1, //slot 0
+ SlotTypePciExpressGen2X16,
+ SlotDataBusWidth4X,
+ SlotUsageUnknown,
+ SlotLengthShort,
+ 0,
+ {1},
+ {1,0,1}, //PME and SMBUS
+ 0,
+ 2,
+ 0xc,
+ },
+ TYPE9_STRINGS
+};
+
+// Memory array
+STATIC CONST ARM_TYPE16 mArmDefaultType16 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE16), // UINT8 Length
+ SMBIOS_HANDLE_MEMORY,
+ },
+ MemoryArrayLocationSystemBoard, //on motherboard
+ MemoryArrayUseSystemMemory, //system RAM
+ MemoryErrorCorrectionNone, //Juno doesn't have ECC RAM
+ 0x800000, //8GB
+ 0xFFFE, //No error information structure
+ 0x1, //soldered memory
+ },
+ TYPE16_STRINGS
+};
+
+// Memory device
+STATIC CONST ARM_TYPE17 mArmDefaultType17 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_MEMORY_DEVICE, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE17), // UINT8 Length
+ SMBIOS_HANDLE_DIMM,
+ },
+ SMBIOS_HANDLE_MEMORY, //array to which this module belongs
+ 0xFFFE, //no errors
+ 64, //single DIMM, no ECC is 64bits (for ecc this would be 72)
+ 64, //data width of this device (64-bits)
+ 0x2000, //8GB
+ 0x0B, //row of chips
+ 0, //not part of a set
+ 1, //right side of board
+ 2, //bank 0
+// MemoryTypeLpddr3, //LP DDR3, isn't defined yet
+ MemoryTypeDdr3, //LP DDR3
+ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,1}, //unbuffered
+ 1600, //1600Mhz DDR
+ 0, //varies between diffrent production runs
+ 0, //serial
+ 0, //asset tag
+ 0, //part number
+ 0, //rank
+ },
+ TYPE17_STRINGS
+};
+
+// Memory array mapped address, this structure
+// is overridden by InstallMemoryStructure
+STATIC CONST ARM_TYPE19 mArmDefaultType19 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE19), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ 0xFFFFFFFF, //invalid, look at extended addr field
+ 0xFFFFFFFF,
+ SMBIOS_HANDLE_DIMM, //handle
+ 1,
+ 0x080000000, //starting addr of first 2GB
+ 0x100000000, //ending addr of first 2GB
+ },
+ TYPE19_STRINGS
+};
+
+// System boot info
+STATIC CONST ARM_TYPE32 mArmDefaultType32 = {
+ {
+ { // SMBIOS_STRUCTURE Hdr
+ EFI_SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION, // UINT8 Type
+ sizeof (SMBIOS_TABLE_TYPE32), // UINT8 Length
+ SMBIOS_HANDLE_PI_RESERVED,
+ },
+ {0,0,0,0,0,0}, //reserved
+ BootInformationStatusNoError,
+ },
+ TYPE32_STRINGS
+};
+
+STATIC CONST VOID *DefaultCommonTables[]=
+{
+ &mArmDefaultType0,
+ &mArmDefaultType1,
+ &mArmDefaultType2,
+ &mArmDefaultType3,
+ &mArmDefaultType7_a53_l1i,
+ &mArmDefaultType7_a53_l1d,
+ &mArmDefaultType7_a53_l2,
+ &mArmDefaultType4_a53,
+ &mArmDefaultType9_0,
+ &mArmDefaultType9_1,
+ &mArmDefaultType9_2,
+ &mArmDefaultType9_3,
+ &mArmDefaultType16,
+ &mArmDefaultType17,
+// &mArmDefaultType19, //memory range type 19 dynamically generated
+ &mArmDefaultType32,
+ NULL
+};
+
+STATIC CONST VOID *DefaultTablesR0R1[]=
+{
+ &mArmDefaultType7_a57_l1i,
+ &mArmDefaultType7_a57_l1d,
+ &mArmDefaultType7_a57_l2,
+ &mArmDefaultType4_a57,
+ NULL
+};
+
+STATIC CONST VOID *DefaultTablesR2[]=
+{
+ &mArmDefaultType7_a57_l1i, // Cache layout is the same on the A72 vs A57
+ &mArmDefaultType7_a57_l1d,
+ &mArmDefaultType7_a57_l2,
+ &mArmDefaultType4_a72,
+ NULL
+};
+
+
+/**
+ Installs a memory descriptor (type19) for the given address range
+
+ @param Smbios SMBIOS protocol
+
+**/
+EFI_STATUS
+InstallMemoryStructure (
+ IN EFI_SMBIOS_PROTOCOL *Smbios,
+ IN UINT64 StartingAddress,
+ IN UINT64 RegionLength
+ )
+{
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+ ARM_TYPE19 MemoryDescriptor;
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ CopyMem( &MemoryDescriptor, &mArmDefaultType19, sizeof(ARM_TYPE19));
+
+ MemoryDescriptor.Base.ExtendedStartingAddress = StartingAddress;
+ MemoryDescriptor.Base.ExtendedEndingAddress = StartingAddress+RegionLength;
+ SmbiosHandle = MemoryDescriptor.Base.Hdr.Handle;
+
+ Status = Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER*) &MemoryDescriptor
+ );
+ return Status;
+}
+
+/**
+ Install a whole table worth of structructures
+
+ @parm
+**/
+EFI_STATUS
+InstallStructures (
+ IN EFI_SMBIOS_PROTOCOL *Smbios,
+ IN CONST VOID *DefaultTables[]
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ EFI_SMBIOS_HANDLE SmbiosHandle;
+
+ int TableEntry;
+ for ( TableEntry=0; DefaultTables[TableEntry] != NULL; TableEntry++)
+ {
+ SmbiosHandle = ((EFI_SMBIOS_TABLE_HEADER*)DefaultTables[TableEntry])->Handle;
+ Status = Smbios->Add (
+ Smbios,
+ NULL,
+ &SmbiosHandle,
+ (EFI_SMBIOS_TABLE_HEADER*) DefaultTables[TableEntry]
+ );
+ if (EFI_ERROR(Status))
+ break;
+ }
+ return Status;
+}
+
+
+/**
+ Install all structures from the DefaultTables structure
+
+ @param Smbios SMBIOS protocol
+
+**/
+EFI_STATUS
+InstallAllStructures (
+ IN EFI_SMBIOS_PROTOCOL *Smbios
+ )
+{
+ EFI_STATUS Status = EFI_SUCCESS;
+ UINT32 JunoRevision;
+ VOID *ExtraTables = DefaultTablesR0R1;
+
+ GetJunoRevision(JunoRevision);
+
+ // Fixup some table values
+ mArmDefaultType0.Base.SystemBiosMajorRelease = (PcdGet32 ( PcdFirmwareRevision ) >> 16) & 0xFF;
+ mArmDefaultType0.Base.SystemBiosMinorRelease = PcdGet32 ( PcdFirmwareRevision ) & 0xFF;
+ if ( JunoRevision == JUNO_REVISION_R1 )
+ {
+ mArmDefaultType2.Base.Version = 6;
+ }
+ else if ( JunoRevision == JUNO_REVISION_R2 )
+ {
+ mArmDefaultType2.Base.Version = 7;
+ ExtraTables=DefaultTablesR2;
+ }
+
+ //
+ // Add all Juno table entries
+ //
+ Status=InstallStructures (Smbios,DefaultCommonTables);
+ ASSERT_EFI_ERROR (Status);
+
+ Status=InstallStructures (Smbios,ExtraTables);
+ ASSERT_EFI_ERROR (Status);
+
+ // Generate memory descriptors for the two memory ranges we know about
+ Status = InstallMemoryStructure ( Smbios, PcdGet64 (PcdSystemMemoryBase), PcdGet64 (PcdSystemMemorySize));
+ ASSERT_EFI_ERROR (Status);
+ Status = InstallMemoryStructure ( Smbios, ARM_JUNO_EXTRA_SYSTEM_MEMORY_BASE, ARM_JUNO_EXTRA_SYSTEM_MEMORY_SZ);
+ ASSERT_EFI_ERROR (Status);
+
+ return Status;
+}
+
+/**
+ Installs SMBIOS information for ARM platforms
+
+ @param ImageHandle Module's image handle
+ @param SystemTable Pointer of EFI_SYSTEM_TABLE
+
+ @retval EFI_SUCCESS Smbios data successfully installed
+ @retval Other Smbios data was not installed
+
+**/
+EFI_STATUS
+EFIAPI
+SmbiosTablePublishEntry (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ )
+{
+ EFI_STATUS Status;
+ EFI_SMBIOS_PROTOCOL *Smbios;
+
+ //
+ // Find the SMBIOS protocol
+ //
+ Status = gBS->LocateProtocol (
+ &gEfiSmbiosProtocolGuid,
+ NULL,
+ (VOID**)&Smbios
+ );
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+
+ Status = InstallAllStructures (Smbios);
+
+ return Status;
+}
diff --git a/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
new file mode 100644
index 0000000..457e1ff
--- /dev/null
+++ b/Platforms/ARM/Juno/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
@@ -0,0 +1,68 @@
+## @file
+# This driver installs SMBIOS information for ArmJuno
+#
+# Copyright (c) 2011, Bei Guan <gbtju85@gmail.com>
+# Copyright (c) 2011, Intel Corporation. All rights reserved.
+# Copyright (c) 2015, ARM Limited. All rights reserved.
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = SmbiosPlatformDxe
+ FILE_GUID = 4110465d-5ff3-4f4b-b580-24ed0d06747a
+ MODULE_TYPE = DXE_DRIVER
+ VERSION_STRING = 1.0
+
+ ENTRY_POINT = SmbiosTablePublishEntry
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = AARCH64
+#
+
+[Sources]
+ SmbiosPlatformDxe.c
+
+[Packages]
+ ArmPkg/ArmPkg.dec
+ ArmPlatformPkg/ArmPlatformPkg.dec
+ ArmPlatformPkg/ArmJunoPkg/ArmJuno.dec
+ MdeModulePkg/MdeModulePkg.dec
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ ArmLib
+ BaseMemoryLib
+ BaseLib
+ DebugLib
+ HobLib
+ IoLib
+ MemoryAllocationLib
+ PcdLib
+ UefiBootServicesTableLib
+ UefiDriverEntryPoint
+
+[Guids]
+ gEfiGlobalVariableGuid
+
+[FixedPcd]
+ gArmTokenSpaceGuid.PcdSystemMemoryBase
+ gArmTokenSpaceGuid.PcdSystemMemorySize
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFirmwareRevision
+
+[Protocols]
+ gEfiSmbiosProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+
+[Guids]
+
+[Depex]
+ gEfiSmbiosProtocolGuid
--
2.5.5


[Patch] Vlv2TbltDevicePkg:Signal EndOfDxe Event.

lushifex <shifeix.a.lu@...>
 

According to PI spec,EndOfDxe Event should be signaled
before DxeSmmReadyToLock protocol installation.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
---
Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c | 7 ++++++-
Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf | 3 ++-
2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
index 195d734..82ad974 100644
--- a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
+++ b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
@@ -1,8 +1,8 @@
/** @file

- Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>


This program and the accompanying materials are licensed and made available under

the terms and conditions of the BSD License that accompanies this distribution.

The full text of the license may be found at

http://opensource.org/licenses/bsd-license.php.

@@ -224,10 +224,15 @@ PlatformBdsInit (
)
{
EFI_STATUS Status;
EFI_EVENT ShellImageEvent;
EFI_GUID ShellEnvProtocol = SHELL_ENVIRONMENT_INTERFACE_PROTOCOL;
+
+ //
+ // Signal EndOfDxe PI Event
+ //
+ EfiEventGroupSignal (&gEfiEndOfDxeEventGroupGuid);

#ifdef __GNUC__
SerialPortWrite((UINT8 *)">>>>BdsEntry[GCC]\r\n", 19);
#else
SerialPortWrite((UINT8 *)">>>>BdsEntry\r\n", 14);
diff --git a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
index 45578e8..c64bab9 100644
--- a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
+++ b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
@@ -1,9 +1,9 @@
#/** @file
# Component name for module PlatformBootManagerLib
#
-# Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
#

# This program and the accompanying materials are licensed and made available under

# the terms and conditions of the BSD License that accompanies this distribution.

# The full text of the license may be found at

# http://opensource.org/licenses/bsd-license.php.

@@ -95,10 +95,11 @@
gEfiMemoryTypeInformationGuid
gEfiCapsuleVendorGuid
gEfiGlobalVariableGuid
gEfiNormalSetupGuid
gEfiPartTypeSystemPartGuid
+ gEfiEndOfDxeEventGroupGuid

[Pcd]
gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base
gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase
gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase
--
2.6.2.windows.1


Re: [Patch] Vlv2TbltDevicePkg:Signal EndOfDxe Event.

Lu, ShifeiX A <shifeix.a.lu@...>
 

Thanks Laszlo!
I will follow it.


Shifei

-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Laszlo Ersek
Sent: Friday, July 29, 2016 3:51 PM
To: Wei, David; Lu, ShifeiX A
Cc: edk2-devel@lists.01.org
Subject: Re: [edk2] [Patch] Vlv2TbltDevicePkg:Signal EndOfDxe Event.

On 07/29/16 04:31, Wei, David wrote:
Reviewed-by: David Wei <david.wei@intel.com>



Thanks,
David Wei

Intel SSG BIOS Team
I recommend using the new EfiEventGroupSignal() function from UefiLib instead.

Please refer to the following commits:

ca8f50e88e03 MdePkg/UefiLib: move InternalEmptyFunction to UefiLib.c 772fb7cb13de MdePkg/UefiLib: introduce EfiEventGroupSignal
ff55dd3befb4 IntelFrameworkPkg/FrameworkUefiLib: move InternalEmptyFunction to UefiLib.c
6212b9481d82 IntelFrameworkPkg/FrameworkUefiLib: implement EfiEventGroupSignal dfc9514794fc ArmVirtPkg/PlatformIntelBdsLib: rebase to EfiEventGroupSignal 36e8e6992d0c OvmfPkg/PlatformBdsLib: rebase to EfiEventGroupSignal

Thanks
Laszlo


-----Original Message-----
From: Lu, ShifeiX A
Sent: Friday, July 29, 2016 10:27 AM
To: edk2-devel@lists.01.org
Cc: Wei; Wei, David <david.wei@intel.com>
Subject: [Patch] Vlv2TbltDevicePkg:Signal EndOfDxe Event.

According to PI spec,EndOfDxe Event should be signaled before
DxeSmmReadyToLock protocol installation.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
---
.../Library/PlatformBdsLib/BdsPlatform.c | 37 +++++++++++++++++++++-
.../Library/PlatformBdsLib/PlatformBdsLib.inf | 3 +-
2 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
index 195d734..5df3396 100644
--- a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
+++ b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
@@ -1,8 +1,8 @@
/** @file

- Copyright (c) 2004 - 2015, Intel Corporation. All rights
reserved.<BR>
+ Copyright (c) 2004 - 2016, Intel Corporation. All rights
+ reserved.<BR>


This program and the accompanying materials are licensed and made
available under

the terms and conditions of the BSD License that accompanies this distribution.

The full text of the license may be found at

http://opensource.org/licenses/bsd-license.php.

@@ -203,10 +203,29 @@ ShellImageCallback ( {
BdsSetConsoleMode (TRUE);
DEBUG ((EFI_D_INFO, "BdsEntry ShellImageCallback \n")); }

+/**
+ An empty function to pass error checking of CreateEventEx ().
+
+ @param Event Event whose notification function is being invoked.
+ @param Context Pointer to the notification function's context,
+ which is implementation-dependent.
+
+**/
+STATIC
+VOID
+EFIAPI
+EmptyCallbackFunction (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ return;
+}
+
//
// BDS Platform Functions
//
/**
Platform Bds init. Incude the platform firmware vendor, revision @@
-223,12 +242,28 @@ PlatformBdsInit (
VOID
)
{
EFI_STATUS Status;
EFI_EVENT ShellImageEvent;
+ EFI_EVENT EndOfDxeEvent;
EFI_GUID ShellEnvProtocol = SHELL_ENVIRONMENT_INTERFACE_PROTOCOL;

+ //
+ // Signal EndOfDxe PI Event
+ //
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ EmptyCallbackFunction,
+ NULL,
+ &gEfiEndOfDxeEventGroupGuid,
+ &EndOfDxeEvent
+ );
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (EndOfDxeEvent); }
+
#ifdef __GNUC__
SerialPortWrite((UINT8 *)">>>>BdsEntry[GCC]\r\n", 19);
#else
SerialPortWrite((UINT8 *)">>>>BdsEntry\r\n", 14);
#endif
diff --git
a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
index 45578e8..c64bab9 100644
--- a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
+++ b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
@@ -1,9 +1,9 @@
#/** @file
# Component name for module PlatformBootManagerLib # -# Copyright
(c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2008 - 2016, Intel Corporation. All rights
+reserved.<BR>
#

# This program and the accompanying materials are licensed and made
available under

# the terms and conditions of the BSD License that accompanies this distribution.

# The full text of the license may be found at

# http://opensource.org/licenses/bsd-license.php.

@@ -95,10 +95,11 @@
gEfiMemoryTypeInformationGuid
gEfiCapsuleVendorGuid
gEfiGlobalVariableGuid
gEfiNormalSetupGuid
gEfiPartTypeSystemPartGuid
+ gEfiEndOfDxeEventGroupGuid

[Pcd]
gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base
gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase
gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase
_______________________________________________
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Re: [Patch v3 00/40] MP Initialize Library

Laszlo Ersek
 

On 07/29/16 10:57, Fan, Jeff wrote:
Laszlo,

I sent one evaluate patch for you by adding back GDT table load in CpuDxe. Could you please help to verify if it could fix IA32 S3 issue?
Yes, I'll try to look into it shortly. I'll have to retest the other
cases as well.

Thanks!
Laszlo

Another solution is to remove hardcode from PiSmmCpuDxeSmm driver. But I do not prefer to do it this time. :-)

Thanks!
Jeff

-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Laszlo Ersek
Sent: Thursday, July 28, 2016 11:21 PM
To: Fan, Jeff
Cc: edk2-devel@ml01.01.org
Subject: Re: [edk2] [Patch v3 00/40] MP Initialize Library

On 07/28/16 15:55, Fan, Jeff wrote:
Laszlo,

Many thanks for your verification.

Your dump information and analysis result are very useful. I guess the issue happened at
UefiCpuPkg\PiSmmCpuDxeSmm\Ia32\MpFuncs.nasm:80 a32 jmp dword 0x20:0x0

The Proteted mode CS in current GDT table is not 0x20. But the PiSmmCpuDxeSmm hardcode it to 0x20.
Ah, good point; I recall:

commit 0d4c1db81aab86963536deb8253f35546c4398ea
Author: Michael Kinney <michael.d.kinney@intel.com>
Date: Fri Oct 30 17:32:27 2015 +0000

UefiCpuPkg: CpuDxe: Update GDT to be consistent with DxeIplPeim

as another related patch.

I will try it fix it tomorrow and feedback to you.
Thank you, I'll attempt to test it soon after.

Cheers
Laszlo

-----Original Message-----
From: Laszlo Ersek [mailto:lersek@redhat.com]
Sent: Thursday, July 28, 2016 9:24 PM
To: Fan, Jeff; edk2-devel@ml01.01.org
Subject: Re: [edk2] [Patch v3 00/40] MP Initialize Library

On 07/25/16 04:52, Jeff Fan wrote:
We add MP Initialize Library defined in UefiCpuPkg/Include/Library/MpInitLib.h.
It will provide basic functionalities of MP services and could be
consumed by CPU MP PEI and CPU MP DXE to produce CPU MP PPI and CPU
MP Protocol. Then most of code could be shared between PEI and DXE modules.

PeiMpInitLib and DxeMpInitLib are added to make the CpuMpPei and
CpuDxe more simply.

I also updated the Ovmf Platform and Quark platform to consume MP
Initialize library. I have tested Ovmf platform and have not tested Quark yet.

v3:
1. Update Patch #2, #4 - #8, #28, #33, #36, #38 per Giri's comments to
a. Update SDM date to June, 2016
b. Mention BCD format in CPU_MICROCODE_DATE
c. Rename ProcessorChecksum to Checksum to match SDM.
d. Add whitespace after MpInitLibInitialize
e. Rename MpInitLibSwitchBsp to MpInitLibSwitchBSP to match PI spec.
f. Rename NumApsExecutingLoction to NumApsExecutingLocation
g. Add whitespace after ; in .nasm file
h. Rename *RellocateAp* to *RelocateAp*
2. Update Patch #16, #17, #29-#32 to
a. Use CamelCase for mStopCheckAllApsStatus and CheckAndUpdateApsStatus().
3. Update Patch #36 and #39 to
a. Add PeiMpInitLib instance in UefiCpuPkg.dsc
b. Add DxeMpInitLib instance in UefiCpuPkg.dsc
4. Update Patch #39 and #40 to
a. move the code of consuming MP Initialize library from patch #40 to
patch #39.
5. Update Patch #1, #3 - #8, #16 to
a. Add Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>

I fork the whole tree with the updated v3 patches at
https://github.com/vanjeff/edk2/tree/MpInitLibV3 for review.
I rebased your branch (originally at 09948b72fbb7) on top of current master (= 39dbc4d55347), and built it. It builds fine.

Scenarios that I tested, and seem to work:

* Q35, Ia32, with -D SMM_REQUIRE, 4 VCPUs, Fedora guest:
- normal boot path: pass
- S3 resume: FAIL (see details below)

* i440fx, X64, without -D SMM_REQUIRE, 8 VCPUs, Fedora guest:
- normal boot path: pass
- S3 resume: pass

I re-verified the fix for <https://tianocore.acgmultimedia.com/show_bug.cgi?id=86>, which requires CpuMpPei to actually *work* on both boot paths, and it works fine.

* Q35, Ia32X64, with -D SMM_REQUIRE, 4 VCPUs, Fedora guest:
- normal boot path: pass

On the normal boot path, I also verified that the MTRR setup was consistent across the VCPUs (otherwise Linux would have complained), plus the fix for <https://tianocore.acgmultimedia.com/show_bug.cgi?id=86> was working fine too. I also checked that the UEFI variable services worked, bound to the BSP, and then bound to the first AP as well. (Using the "taskset" Linux command, with "efibootmgr", to list the variables.) I quickly checked that Secure Boot was still recognized by the guest (Fedora) as enabled.

- S3 resume: pass

Repeated the BZ#86 check and the variable access checks from within the resumed guest, all pass.

* Q35, Ia32X64, with -D SMM_REQUIRE, 4 VCPUs, Windows 8.1 guest:
- normal boot path: pass

On the normal boot path, I checked Secure Boot enablement with PowerShell.

- S3 resume: pass.

Now, about the one failure case. QEMU logs the following:

KVM internal error. Suberror: 3
KVM internal error. Suberror: 3
KVM internal error. Suberror: 3
extra data[0]: 80000b0d
extra data[0]: 80000b0d
extra data[1]: 31
extra data[1]: 31
extra data[0]: 80000b0d
extra data[1]: 31

EAX=60000011 EBX=00000000 ECX=00000000 EDX=0009f000
ESI=000000b5 EDI=00000000 EBP=00000000 ESP=00000000
EIP=00000032 EFL=00010006 [-----P-] CPL=0 II=0 A20=1 SMM=0 HLT=0 ES
=9f00 0009f000 0000ffff 00009300 DPL=0 DS16 [-WA] CS =9f00 0009f000
0000ffff 00009b00 DPL=0 CS16 [-RA] SS =9f00 0009f000 0000ffff
00009300
DPL=0 DS16 [-WA] DS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
FS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA] GS =0000
00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT TR =0000 00000000
0000ffff 00008b00 DPL=0 TSS32-busy
GDT= 7f2d8000 00000017
IDT= 7f2d8018 000007ff
CR0=60000011 CR2=00000000 CR3=00000000 CR4=00000000
DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
DR6=ffff0ff0 DR7=00000400
EFER=0000000000000000
Code=00 2e 66 0f 01 1c 31 c0 8e d8 0f 20 c0 66 83 c8 01 0f 22 c0 <66>
67 ea 3b f0 09 00 20 00 66 b8 08 00 66 8e d8 66 8e c0 66 8e e0 66 8e
e8 66 8e d0 89 d6

EAX=60000011 EBX=00000000 ECX=00000000 EDX=0009f000
ESI=000000b5 EDI=00000000 EBP=00000000 ESP=00000000
EIP=00000032 EFL=00010006 [-----P-] CPL=0 II=0 A20=1 SMM=0 HLT=0 ES
=9f00 0009f000 0000ffff 00009300 DPL=0 DS16 [-WA] CS =9f00 0009f000
0000ffff 00009b00 DPL=0 CS16 [-RA] SS =9f00 0009f000 0000ffff
00009300
DPL=0 DS16 [-WA] DS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
FS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA] GS =0000
00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT TR =0000 00000000
0000ffff 00008b00 DPL=0 TSS32-busy
GDT= 7f2d8000 00000017
IDT= 7f2d8018 000007ff
CR0=60000011 CR2=00000000 CR3=00000000 CR4=00000000
DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
DR6=ffff0ff0 DR7=00000400
EFER=0000000000000000
Code=00 2e 66 0f 01 1c 31 c0 8e d8 0f 20 c0 66 83 c8 01 0f 22 c0 <66>
67 ea 3b f0 09 00 20 00 66 b8 08 00 66 8e d8 66 8e c0 66 8e e0 66 8e
e8 66 8e d0 89 d6

EAX=60000011 EBX=00000000 ECX=00000000 EDX=0009f000
ESI=000000b5 EDI=00000000 EBP=00000000 ESP=00000000
EIP=00000032 EFL=00010006 [-----P-] CPL=0 II=0 A20=1 SMM=0 HLT=0 ES
=9f00 0009f000 0000ffff 00009300 DPL=0 DS16 [-WA] CS =9f00 0009f000
0000ffff 00009b00 DPL=0 CS16 [-RA] SS =9f00 0009f000 0000ffff
00009300
DPL=0 DS16 [-WA] DS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
FS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA] GS =0000
00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT TR =0000 00000000
0000ffff 00008b00 DPL=0 TSS32-busy
GDT= 7f2d8000 00000017
IDT= 7f2d8018 000007ff
CR0=60000011 CR2=00000000 CR3=00000000 CR4=00000000
DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
DR6=ffff0ff0 DR7=00000400
EFER=0000000000000000
Code=00 2e 66 0f 01 1c 31 c0 8e d8 0f 20 c0 66 83 c8 01 0f 22 c0 <66>
67 ea 3b f0 09 00 20 00 66 b8 08 00 66 8e d8 66 8e c0 66 8e e0 66 8e
e8 66 8e d0 89 d6
I didn't try to analyze this in depth, but from the hex-encoded instruction stream, it looks like KVM dislikes the 0x66 prefix in front of a JMP instruction (EA, if I recall correctly). Given that this is logged all at once for three processors (out of 4 -- see the description of that test case above), I believe one of the far jumps in the AP mode switching code is incorrect, on the S3 resume path, for Ia32 + SMM.

Perhaps one of the "a32" or "o32" NASM prefixes should be tweaked. Similar examples: <https://www.mail-archive.com/edk2-devel@lists.01.org/msg13258.html>, <https://www.mail-archive.com/edk2-devel@lists.01.org/msg13259.html>.

Thanks!
Laszlo
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Re: [Patch v3 00/40] MP Initialize Library

Fan, Jeff <jeff.fan@...>
 

Laszlo,

I sent one evaluate patch for you by adding back GDT table load in CpuDxe. Could you please help to verify if it could fix IA32 S3 issue?

Another solution is to remove hardcode from PiSmmCpuDxeSmm driver. But I do not prefer to do it this time. :-)

Thanks!
Jeff

-----Original Message-----
From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Laszlo Ersek
Sent: Thursday, July 28, 2016 11:21 PM
To: Fan, Jeff
Cc: edk2-devel@ml01.01.org
Subject: Re: [edk2] [Patch v3 00/40] MP Initialize Library

On 07/28/16 15:55, Fan, Jeff wrote:
Laszlo,

Many thanks for your verification.

Your dump information and analysis result are very useful. I guess the issue happened at
UefiCpuPkg\PiSmmCpuDxeSmm\Ia32\MpFuncs.nasm:80 a32 jmp dword 0x20:0x0

The Proteted mode CS in current GDT table is not 0x20. But the PiSmmCpuDxeSmm hardcode it to 0x20.
Ah, good point; I recall:

commit 0d4c1db81aab86963536deb8253f35546c4398ea
Author: Michael Kinney <michael.d.kinney@intel.com>
Date: Fri Oct 30 17:32:27 2015 +0000

UefiCpuPkg: CpuDxe: Update GDT to be consistent with DxeIplPeim

as another related patch.

I will try it fix it tomorrow and feedback to you.
Thank you, I'll attempt to test it soon after.

Cheers
Laszlo

-----Original Message-----
From: Laszlo Ersek [mailto:lersek@redhat.com]
Sent: Thursday, July 28, 2016 9:24 PM
To: Fan, Jeff; edk2-devel@ml01.01.org
Subject: Re: [edk2] [Patch v3 00/40] MP Initialize Library

On 07/25/16 04:52, Jeff Fan wrote:
We add MP Initialize Library defined in UefiCpuPkg/Include/Library/MpInitLib.h.
It will provide basic functionalities of MP services and could be
consumed by CPU MP PEI and CPU MP DXE to produce CPU MP PPI and CPU
MP Protocol. Then most of code could be shared between PEI and DXE modules.

PeiMpInitLib and DxeMpInitLib are added to make the CpuMpPei and
CpuDxe more simply.

I also updated the Ovmf Platform and Quark platform to consume MP
Initialize library. I have tested Ovmf platform and have not tested Quark yet.

v3:
1. Update Patch #2, #4 - #8, #28, #33, #36, #38 per Giri's comments to
a. Update SDM date to June, 2016
b. Mention BCD format in CPU_MICROCODE_DATE
c. Rename ProcessorChecksum to Checksum to match SDM.
d. Add whitespace after MpInitLibInitialize
e. Rename MpInitLibSwitchBsp to MpInitLibSwitchBSP to match PI spec.
f. Rename NumApsExecutingLoction to NumApsExecutingLocation
g. Add whitespace after ; in .nasm file
h. Rename *RellocateAp* to *RelocateAp*
2. Update Patch #16, #17, #29-#32 to
a. Use CamelCase for mStopCheckAllApsStatus and CheckAndUpdateApsStatus().
3. Update Patch #36 and #39 to
a. Add PeiMpInitLib instance in UefiCpuPkg.dsc
b. Add DxeMpInitLib instance in UefiCpuPkg.dsc
4. Update Patch #39 and #40 to
a. move the code of consuming MP Initialize library from patch #40 to
patch #39.
5. Update Patch #1, #3 - #8, #16 to
a. Add Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>

I fork the whole tree with the updated v3 patches at
https://github.com/vanjeff/edk2/tree/MpInitLibV3 for review.
I rebased your branch (originally at 09948b72fbb7) on top of current master (= 39dbc4d55347), and built it. It builds fine.

Scenarios that I tested, and seem to work:

* Q35, Ia32, with -D SMM_REQUIRE, 4 VCPUs, Fedora guest:
- normal boot path: pass
- S3 resume: FAIL (see details below)

* i440fx, X64, without -D SMM_REQUIRE, 8 VCPUs, Fedora guest:
- normal boot path: pass
- S3 resume: pass

I re-verified the fix for <https://tianocore.acgmultimedia.com/show_bug.cgi?id=86>, which requires CpuMpPei to actually *work* on both boot paths, and it works fine.

* Q35, Ia32X64, with -D SMM_REQUIRE, 4 VCPUs, Fedora guest:
- normal boot path: pass

On the normal boot path, I also verified that the MTRR setup was consistent across the VCPUs (otherwise Linux would have complained), plus the fix for <https://tianocore.acgmultimedia.com/show_bug.cgi?id=86> was working fine too. I also checked that the UEFI variable services worked, bound to the BSP, and then bound to the first AP as well. (Using the "taskset" Linux command, with "efibootmgr", to list the variables.) I quickly checked that Secure Boot was still recognized by the guest (Fedora) as enabled.

- S3 resume: pass

Repeated the BZ#86 check and the variable access checks from within the resumed guest, all pass.

* Q35, Ia32X64, with -D SMM_REQUIRE, 4 VCPUs, Windows 8.1 guest:
- normal boot path: pass

On the normal boot path, I checked Secure Boot enablement with PowerShell.

- S3 resume: pass.

Now, about the one failure case. QEMU logs the following:

KVM internal error. Suberror: 3
KVM internal error. Suberror: 3
KVM internal error. Suberror: 3
extra data[0]: 80000b0d
extra data[0]: 80000b0d
extra data[1]: 31
extra data[1]: 31
extra data[0]: 80000b0d
extra data[1]: 31

EAX=60000011 EBX=00000000 ECX=00000000 EDX=0009f000
ESI=000000b5 EDI=00000000 EBP=00000000 ESP=00000000
EIP=00000032 EFL=00010006 [-----P-] CPL=0 II=0 A20=1 SMM=0 HLT=0 ES
=9f00 0009f000 0000ffff 00009300 DPL=0 DS16 [-WA] CS =9f00 0009f000
0000ffff 00009b00 DPL=0 CS16 [-RA] SS =9f00 0009f000 0000ffff
00009300
DPL=0 DS16 [-WA] DS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
FS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA] GS =0000
00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT TR =0000 00000000
0000ffff 00008b00 DPL=0 TSS32-busy
GDT= 7f2d8000 00000017
IDT= 7f2d8018 000007ff
CR0=60000011 CR2=00000000 CR3=00000000 CR4=00000000
DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
DR6=ffff0ff0 DR7=00000400
EFER=0000000000000000
Code=00 2e 66 0f 01 1c 31 c0 8e d8 0f 20 c0 66 83 c8 01 0f 22 c0 <66>
67 ea 3b f0 09 00 20 00 66 b8 08 00 66 8e d8 66 8e c0 66 8e e0 66 8e
e8 66 8e d0 89 d6

EAX=60000011 EBX=00000000 ECX=00000000 EDX=0009f000
ESI=000000b5 EDI=00000000 EBP=00000000 ESP=00000000
EIP=00000032 EFL=00010006 [-----P-] CPL=0 II=0 A20=1 SMM=0 HLT=0 ES
=9f00 0009f000 0000ffff 00009300 DPL=0 DS16 [-WA] CS =9f00 0009f000
0000ffff 00009b00 DPL=0 CS16 [-RA] SS =9f00 0009f000 0000ffff
00009300
DPL=0 DS16 [-WA] DS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
FS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA] GS =0000
00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT TR =0000 00000000
0000ffff 00008b00 DPL=0 TSS32-busy
GDT= 7f2d8000 00000017
IDT= 7f2d8018 000007ff
CR0=60000011 CR2=00000000 CR3=00000000 CR4=00000000
DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
DR6=ffff0ff0 DR7=00000400
EFER=0000000000000000
Code=00 2e 66 0f 01 1c 31 c0 8e d8 0f 20 c0 66 83 c8 01 0f 22 c0 <66>
67 ea 3b f0 09 00 20 00 66 b8 08 00 66 8e d8 66 8e c0 66 8e e0 66 8e
e8 66 8e d0 89 d6

EAX=60000011 EBX=00000000 ECX=00000000 EDX=0009f000
ESI=000000b5 EDI=00000000 EBP=00000000 ESP=00000000
EIP=00000032 EFL=00010006 [-----P-] CPL=0 II=0 A20=1 SMM=0 HLT=0 ES
=9f00 0009f000 0000ffff 00009300 DPL=0 DS16 [-WA] CS =9f00 0009f000
0000ffff 00009b00 DPL=0 CS16 [-RA] SS =9f00 0009f000 0000ffff
00009300
DPL=0 DS16 [-WA] DS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
FS =0000 00000000 0000ffff 00009300 DPL=0 DS16 [-WA] GS =0000
00000000 0000ffff 00009300 DPL=0 DS16 [-WA]
LDT=0000 00000000 0000ffff 00008200 DPL=0 LDT TR =0000 00000000
0000ffff 00008b00 DPL=0 TSS32-busy
GDT= 7f2d8000 00000017
IDT= 7f2d8018 000007ff
CR0=60000011 CR2=00000000 CR3=00000000 CR4=00000000
DR0=00000000 DR1=00000000 DR2=00000000 DR3=00000000
DR6=ffff0ff0 DR7=00000400
EFER=0000000000000000
Code=00 2e 66 0f 01 1c 31 c0 8e d8 0f 20 c0 66 83 c8 01 0f 22 c0 <66>
67 ea 3b f0 09 00 20 00 66 b8 08 00 66 8e d8 66 8e c0 66 8e e0 66 8e
e8 66 8e d0 89 d6
I didn't try to analyze this in depth, but from the hex-encoded instruction stream, it looks like KVM dislikes the 0x66 prefix in front of a JMP instruction (EA, if I recall correctly). Given that this is logged all at once for three processors (out of 4 -- see the description of that test case above), I believe one of the far jumps in the AP mode switching code is incorrect, on the S3 resume path, for Ia32 + SMM.

Perhaps one of the "a32" or "o32" NASM prefixes should be tweaked. Similar examples: <https://www.mail-archive.com/edk2-devel@lists.01.org/msg13258.html>, <https://www.mail-archive.com/edk2-devel@lists.01.org/msg13259.html>.

Thanks!
Laszlo
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https://lists.01.org/mailman/listinfo/edk2-devel


Re: OVMF and passed usb 3. controller

Eugene Chekanskiy <echekanskiy@...>
 

Thanks a lot for reply, guys. Bios form https://www.kraxel.org rly helped
and my keyboard working fine.

Thanks,
Eugene.

2016-07-26 4:36 GMT+03:00 Tian, Feng <feng.tian@intel.com>:

If the renesas usb 3.0 host controller follows XHCI spec, then EDKII XHCI
driver could be used to manage it.

Thanks
Feng

-----Original Message-----
From: Laszlo Ersek [mailto:lersek@redhat.com]
Sent: Monday, July 25, 2016 5:07 PM
To: Eugene Chekanskiy <echekanskiy@gmail.com>; edk2-devel@ml01.01.org
Cc: Gerd Hoffmann <kraxel@redhat.com>; Tian, Feng <feng.tian@intel.com>;
Alex Williamson <alex.williamson@redhat.com>
Subject: Re: [edk2] OVMF and passed usb 3. controller

On 07/22/16 15:25, Eugene Chekanskiy wrote:
Hello everyone. Just wondering if default builds of ovmf form
http://www.tianocore.org/ovmf/ has support of renesas usb 3.0
controller and if we can enable it in custom build.
First, please don't use the binary from <http://www.tianocore.org/ovmf>.
It is incredibly old (Feb 9 2014). Instead, I recommend <
http://www.kraxel.org/repos/> for anything "bleeding edge".

(Unless you are willing to build your own OVMF, of course, in which case I
recommend that instead).

Second, OVMF includes the "MdeModulePkg/Bus/Pci/XhciDxe" driver. I assume
you assign your Renesas host controller to the virtual machine; is that
right? If your host controller is supported by XhciDxe otherwise (IOW it
would work in a purely physical setup), then I think it should work with
device assignment as well.

CC: Gerd for owning kraxel.org and for USB knowledge
CC: Feng for maintaining XhciDxe
CC: Alex for any possible quirks with USB host controller assignment

Thanks
Laszlo


[patch] BaseTool/UPT: Add Test Install

hesschen <hesheng.chen@...>
 

Add a new function to test if a DIST file list
one by one to see if they can meet the requirement
of Dependency.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: hesschen <hesheng.chen@intel.com>
---
.../Source/Python/UPT/Core/DependencyRules.py | 21 ++++-
BaseTools/Source/Python/UPT/Logger/StringTable.py | 5 ++
BaseTools/Source/Python/UPT/TestInstall.py | 100 +++++++++++++++++++++
BaseTools/Source/Python/UPT/UPT.py | 16 ++++
4 files changed, 141 insertions(+), 1 deletion(-)
create mode 100644 BaseTools/Source/Python/UPT/TestInstall.py

diff --git a/BaseTools/Source/Python/UPT/Core/DependencyRules.py b/BaseTools/Source/Python/UPT/Core/DependencyRules.py
index 4608ed6..ee06c53 100644
--- a/BaseTools/Source/Python/UPT/Core/DependencyRules.py
+++ b/BaseTools/Source/Python/UPT/Core/DependencyRules.py
@@ -1,7 +1,7 @@
## @file
# This file is for installed package information database operations
#
-# Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available
# under the terms and conditions of the BSD License which accompanies this
@@ -183,6 +183,25 @@ class DependencyRules(object):
def CheckInstallDpDepexSatisfied(self, DpObj):
self.PkgsToBeDepend = [(PkgInfo[1], PkgInfo[2]) for PkgInfo in self.WsPkgList]
return self.CheckDpDepexSatisfied(DpObj)
+
+ # # Check whether multiple DP depex satisfied by current workspace for Install
+ #
+ # @param DpObjList: A distribution object list
+ # @return: True if distribution depex satisfied
+ # False else
+ #
+ def CheckTestInstallPdDepexSatisfied(self, DpObjList):
+ self.PkgsToBeDepend = [(PkgInfo[1], PkgInfo[2]) for PkgInfo in self.WsPkgList]
+ for DpObj in DpObjList:
+ if self.CheckDpDepexSatisfied(DpObj):
+ for PkgKey in DpObj.PackageSurfaceArea.keys():
+ PkgObj = DpObj.PackageSurfaceArea[PkgKey]
+ self.PkgsToBeDepend.append((PkgObj.Guid, PkgObj.Version))
+ else:
+ return False, DpObj
+
+ return True, DpObj
+

## Check whether a DP depex satisfied by current workspace
# (excluding the original distribution's packages to be replaced) for Replace
diff --git a/BaseTools/Source/Python/UPT/Logger/StringTable.py b/BaseTools/Source/Python/UPT/Logger/StringTable.py
index 96f0e1c..4c42661 100644
--- a/BaseTools/Source/Python/UPT/Logger/StringTable.py
+++ b/BaseTools/Source/Python/UPT/Logger/StringTable.py
@@ -858,3 +858,8 @@ HLP_SPECIFY_PACKAGE_NAME_TO_BE_REPLACED = _(
"Specify the UEFI Distribution Package file name to be replaced")
HLP_USE_GUIDED_PATHS = _(
"Install packages to the following directory path by default: <PackageName>_<PACKAGE_GUID>_<PACKAGE_VERSION>")
+HLP_TEST_INSTALL = _(
+ "Specify the UEFI Distribution Package filenames to install")
+
+MSG_TEST_INSTALL_PASS = _("All distribution package file are satisfied for dependence check.")
+MSG_TEST_INSTALL_FAIL = _("NOT all distribution package file are satisfied for dependence check.")
diff --git a/BaseTools/Source/Python/UPT/TestInstall.py b/BaseTools/Source/Python/UPT/TestInstall.py
new file mode 100644
index 0000000..71fe928
--- /dev/null
+++ b/BaseTools/Source/Python/UPT/TestInstall.py
@@ -0,0 +1,100 @@
+# # @file
+# Test Install distribution package
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials are licensed and made available
+# under the terms and conditions of the BSD License which accompanies this
+# distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+"""
+Test Install multiple distribution package
+"""
+# #
+# Import Modules
+#
+from Library import GlobalData
+import Logger.Log as Logger
+from Logger import StringTable as ST
+import Logger.ToolError as TE
+from Core.DependencyRules import DependencyRules
+from InstallPkg import UnZipDp
+
+import shutil
+from traceback import format_exc
+from platform import python_version
+from sys import platform
+
+# # Tool entrance method
+#
+# This method mainly dispatch specific methods per the command line options.
+# If no error found, return zero value so the caller of this tool can know
+# if it's executed successfully or not.
+#
+# @param Options: command Options
+#
+def Main(Options=None):
+ ContentZipFile, DistFile = None, None
+ ReturnCode = 0
+
+ try:
+ DataBase = GlobalData.gDB
+ WorkspaceDir = GlobalData.gWORKSPACE
+ if not Options.DistFiles:
+ Logger.Error("TestInstallPkg", TE.OPTION_MISSING, ExtraData=ST.ERR_SPECIFY_PACKAGE)
+
+ DistPkgList = []
+ for DistFile in Options.DistFiles:
+ DistPkg, ContentZipFile, __, DistFile = UnZipDp(WorkspaceDir, DistFile)
+ DistPkgList.append(DistPkg)
+
+ #
+ # check dependency
+ #
+ Dep = DependencyRules(DataBase)
+ Result = True
+ DpObj = None
+ try:
+ Result, DpObj = Dep.CheckTestInstallPdDepexSatisfied(DistPkgList)
+ except:
+ Result = False
+
+ if Result:
+ Logger.Quiet(ST.MSG_TEST_INSTALL_PASS)
+ else:
+ Logger.Quiet(ST.MSG_TEST_INSTALL_FAIL)
+
+ except TE.FatalError, XExcept:
+ ReturnCode = XExcept.args[0]
+ if Logger.GetLevel() <= Logger.DEBUG_9:
+ Logger.Quiet(ST.MSG_PYTHON_ON % (python_version(), platform) + format_exc())
+
+ except Exception, x:
+ ReturnCode = TE.CODE_ERROR
+ Logger.Error(
+ "\nTestInstallPkg",
+ TE.CODE_ERROR,
+ ST.ERR_UNKNOWN_FATAL_INSTALL_ERR % Options.DistFiles,
+ ExtraData=ST.MSG_SEARCH_FOR_HELP,
+ RaiseError=False
+ )
+ Logger.Quiet(ST.MSG_PYTHON_ON % (python_version(), platform) + format_exc())
+
+ finally:
+ Logger.Quiet(ST.MSG_REMOVE_TEMP_FILE_STARTED)
+ if DistFile:
+ DistFile.Close()
+ if ContentZipFile:
+ ContentZipFile.Close()
+ if GlobalData.gUNPACK_DIR:
+ shutil.rmtree(GlobalData.gUNPACK_DIR)
+ GlobalData.gUNPACK_DIR = None
+ Logger.Quiet(ST.MSG_REMOVE_TEMP_FILE_DONE)
+ if ReturnCode == 0:
+ Logger.Quiet(ST.MSG_FINISH)
+ return ReturnCode
+
diff --git a/BaseTools/Source/Python/UPT/UPT.py b/BaseTools/Source/Python/UPT/UPT.py
index 59c4a88..8dd949a 100644
--- a/BaseTools/Source/Python/UPT/UPT.py
+++ b/BaseTools/Source/Python/UPT/UPT.py
@@ -46,6 +46,7 @@ import InstallPkg
import RmPkg
import InventoryWs
import ReplacePkg
+import TestInstall
from Library.Misc import GetWorkspace
from Library import GlobalData
from Core.IpiDb import IpiDatabase
@@ -69,6 +70,9 @@ def CheckConflictOption(Opt):
Logger.Error("UPT", OPTION_CONFLICT, ExtraData=ST.ERR_I_R_EXCLUSIVE)
elif Opt.PackFileToCreate and Opt.PackFileToRemove:
Logger.Error("UPT", OPTION_CONFLICT, ExtraData=ST.ERR_C_R_EXCLUSIVE)
+ elif Opt.TestDistFiles and (Opt.PackFileToCreate or Opt.PackFileToInstall \
+ or Opt.PackFileToRemove or Opt.PackFileToReplace):
+ Logger.Error("UPT", OPTION_CONFLICT, ExtraData=ST.ERR_C_R_EXCLUSIVE)

if Opt.CustomPath and Opt.UseGuidedPkgPath:
Logger.Warn("UPT", ST.WARN_CUSTOMPATH_OVERRIDE_USEGUIDEDPATH)
@@ -146,6 +150,9 @@ def Main():

Parser.add_option("--use-guided-paths", action="store_true", dest="Use_Guided_Paths", help=ST.HLP_USE_GUIDED_PATHS)

+ Parser.add_option("-j", "--test-install", action="append", type="string",
+ dest="Test_Install_Distribution_Package_Files", help=ST.HLP_TEST_INSTALL)
+
Opt = Parser.parse_args()[0]

Var2Var = [
@@ -159,6 +166,7 @@ def Main():
("PackFileToReplace", Opt.Replace_Distribution_Package_File),
("PackFileToBeReplaced", Opt.Original_Distribution_Package_File),
("UseGuidedPkgPath", Opt.Use_Guided_Paths),
+ ("TestDistFiles", Opt.Test_Install_Distribution_Package_Files)
]

for Var in Var2Var:
@@ -265,6 +273,14 @@ def Main():
Opt.PackFileToReplace = AbsPath
RunModule = ReplacePkg.Main

+ elif Opt.Test_Install_Distribution_Package_Files:
+ for Dist in Opt.Test_Install_Distribution_Package_Files:
+ if not Dist.endswith('.dist'):
+ Logger.Error("TestInstall", FILE_TYPE_MISMATCH, ExtraData=ST.ERR_DIST_EXT_ERROR % Dist)
+
+ setattr(Opt, 'DistFiles', Opt.Test_Install_Distribution_Package_Files)
+ RunModule = TestInstall.Main
+
else:
Parser.print_usage()
return OPTION_MISSING
--
2.7.2.windows.1


Re: [Patch] Vlv2TbltDevicePkg:Signal EndOfDxe Event.

Laszlo Ersek
 

On 07/29/16 04:31, Wei, David wrote:
Reviewed-by: David Wei <david.wei@intel.com>



Thanks,
David Wei

Intel SSG BIOS Team
I recommend using the new EfiEventGroupSignal() function from UefiLib instead.

Please refer to the following commits:

ca8f50e88e03 MdePkg/UefiLib: move InternalEmptyFunction to UefiLib.c
772fb7cb13de MdePkg/UefiLib: introduce EfiEventGroupSignal
ff55dd3befb4 IntelFrameworkPkg/FrameworkUefiLib: move InternalEmptyFunction to UefiLib.c
6212b9481d82 IntelFrameworkPkg/FrameworkUefiLib: implement EfiEventGroupSignal
dfc9514794fc ArmVirtPkg/PlatformIntelBdsLib: rebase to EfiEventGroupSignal
36e8e6992d0c OvmfPkg/PlatformBdsLib: rebase to EfiEventGroupSignal

Thanks
Laszlo


-----Original Message-----
From: Lu, ShifeiX A
Sent: Friday, July 29, 2016 10:27 AM
To: edk2-devel@lists.01.org
Cc: Wei; Wei, David <david.wei@intel.com>
Subject: [Patch] Vlv2TbltDevicePkg:Signal EndOfDxe Event.

According to PI spec,EndOfDxe Event should be signaled
before DxeSmmReadyToLock protocol installation.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: lushifex <shifeix.a.lu@intel.com>
---
.../Library/PlatformBdsLib/BdsPlatform.c | 37 +++++++++++++++++++++-
.../Library/PlatformBdsLib/PlatformBdsLib.inf | 3 +-
2 files changed, 38 insertions(+), 2 deletions(-)

diff --git a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
index 195d734..5df3396 100644
--- a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
+++ b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/BdsPlatform.c
@@ -1,8 +1,8 @@
/** @file

- Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>


This program and the accompanying materials are licensed and made available under

the terms and conditions of the BSD License that accompanies this distribution.

The full text of the license may be found at

http://opensource.org/licenses/bsd-license.php.

@@ -203,10 +203,29 @@ ShellImageCallback (
{
BdsSetConsoleMode (TRUE);
DEBUG ((EFI_D_INFO, "BdsEntry ShellImageCallback \n"));
}

+/**
+ An empty function to pass error checking of CreateEventEx ().
+
+ @param Event Event whose notification function is being invoked.
+ @param Context Pointer to the notification function's context,
+ which is implementation-dependent.
+
+**/
+STATIC
+VOID
+EFIAPI
+EmptyCallbackFunction (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ )
+{
+ return;
+}
+
//
// BDS Platform Functions
//
/**
Platform Bds init. Incude the platform firmware vendor, revision
@@ -223,12 +242,28 @@ PlatformBdsInit (
VOID
)
{
EFI_STATUS Status;
EFI_EVENT ShellImageEvent;
+ EFI_EVENT EndOfDxeEvent;
EFI_GUID ShellEnvProtocol = SHELL_ENVIRONMENT_INTERFACE_PROTOCOL;

+ //
+ // Signal EndOfDxe PI Event
+ //
+ Status = gBS->CreateEventEx (
+ EVT_NOTIFY_SIGNAL,
+ TPL_CALLBACK,
+ EmptyCallbackFunction,
+ NULL,
+ &gEfiEndOfDxeEventGroupGuid,
+ &EndOfDxeEvent
+ );
+ if (!EFI_ERROR (Status)) {
+ gBS->SignalEvent (EndOfDxeEvent);
+ }
+
#ifdef __GNUC__
SerialPortWrite((UINT8 *)">>>>BdsEntry[GCC]\r\n", 19);
#else
SerialPortWrite((UINT8 *)">>>>BdsEntry\r\n", 14);
#endif
diff --git a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
index 45578e8..c64bab9 100644
--- a/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
+++ b/Vlv2TbltDevicePkg/Library/PlatformBdsLib/PlatformBdsLib.inf
@@ -1,9 +1,9 @@
#/** @file
# Component name for module PlatformBootManagerLib
#
-# Copyright (c) 2008 - 2015, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
#

# This program and the accompanying materials are licensed and made available under

# the terms and conditions of the BSD License that accompanies this distribution.

# The full text of the license may be found at

# http://opensource.org/licenses/bsd-license.php.

@@ -95,10 +95,11 @@
gEfiMemoryTypeInformationGuid
gEfiCapsuleVendorGuid
gEfiGlobalVariableGuid
gEfiNormalSetupGuid
gEfiPartTypeSystemPartGuid
+ gEfiEndOfDxeEventGroupGuid

[Pcd]
gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base
gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase
gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase


Re: Ingebrigtsen: The End of Gmane?

Laszlo Ersek
 

On 07/29/16 06:07, Bruce Cran wrote:
On 7/28/16 6:46 PM, Kinney, Michael D wrote:

Built-in archives for edk2-devel and edk2-bugs and now enabled.
Thanks!
Thanks!
Laszlo


Re: [PATCH v2 02/19] Vlv2TbltDevicePkg: Only define MDEPKG_NDEBUG for gcc release build

Laszlo Ersek
 

On 07/29/16 05:25, Gary Lin wrote:
We only enable "-Wno-unused-but-set-variable" for the release build
and gcc would complain that the varible passed to ASSERT_EFI_ERROR
wasn't used in the debug build. Just don't define MDEPKG_NDEBUG for
the debug build to make gcc happy with ASSERT_EFI_ERROR.

Suggested-by: Laszlo Ersek <lersek@redhat.com>
Cc: David Wei <david.wei@intel.com>
CC: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
---
Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
index a3f4c9a..e57d2ad 100644
--- a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
+++ b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc
@@ -1117,7 +1117,7 @@ [Components.X64]
!endif
<BuildOptions>
ICC:*_*_*_CC_FLAGS = -D MDEPKG_NDEBUG
- GCC:*_*_*_CC_FLAGS = -D MDEPKG_NDEBUG
+ GCC:RELEASE_*_*_CC_FLAGS = -D MDEPKG_NDEBUG
}
MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {
<LibraryClasses>
Acked-by: Laszlo Ersek <lersek@redhat.com>


bugzilla whining

Laszlo Ersek
 

Hello Mike,

I got my first ever bugzilla whine today. It says "All of these bugs are
in the CONFIRMED state, and have not been touched in 7 days or more."

I'm not amused. :) I keep a very close eye on my BZs and I don't welcome
automated whines.

I checked the Bugzilla 5 documentation about whines:

http://bugzilla.readthedocs.io/en/5.0/administering/whining.html#whining
http://bugzilla.readthedocs.io/en/5.0/using/preferences.html?highlight=whine#permissions
http://bugzilla.readthedocs.io/en/5.0/administering/parameters.html?highlight=whine#email

I confirmed on my account (under Preferences | Permissions) that I have
the "bz_canusewhines" permission (--> "User can configure whine reports
for self"). However, when I go to Administration | Whining, it seems
that I can only create new whines -- I don't seem to have any personal
whines set up at the moment.

Which makes me think that this is a central default. Can we please make
it a personal setting instead?

Thank you,
Laszlo


Re: [PATCH v4 0/7] BaseTools: add support for GCC5 in LTO mode

Ard Biesheuvel
 

On 29 July 2016 at 08:09, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
On 29 July 2016 at 06:47, Gao, Liming <liming.gao@intel.com> wrote:
Ard:
Thanks for your update. I have some comments for them.
1) It uses GCC as Link for GCC44-GCC49. Have you done verification on them? I verify GCC49 in OVMFIa32X64 platform. It works.
Yes, I tested all of them.

2) After this change, how to append new link option in platform DSC? Use style -Wl, ?
It depends. Some options (like -z) don't need it, but others do.

3) I see GCC5 uses gcc-ar as its SLINK, and GCC49 uses ar as its SLINK. Is gcc-ar required only by LTO?
Yes

4) Before GCC49 optimization, GCC49 means GCC49 or later, GCC5 can work with GCC49 tool chain configuration. But now, I configure gcc to point to GCC5, and build OVMF with GCC49 tool chain, it reports GenFw failure. I expect GCC5 work with GCC49 and GCC5 tool chain both. GCC49 for no lto, GCC5 for lto. I know Steven has provided the patch to fix this GenFw issue.

GenFw: ERROR 3000: Invalid
/home/hwu/work/lgao4/AllPkg/Build/Ovmf3264/DEBUG_GCC49/X64/MdeModulePkg/Core/Dxe/DxeMain/DEBUG/DxeCore.dll unsupported ELF EM_X86_64 relocation 0x9.
GenFw: ERROR 3000: Invalid
/home/hwu/work/lgao4/AllPkg/Build/Ovmf3264/DEBUG_GCC49/X64/MdeModulePkg/Core/Dxe/DxeMain/DEBUG/DxeCore.dll unsupported ELF EM_X86_64 relocation 0x9.
GenFw: ERROR 3000: Invalid
Which GCC version are you using?
I cannot reproduce this with gcc version 5.4.0 20160609 (Ubuntu
5.4.0-6ubuntu1~16.04.1)

In any case, I think we should merge Steven's patch that adds handling
to the relocation types to GenFw. The issue is only that having a GOT
does not make a lot of sense for UEFI executables, since it forces a
symbol reference to be absolute, which uses more space in the code,
but also in the .reloc section. The visibility pragma I introduced for
GCC4x was intended to prevent GOT based relocations from being
emitted.


Re: [PATCH v4 0/7] BaseTools: add support for GCC5 in LTO mode

Ard Biesheuvel
 

On 29 July 2016 at 06:47, Gao, Liming <liming.gao@intel.com> wrote:
Ard:
Thanks for your update. I have some comments for them.
1) It uses GCC as Link for GCC44-GCC49. Have you done verification on them? I verify GCC49 in OVMFIa32X64 platform. It works.
Yes, I tested all of them.

2) After this change, how to append new link option in platform DSC? Use style -Wl, ?
It depends. Some options (like -z) don't need it, but others do.

3) I see GCC5 uses gcc-ar as its SLINK, and GCC49 uses ar as its SLINK. Is gcc-ar required only by LTO?
Yes

4) Before GCC49 optimization, GCC49 means GCC49 or later, GCC5 can work with GCC49 tool chain configuration. But now, I configure gcc to point to GCC5, and build OVMF with GCC49 tool chain, it reports GenFw failure. I expect GCC5 work with GCC49 and GCC5 tool chain both. GCC49 for no lto, GCC5 for lto. I know Steven has provided the patch to fix this GenFw issue.

GenFw: ERROR 3000: Invalid
/home/hwu/work/lgao4/AllPkg/Build/Ovmf3264/DEBUG_GCC49/X64/MdeModulePkg/Core/Dxe/DxeMain/DEBUG/DxeCore.dll unsupported ELF EM_X86_64 relocation 0x9.
GenFw: ERROR 3000: Invalid
/home/hwu/work/lgao4/AllPkg/Build/Ovmf3264/DEBUG_GCC49/X64/MdeModulePkg/Core/Dxe/DxeMain/DEBUG/DxeCore.dll unsupported ELF EM_X86_64 relocation 0x9.
GenFw: ERROR 3000: Invalid
Which GCC version are you using?


-----Original Message-----
From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org]
Sent: Wednesday, July 27, 2016 7:14 PM
To: edk2-devel@lists.01.org; lersek@redhat.com; Gao, Liming
<liming.gao@intel.com>; Shi, Steven <steven.shi@intel.com>; Zhu,
Yonghong <yonghong.zhu@intel.com>; Justen, Jordan L
<jordan.l.justen@intel.com>
Cc: leif.lindholm@linaro.org; Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH v4 0/7] BaseTools: add support for GCC5 in LTO mode

This v4 to introduce GCC5 is now a 7 piece series, including some
preparatory cleanup patches that allow all GCC4x and CLANG35 toolchains
to switch to using 'gcc' as the linker. This allows us to get rid of
the wrapper script to marshall ld arguments in order to make them
understandable by gcc, which is fragile and likely to cause problems in
the future.

Since there appears to be a natural split between the 'legacy' GCC
toolchains UNIXGCC, ELFGCC, and CYGGCC[xASL], both in term of supported
architectures [IA32, X64, IPF] vs [IA32, X64, ARM, AARCH64], and in
terms of maintenance, these toolchains are not moved to using 'gcc' as
the linker, and instead, a new BUILDRULEFAMILY is introduced called GCCLD
that will retain the old behavior.

The result is that GCC5 can align much more closely with its predecessors,
making the expected maintenance burden of supporting GCC back to v4.4
much lower.

Changes since v3:
- like Steven does in his GCC5LTO patch, add -fno-builtin to IA32 and X64
CC_FLAGS; this addresses a build issue reported by Liming
- add -Os the the linker flags as well, for AARCH64 this does not seem to
make
a difference, but it is arguably correct since the LTO processing at link
time involves code generation as well
- add Laszlo's ack to #2
- new patch #6 to omit the autogenerated build-id from the PE/COFF binary

Changes since v2:
- add license headers to LTO glue files for ARM and AARCH64 (#5)
- get rid of lto-ld-wrapper script

Ard Biesheuvel (7):
BaseTools CLANG35: drop problematic use-movt and save-temps options
ArmVirtPkg/ArmVirtPrePiUniCoreRelocatable: ignore .hash and .note
sections
BaseTools UNIXGCC ELFGCC CYGGCC: clone GCC build rule family into
GCCLD
BaseTools GCC: use 'gcc' as the linker command for GCC44 and later
ArmPkg: add prebuilt glue binaries for GCC5 LTO support
BaseTools GCC: drop GNU notes section from EFI image
BaseTools GCC: add support for GCC v5.x in LTO mode

ArmPkg/GccLto/liblto-aarch64.a | Bin 0 -> 1016 bytes
ArmPkg/GccLto/liblto-aarch64.s | 27 ++
ArmPkg/GccLto/liblto-arm.a | Bin 0 -> 2096 bytes
ArmPkg/GccLto/liblto-arm.s | 61 ++++
ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf | 2 +-
ArmVirtPkg/PrePi/Scripts/PrePi-PIE.lds | 3 +
BaseTools/Conf/build_rule.template | 31 +-
BaseTools/Conf/tools_def.template | 344 ++++++++++++++------
BaseTools/Scripts/GccBase.lds | 6 +
EmulatorPkg/Unix/Host/Host.inf | 6 +-
10 files changed, 372 insertions(+), 108 deletions(-)
create mode 100644 ArmPkg/GccLto/liblto-aarch64.a
create mode 100644 ArmPkg/GccLto/liblto-aarch64.s
create mode 100644 ArmPkg/GccLto/liblto-arm.a
create mode 100644 ArmPkg/GccLto/liblto-arm.s

--
2.7.4


[patch] BaseTool/Upt: Avoid UNI file name conflict

hesschen <hesheng.chen@...>
 

When creating a UNI file if there is a name conflict, add an index from 0 to the file name

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: hesschen <hesheng.chen@intel.com>
---
.../Source/Python/UPT/GenMetaFile/GenDecFile.py | 5 +++--
.../Source/Python/UPT/GenMetaFile/GenInfFile.py | 7 +++---
BaseTools/Source/Python/UPT/Library/String.py | 26 +++++++++++++++++++++-
3 files changed, 32 insertions(+), 6 deletions(-)

diff --git a/BaseTools/Source/Python/UPT/GenMetaFile/GenDecFile.py b/BaseTools/Source/Python/UPT/GenMetaFile/GenDecFile.py
index 31abd23..d39c182 100644
--- a/BaseTools/Source/Python/UPT/GenMetaFile/GenDecFile.py
+++ b/BaseTools/Source/Python/UPT/GenMetaFile/GenDecFile.py
@@ -65,6 +65,7 @@ from Library.DataType import TAB_SECTION_END
from Library.DataType import TAB_SPLIT
import Library.DataType as DT
from Library.UniClassObject import FormatUniEntry
+from Library.String import GetUniFileName

def GenPcd(Package, Content):
#
@@ -586,9 +587,9 @@ def GenPackageUNIEncodeFile(PackageObject, UniFileHeader = '', Encoding=TAB_ENCO

if not os.path.exists(os.path.dirname(PackageObject.GetFullPath())):
os.makedirs(os.path.dirname(PackageObject.GetFullPath()))
- ContainerFile = os.path.normpath(os.path.join(os.path.dirname(PackageObject.GetFullPath()),
- (PackageObject.GetBaseName() + '.uni')))

+ ContainerFile = GetUniFileName(os.path.dirname(PackageObject.GetFullPath()), PackageObject.GetBaseName())
+
Content = UniFileHeader + '\r\n'
Content += '\r\n'

diff --git a/BaseTools/Source/Python/UPT/GenMetaFile/GenInfFile.py b/BaseTools/Source/Python/UPT/GenMetaFile/GenInfFile.py
index a131f98..c1362e6 100644
--- a/BaseTools/Source/Python/UPT/GenMetaFile/GenInfFile.py
+++ b/BaseTools/Source/Python/UPT/GenMetaFile/GenInfFile.py
@@ -2,7 +2,7 @@
#
# This file contained the logical of transfer package object to INF files.
#
-# Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available
# under the terms and conditions of the BSD License which accompanies this
@@ -41,6 +41,7 @@ import Logger.Log as Logger
from Library import DataType as DT
from GenMetaFile import GenMetaFileMisc
from Library.UniClassObject import FormatUniEntry
+from Library.String import GetUniFileName


## Transfer Module Object to Inf files
@@ -225,8 +226,8 @@ def GenModuleUNIEncodeFile(ModuleObject, UniFileHeader='', Encoding=DT.TAB_ENCOD
return
else:
ModuleObject.UNIFlag = True
- ContainerFile = os.path.normpath(os.path.join(os.path.dirname(ModuleObject.GetFullPath()),
- (ModuleObject.GetBaseName() + '.uni')))
+ ContainerFile = GetUniFileName(os.path.dirname(ModuleObject.GetFullPath()), ModuleObject.GetBaseName())
+
if not os.path.exists(os.path.dirname(ModuleObject.GetFullPath())):
os.makedirs(os.path.dirname(ModuleObject.GetFullPath()))

diff --git a/BaseTools/Source/Python/UPT/Library/String.py b/BaseTools/Source/Python/UPT/Library/String.py
index 37ce141..05b5fb1 100644
--- a/BaseTools/Source/Python/UPT/Library/String.py
+++ b/BaseTools/Source/Python/UPT/Library/String.py
@@ -2,7 +2,7 @@
# This file is used to define common string related functions used in parsing
# process
#
-# Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available
# under the terms and conditions of the BSD License which accompanies this
@@ -957,3 +957,27 @@ def IsMatchArch(Arch1, Arch2):
return True

return False
+
+# Search all files in FilePath to find the FileName with the largest index
+# Return the FileName with index +1 under the FilePath
+#
+def GetUniFileName(FilePath, FileName):
+ Files = os.listdir(FilePath)
+ LargestIndex = -1
+ for File in Files:
+ if File.upper().startswith(FileName.upper()) and File.upper().endswith('.UNI'):
+ Index = File.upper().replace(FileName.upper(), '').replace('.UNI', '')
+ if Index:
+ try:
+ Index = int(Index)
+ except Exception:
+ Index = -1
+ else:
+ Index = 0
+ if Index > LargestIndex:
+ LargestIndex = Index + 1
+
+ if LargestIndex > -1:
+ return os.path.normpath(os.path.join(FilePath, FileName + str(LargestIndex) + '.uni'))
+ else:
+ return os.path.normpath(os.path.join(FilePath, FileName + '.uni'))
--
2.7.2.windows.1


Re: [Patch 1/3] BaseTools: Correct ReadMe.txt file with CRLF line ending

Zhu, Yonghong <yonghong.zhu@...>
 

Reviewed-by: Yonghong Zhu <yonghong.zhu@intel.com>

Best Regards,
Zhu Yonghong

-----Original Message-----
From: Gao, Liming
Sent: Thursday, July 28, 2016 4:46 PM
To: edk2-devel@lists.01.org
Cc: Zhu, Yonghong <yonghong.zhu@intel.com>
Subject: [Patch 1/3] BaseTools: Correct ReadMe.txt file with CRLF line ending

Cc: Yonghong Zhu <yonghong.zhu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
---
BaseTools/ReadMe.txt | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/BaseTools/ReadMe.txt b/BaseTools/ReadMe.txt index 6330b14..be9ff2a 100644
--- a/BaseTools/ReadMe.txt
+++ b/BaseTools/ReadMe.txt
@@ -7,9 +7,9 @@ directory contatins tools source.

=== Windows/Visual Studio Notes ===

-To build the BaseTools, you should run the standard vsvars32.bat script -from your preferred Visual Studio installation or you can run get_vsvars.bat -to use latest automatically detected version.
+To build the BaseTools, you should run the standard vsvars32.bat script
+from your preferred Visual Studio installation or you can run
+get_vsvars.bat to use latest automatically detected version.

In addition to this, you should set the following environment variables:

--
2.8.0.windows.1


Re: [PATCH v4 0/7] BaseTools: add support for GCC5 in LTO mode

Liming Gao
 

Ard:
Thanks for your update. I have some comments for them.
1) It uses GCC as Link for GCC44-GCC49. Have you done verification on them? I verify GCC49 in OVMFIa32X64 platform. It works.
2) After this change, how to append new link option in platform DSC? Use style -Wl, ?
3) I see GCC5 uses gcc-ar as its SLINK, and GCC49 uses ar as its SLINK. Is gcc-ar required only by LTO?
4) Before GCC49 optimization, GCC49 means GCC49 or later, GCC5 can work with GCC49 tool chain configuration. But now, I configure gcc to point to GCC5, and build OVMF with GCC49 tool chain, it reports GenFw failure. I expect GCC5 work with GCC49 and GCC5 tool chain both. GCC49 for no lto, GCC5 for lto. I know Steven has provided the patch to fix this GenFw issue.

GenFw: ERROR 3000: Invalid
/home/hwu/work/lgao4/AllPkg/Build/Ovmf3264/DEBUG_GCC49/X64/MdeModulePkg/Core/Dxe/DxeMain/DEBUG/DxeCore.dll unsupported ELF EM_X86_64 relocation 0x9.
GenFw: ERROR 3000: Invalid
/home/hwu/work/lgao4/AllPkg/Build/Ovmf3264/DEBUG_GCC49/X64/MdeModulePkg/Core/Dxe/DxeMain/DEBUG/DxeCore.dll unsupported ELF EM_X86_64 relocation 0x9.
GenFw: ERROR 3000: Invalid

Thanks
Liming

-----Original Message-----
From: Ard Biesheuvel [mailto:ard.biesheuvel@linaro.org]
Sent: Wednesday, July 27, 2016 7:14 PM
To: edk2-devel@lists.01.org; lersek@redhat.com; Gao, Liming
<liming.gao@intel.com>; Shi, Steven <steven.shi@intel.com>; Zhu,
Yonghong <yonghong.zhu@intel.com>; Justen, Jordan L
<jordan.l.justen@intel.com>
Cc: leif.lindholm@linaro.org; Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH v4 0/7] BaseTools: add support for GCC5 in LTO mode

This v4 to introduce GCC5 is now a 7 piece series, including some
preparatory cleanup patches that allow all GCC4x and CLANG35 toolchains
to switch to using 'gcc' as the linker. This allows us to get rid of
the wrapper script to marshall ld arguments in order to make them
understandable by gcc, which is fragile and likely to cause problems in
the future.

Since there appears to be a natural split between the 'legacy' GCC
toolchains UNIXGCC, ELFGCC, and CYGGCC[xASL], both in term of supported
architectures [IA32, X64, IPF] vs [IA32, X64, ARM, AARCH64], and in
terms of maintenance, these toolchains are not moved to using 'gcc' as
the linker, and instead, a new BUILDRULEFAMILY is introduced called GCCLD
that will retain the old behavior.

The result is that GCC5 can align much more closely with its predecessors,
making the expected maintenance burden of supporting GCC back to v4.4
much lower.

Changes since v3:
- like Steven does in his GCC5LTO patch, add -fno-builtin to IA32 and X64
CC_FLAGS; this addresses a build issue reported by Liming
- add -Os the the linker flags as well, for AARCH64 this does not seem to
make
a difference, but it is arguably correct since the LTO processing at link
time involves code generation as well
- add Laszlo's ack to #2
- new patch #6 to omit the autogenerated build-id from the PE/COFF binary

Changes since v2:
- add license headers to LTO glue files for ARM and AARCH64 (#5)
- get rid of lto-ld-wrapper script

Ard Biesheuvel (7):
BaseTools CLANG35: drop problematic use-movt and save-temps options
ArmVirtPkg/ArmVirtPrePiUniCoreRelocatable: ignore .hash and .note
sections
BaseTools UNIXGCC ELFGCC CYGGCC: clone GCC build rule family into
GCCLD
BaseTools GCC: use 'gcc' as the linker command for GCC44 and later
ArmPkg: add prebuilt glue binaries for GCC5 LTO support
BaseTools GCC: drop GNU notes section from EFI image
BaseTools GCC: add support for GCC v5.x in LTO mode

ArmPkg/GccLto/liblto-aarch64.a | Bin 0 -> 1016 bytes
ArmPkg/GccLto/liblto-aarch64.s | 27 ++
ArmPkg/GccLto/liblto-arm.a | Bin 0 -> 2096 bytes
ArmPkg/GccLto/liblto-arm.s | 61 ++++
ArmVirtPkg/PrePi/ArmVirtPrePiUniCoreRelocatable.inf | 2 +-
ArmVirtPkg/PrePi/Scripts/PrePi-PIE.lds | 3 +
BaseTools/Conf/build_rule.template | 31 +-
BaseTools/Conf/tools_def.template | 344 ++++++++++++++------
BaseTools/Scripts/GccBase.lds | 6 +
EmulatorPkg/Unix/Host/Host.inf | 6 +-
10 files changed, 372 insertions(+), 108 deletions(-)
create mode 100644 ArmPkg/GccLto/liblto-aarch64.a
create mode 100644 ArmPkg/GccLto/liblto-aarch64.s
create mode 100644 ArmPkg/GccLto/liblto-arm.a
create mode 100644 ArmPkg/GccLto/liblto-arm.s

--
2.7.4


Re: Ingebrigtsen: The End of Gmane?

Bruce Cran <bruce@...>
 

On 7/28/16 6:46 PM, Kinney, Michael D wrote:

Built-in archives for edk2-devel and edk2-bugs and now enabled.
Thanks!

--
Bruce


[PATCH v2 19/19] Vlv2TbltDevicePkg/PpmPolicy: Remove the unused variable

Gary Lin
 

Fix the following error from gcc:

Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c: In function ‘PpmPolicyEntry’:
Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c:50:29: error: variable ‘MaxRatio’ set but not used [-Werror=unused-but-set-variable]

Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: David Wei <david.wei@intel.com>
---
Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c | 3 ---
1 file changed, 3 deletions(-)

diff --git a/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c b/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c
index fb4e7fc..ec0c0f5 100644
--- a/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c
+++ b/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c
@@ -46,7 +46,6 @@ PpmPolicyEntry(
EFI_HANDLE Handle;
EFI_STATUS Status;
UINTN CpuCount;
- UINT64 MaxRatio;
UINT8 CPUMobileFeature;

PCH_STEPPING Stepping;
@@ -77,8 +76,6 @@ PpmPolicyEntry(
// Store the CPUID for use by SETUP items.
//
AsmCpuid (EFI_CPUID_VERSION_INFO, &Cpuid01.RegEax, &Cpuid01.RegEbx, &Cpuid01.RegEcx, &Cpuid01.RegEdx);
- MaxRatio = ((RShiftU64 (AsmReadMsr64(EFI_MSR_IA32_PLATFORM_ID), 8)) & 0x1F);
-

mDxePlatformPpmPolicy.Revision = PPM_PLATFORM_POLICY_PROTOCOL_REVISION_4;

--
2.9.2


[PATCH v2 18/19] Vlv2TbltDevicePkg/PpmPolicy: Remove the usage of global variables

Gary Lin
 

gcc issued the error of "multiple deifintion" since gBS was also defined
in MdePkg/Library/UefiBootServicesTableLib. Actually those global variables,
gBS, pBS, and pRS, in PpmPolicy.h were only used in one function. Besides,
gBS and pRS were not really used. Remove gBS and pRS and declare pBS in
PpmPolicyEntry() to satisfy gcc.

Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: David Wei <david.wei@intel.com>
---
Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c | 10 +++-------
Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.h | 6 +-----
2 files changed, 4 insertions(+), 12 deletions(-)

diff --git a/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c b/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c
index 2f8996b..fb4e7fc 100644
--- a/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c
+++ b/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.c
@@ -33,8 +33,6 @@ Abstract:
#define EFI_CPUID_MODEL 0x00F0
#define EFI_CPUID_STEPPING 0x000F

-
-
EFI_STATUS
EFIAPI
PpmPolicyEntry(
@@ -42,6 +40,7 @@ PpmPolicyEntry(
IN EFI_SYSTEM_TABLE *SystemTable
)
{
+ EFI_BOOT_SERVICES *pBS;
EFI_MP_SERVICES_PROTOCOL *MpService;
EFI_CPUID_REGISTER Cpuid01 = { 0, 0, 0, 0};
EFI_HANDLE Handle;
@@ -52,15 +51,12 @@ PpmPolicyEntry(

PCH_STEPPING Stepping;

-
- gBS = SystemTable->BootServices;
pBS = SystemTable->BootServices;
- pRS = SystemTable->RuntimeServices;

//
// Set PPM policy structure to known value
//
- gBS->SetMem (&mDxePlatformPpmPolicy, sizeof(PPM_PLATFORM_POLICY_PROTOCOL), 0);
+ pBS->SetMem (&mDxePlatformPpmPolicy, sizeof(PPM_PLATFORM_POLICY_PROTOCOL), 0);

//
// Find the MpService Protocol
@@ -147,7 +143,7 @@ PpmPolicyEntry(
mDxePlatformPpmPolicy.S3RestoreMsrSwSmiNumber = S3_RESTORE_MSR_SW_SMI;

Handle = NULL;
- Status = gBS->InstallMultipleProtocolInterfaces (
+ Status = pBS->InstallMultipleProtocolInterfaces (
&Handle,
&gPpmPlatformPolicyProtocolGuid,
&mDxePlatformPpmPolicy,
diff --git a/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.h b/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.h
index cd3676b..cc7bed7 100644
--- a/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.h
+++ b/Vlv2TbltDevicePkg/PpmPolicy/PpmPolicy.h
@@ -31,10 +31,6 @@ PPM_PLATFORM_POLICY_PROTOCOL mDxePlatformPpmPolicy;
#define ICH_DEVICE_ENABLE 1
#define ICH_DEVICE_DISABLE 0

-EFI_BOOT_SERVICES *gBS;
-EFI_BOOT_SERVICES *pBS;
-EFI_RUNTIME_SERVICES *pRS;
-
#define POWER_STATE_SWITCH_SMI 43
#define ENABLE_C_STATE_IO_REDIRECTION_SMI 70
#define DISABLE_C_STATE_IO_REDIRECTION_SMI 71
@@ -43,4 +39,4 @@ EFI_RUNTIME_SERVICES *pRS;
#define ENABLE_P_STATE_HARDWARE_COORDINATION_SMI 74
#define DISABLE_P_STATE_HARDWARE_COORDINATION_SMI 75
#define S3_RESTORE_MSR_SW_SMI 48
-#define ENABLE_C6_RESIDENCY_SMI 76
\ No newline at end of file
+#define ENABLE_C6_RESIDENCY_SMI 76
--
2.9.2


[PATCH v2 17/19] Vlv2TbltDevicePkg/SmBiosMiscDxe: Remove unused variables

Gary Lin
 

Fix the following errors from gcc:

Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c: In function ‘JudgeHandleIsPCIDevice’:
Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c:164:22: error: variable ‘DevicePath’ set but not used [-Werror=unused-but-set-variable]

Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c: In function ‘AddSmbiosT0x90Callback’:
Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c:292:28: error: variable ‘ForType90InputData’ set but not used [-Werror=unused-but-set-variable]

Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c: In function ‘MiscProcessorInformationFunction’:
Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c:191:37: error: variable ‘SrcDataSize’ set but not used [-Werror=unused-but-set-variable]

Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c: In function ‘MiscProcessorCacheFunction’:
Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c:78:34: error: variable ‘SrcDataSize’ set but not used [-Werror=unused-but-set-variable]

Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Gary Lin <glin@suse.com>
Reviewed-by: David Wei <david.wei@intel.com>
---
Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c | 5 -----
Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c | 2 --
Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c | 2 --
3 files changed, 9 deletions(-)

diff --git a/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c b/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c
index 2d0bf8b..9e04907 100644
--- a/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c
+++ b/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscOemType0x90Function.c
@@ -152,7 +152,6 @@ JudgeHandleIsPCIDevice(
{
EFI_STATUS Status;
EFI_DEVICE_PATH *DPath;
- EFI_DEVICE_PATH *DevicePath;

Status = gBS->HandleProtocol (
Handle,
@@ -160,7 +159,6 @@ JudgeHandleIsPCIDevice(
(VOID **) &DPath
);
if(!EFI_ERROR(Status)) {
- DevicePath = DPath;
while(!IsDevicePathEnd(DPath)) {
if((DPath->Type == HARDWARE_DEVICE_PATH) && (DPath->SubType == HW_PCI_DP)) {
PCI_DEVICE_PATH *PCIPath;
@@ -280,7 +278,6 @@ AddSmbiosT0x90Callback (
UINTN SteppingStrLen = 0;
SMBIOS_TABLE_TYPE90 *SmbiosRecord;
EFI_SMBIOS_HANDLE SmbiosHandle;
- EFI_MISC_OEM_TYPE_0x90 *ForType90InputData;
CHAR16 *SECVer;
CHAR16 *uCodeVer;
CHAR16 *GOPVer;
@@ -289,8 +286,6 @@ AddSmbiosT0x90Callback (
CHAR8 *OptionalStrStart;
EFI_SMBIOS_PROTOCOL *SmbiosProtocol;

- ForType90InputData = (EFI_MISC_OEM_TYPE_0x90 *)Context;
-
DEBUG ((EFI_D_INFO, "Executing SMBIOS T0x90 callback.\n"));

gBS->CloseEvent (Event); // Unload this event.
diff --git a/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c b/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c
index cbed988..b18a6aa 100644
--- a/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c
+++ b/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorCacheFunction.c
@@ -66,7 +66,6 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscProcessorCache)
EFI_DATA_RECORD_HEADER *Record;
EFI_SUBCLASS_TYPE1_HEADER *DataHeader;
UINT8 *SrcData;
- UINT32 SrcDataSize;
EFI_STATUS Status;

//
@@ -113,7 +112,6 @@ MISC_SMBIOS_TABLE_FUNCTION(MiscProcessorCache)
if (Record->DataRecordClass == EFI_DATA_RECORD_CLASS_DATA) {
DataHeader = (EFI_SUBCLASS_TYPE1_HEADER *)(Record + 1);
SrcData = (UINT8 *)(DataHeader + 1);
- SrcDataSize = Record->RecordSize - Record->HeaderSize - sizeof (EFI_SUBCLASS_TYPE1_HEADER);
if (CompareGuid(&Record->DataRecordGuid, &gEfiCacheSubClassGuid) && (DataHeader->RecordType == CacheSizeRecordType)) {
if (DataHeader->SubInstance == EFI_CACHE_L1) {
SmbiosRecordL1->InstalledSize += (UINT16) (ConvertBase2ToRaw((EFI_EXP_BASE2_DATA *)SrcData) >> 10);
diff --git a/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c b/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c
index 005b43c..bd988db 100644
--- a/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c
+++ b/Vlv2TbltDevicePkg/SmBiosMiscDxe/MiscProcessorInformationFunction.c
@@ -179,7 +179,6 @@ MISC_SMBIOS_TABLE_FUNCTION (MiscProcessorInformation)
EFI_DATA_RECORD_HEADER *Record;
EFI_SUBCLASS_TYPE1_HEADER *DataHeader;
UINT8 *SrcData;
- UINT32 SrcDataSize;
EFI_PROCESSOR_VERSION_DATA *ProcessorVersion;
CHAR16 *NewStringToken;
STRING_REF TokenToUpdate;
@@ -225,7 +224,6 @@ MISC_SMBIOS_TABLE_FUNCTION (MiscProcessorInformation)

DataHeader = (EFI_SUBCLASS_TYPE1_HEADER *)(Record + 1);
SrcData = (UINT8 *)(DataHeader + 1);
- SrcDataSize = Record->RecordSize - Record->HeaderSize - sizeof (EFI_SUBCLASS_TYPE1_HEADER);

//
// Processor
--
2.9.2

82601 - 82620 of 82645