From: Michael Kubacki <michael.kubacki@...>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D4048

- Enables CI in IntelFsp2Pkg and IntelFsp2WrapperPkg.
- Fixes several pre-existing issues that impact common CI checks.

You can find the CI results for the packages with this change
in the following edk2 PR:
https://github.com/tianocore/edk2/pull/3347

V2 Changes:

1. The pre-existing compilation issue in IntelFsp2Pkg that caused
the following BZ to be filed in v1 is now resolved. Therefore,
the compiler CI plugin is enabled in IntelFsp2Pkg now.

https://bugzilla.tianocore.org/show_bug.cgi?id=3D4049

2. The following patch is dropped from v2:

[PATCH v1 5/7] IntelFsp2WrapperPkg.dec: Remove duplicate
LibraryClasses entry

Chasel indicated this is an intentional design decision so
platforms do not have to override the entire library instance
during platform integration.

Consequently, "FspWrapperPlatformMultiPhaseLib" was added to the
ignore list for the "LibraryClassCheck" CI plugin in
IntelFspWrapperPkg.ci.yaml.

Rebased series on f46c7d1e36c9 and added v1 R-b tags.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Liming Gao <gaoliming@...>
Cc: Michael D Kinney <michael.d.kinney@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Sean Brogan <sean.brogan@...>
Cc: Star Zeng <star.zeng@...>
Signed-off-by: Michael Kubacki <michael.kubacki@...>

Michael Kubacki (6):
IntelFsp2Pkg: Fix code formatting errors
IntelFsp2Pkg/BaseFspMultiPhaseLib: Replace duplicate GUID
IntelFsp2Pkg: Add CI YAML file
IntelFsp2WrapperPkg: Fix code formatting errors
IntelFsp2WrapperPkg: Add CI YAML file
.azurepipelines: Add IntelFsp2Pkg and IntelFsp2WrapperPkg to CI

IntelFsp2Pkg/Library/BaseFspDebugLibSerialPort/DebugLib.c =
| 9 +-
IntelFsp2Pkg/Library/BaseFspSwitchStackLib/FspSwitchStackLib.c =
| 2 +-
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/FspWrapperApiLib.c =
| 4 +
IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/IA32/DispatchExecute.c =
| 1 -
IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/SecRamInit=
Data.c | 8 +-
.azurepipelines/templates/pr-gate-build-job.yml =
| 3 +
.pytool/CISettings.py =
| 2 +
IntelFsp2Pkg/Include/Ppi/Variable.h =
| 8 +-
IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml =
| 90 ++++++++++++++++++
IntelFsp2Pkg/Library/BaseFspMultiPhaseLib/BaseFspMultiPhaseLib.inf =
| 2 +-
IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml =
| 96 ++++++++++++++++++++
11 files changed, 210 insertions(+), 15 deletions(-)
create mode 100644 IntelFsp2Pkg/IntelFsp2Pkg.ci.yaml
create mode 100644 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.ci.yaml

--=20
2.28.0.windows.1