[PATCH v3] IntelFsp2Pkg: Add FSPI_ARCH_UPD.


Chiu, Chasel
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3993

Adding the missing FSPI_ARCH_UPD, FSP_GLOBAL_DATA_VERSION bumpping up,
and some comments for clarification.
Also fixed a bug in SplitFspBin.py for FSP-I support.

Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Star Zeng <star.zeng@...>
Signed-off-by: Chasel Chiu <chasel.chiu@...>
---
IntelFsp2Pkg/Include/FspEas/FspApi.h | 71 +++++++++++++++++++++++++++=
+++++++++++++++++++++++++++++++++++++-------
IntelFsp2Pkg/Include/FspGlobalData.h | 2 +-
IntelFsp2Pkg/Include/Guid/FspHeaderFile.h | 21 +++++++++++++++++++--
IntelFsp2Pkg/Tools/SplitFspBin.py | 2 +-
4 files changed, 85 insertions(+), 11 deletions(-)

diff --git a/IntelFsp2Pkg/Include/FspEas/FspApi.h b/IntelFsp2Pkg/Include/Fs=
pEas/FspApi.h
index bf46f13f73..3f368574e8 100644
--- a/IntelFsp2Pkg/Include/FspEas/FspApi.h
+++ b/IntelFsp2Pkg/Include/FspEas/FspApi.h
@@ -1,6 +1,6 @@
/** @file=0D
Intel FSP API definition from Intel Firmware Support Package External=0D
- Architecture Specification v2.0 - v2.2=0D
+ Architecture Specification v2.0 and above.=0D
=0D
Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>=0D
SPDX-License-Identifier: BSD-2-Clause-Patent=0D
@@ -100,13 +100,14 @@ typedef struct {
/// "XXXXXX_T" for FSP-T=0D
/// "XXXXXX_M" for FSP-M=0D
/// "XXXXXX_S" for FSP-S=0D
+ /// "XXXXXX_I" for FSP-I=0D
/// Where XXXXXX is an unique signature=0D
///=0D
UINT64 Signature;=0D
///=0D
/// Revision of the Data structure.=0D
- /// For FSP spec 2.0/2.1 value is 1.=0D
- /// For FSP spec 2.2 value is 2.=0D
+ /// For FSP spec 2.0/2.1, this value is 1 and only FSPM_UPD having ARC=
H_UPD.=0D
+ /// For FSP spec 2.2 and above, this value is 2 and ARCH_UPD present i=
n all UPD structures.=0D
///=0D
UINT8 Revision;=0D
UINT8 Reserved[23];=0D
@@ -134,7 +135,7 @@ typedef struct {
} FSPT_ARCH_UPD;=0D
=0D
///=0D
-/// FSPT_ARCH2_UPD Configuration.=0D
+/// FSPT_ARCH2_UPD Configuration for FSP 2.4 and above.=0D
///=0D
typedef struct {=0D
///=0D
@@ -196,7 +197,7 @@ typedef struct {
} FSPM_ARCH_UPD;=0D
=0D
///=0D
-/// FSPM_ARCH2_UPD Configuration.=0D
+/// FSPM_ARCH2_UPD Configuration for FSP 2.4 and above.=0D
///=0D
typedef struct {=0D
///=0D
@@ -209,6 +210,13 @@ typedef struct {
///=0D
UINT32 Length;=0D
///=0D
+ /// Pointer to the non-volatile storage (NVS) data buffer.=0D
+ /// If it is NULL it indicates the NVS data is not available.=0D
+ /// This value is deprecated starting with v2.4 of the FSP specification=
,=0D
+ /// and will be removed in an upcoming version of the FSP specification.=
=0D
+ ///=0D
+ EFI_PHYSICAL_ADDRESS NvsBufferPtr;=0D
+ ///=0D
/// Pointer to the temporary stack base address to be=0D
/// consumed inside FspMemoryInit() API.=0D
///=0D
@@ -232,7 +240,7 @@ typedef struct {
/// This value is only valid if Revision is >=3D 2.=0D
///=0D
EFI_PHYSICAL_ADDRESS FspEventHandler;=0D
- UINT8 Reserved1[24];=0D
+ UINT8 Reserved1[16];=0D
} FSPM_ARCH2_UPD;=0D
=0D
///=0D
@@ -265,7 +273,7 @@ typedef struct {
} FSPS_ARCH_UPD;=0D
=0D
///=0D
-/// FSPS_ARCH2_UPD Configuration.=0D
+/// FSPS_ARCH2_UPD Configuration for FSP 2.4 and above.=0D
///=0D
typedef struct {=0D
///=0D
@@ -285,6 +293,40 @@ typedef struct {
UINT8 Reserved1[16];=0D
} FSPS_ARCH2_UPD;=0D
=0D
+///=0D
+/// FSPI_ARCH_UPD Configuration.=0D
+///=0D
+typedef struct {=0D
+ ///=0D
+ /// Revision of the structure is 1 for this version of the specification=
.=0D
+ ///=0D
+ UINT8 Revision;=0D
+ UINT8 Reserved[3];=0D
+ ///=0D
+ /// Length of the structure in bytes. The current value for this field i=
s 32.=0D
+ ///=0D
+ UINT32 Length;=0D
+ ///=0D
+ /// The physical memory-mapped base address of the bootloader SMM firmwa=
re volume (FV).=0D
+ ///=0D
+ EFI_PHYSICAL_ADDRESS BootloaderSmmFvBaseAddress;=0D
+ ///=0D
+ /// The length in bytes of the bootloader SMM firmware volume (FV).=0D
+ ///=0D
+ UINT64 BootloaderSmmFvLength;=0D
+ ///=0D
+ /// The physical memory-mapped base address of the bootloader SMM FV con=
text data.=0D
+ /// This data is provided to bootloader SMM drivers through a HOB by the=
FSP MM Foundation.=0D
+ ///=0D
+ EFI_PHYSICAL_ADDRESS BootloaderSmmFvContextData;=0D
+ ///=0D
+ /// The length in bytes of the bootloader SMM FV context data.=0D
+ /// This data is provided to bootloader SMM drivers through a HOB by the=
FSP MM Foundation.=0D
+ ///=0D
+ UINT16 BootloaderSmmFvContextDataLength;=0D
+ UINT8 Reserved1[24];=0D
+} FSPI_ARCH_UPD;=0D
+=0D
///=0D
/// FSPT_UPD_COMMON Configuration.=0D
///=0D
@@ -393,6 +435,21 @@ typedef struct {
FSPS_ARCH2_UPD FspsArchUpd;=0D
} FSPS_UPD_COMMON_FSP24;=0D
=0D
+///=0D
+/// FSPI_UPD_COMMON Configuration.=0D
+///=0D
+typedef struct {=0D
+ ///=0D
+ /// FSP_UPD_HEADER Configuration.=0D
+ ///=0D
+ FSP_UPD_HEADER FspUpdHeader;=0D
+=0D
+ ///=0D
+ /// FSPI_ARCH_UPD Configuration.=0D
+ ///=0D
+ FSPI_ARCH_UPD FspiArchUpd;=0D
+} FSPI_UPD_COMMON;=0D
+=0D
///=0D
/// Enumeration of FSP_INIT_PHASE for NOTIFY_PHASE.=0D
///=0D
diff --git a/IntelFsp2Pkg/Include/FspGlobalData.h b/IntelFsp2Pkg/Include/Fs=
pGlobalData.h
index 697b20ed4c..cf94f7b6a5 100644
--- a/IntelFsp2Pkg/Include/FspGlobalData.h
+++ b/IntelFsp2Pkg/Include/FspGlobalData.h
@@ -12,7 +12,7 @@
=0D
#define FSP_IN_API_MODE 0=0D
#define FSP_IN_DISPATCH_MODE 1=0D
-#define FSP_GLOBAL_DATA_VERSION 1=0D
+#define FSP_GLOBAL_DATA_VERSION 0x2=0D
=0D
#pragma pack(1)=0D
=0D
diff --git a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h b/IntelFsp2Pkg/Inclu=
de/Guid/FspHeaderFile.h
index c7fb63168f..5381716d81 100644
--- a/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
+++ b/IntelFsp2Pkg/Include/Guid/FspHeaderFile.h
@@ -52,7 +52,7 @@ typedef struct {
UINT8 Reserved1[2];=0D
///=0D
/// Byte 0x0A: Indicates compliance with a revision of this specificatio=
n in the BCD format.=0D
- /// For revision v2.3 the value will be 0x23.=0D
+ /// For revision v2.4 the value will be 0x24.=0D
///=0D
UINT8 SpecVersion;=0D
///=0D
@@ -93,11 +93,28 @@ typedef struct {
/// Bit 0: Graphics Support - Set to 1 when FSP supports enabling Grap=
hics Display.=0D
/// Bit 1: Dispatch Mode Support - Set to 1 when FSP supports the opti=
onal Dispatch Mode API defined in Section 7.2 and 9. This bit is only valid=
if FSP HeaderRevision is >=3D 4.=0D
/// Bit 2: 64-bit mode support - Set to 1 to indicate FSP supports 64-=
bit long mode interfaces. Set to 0 to indicate FSP supports 32-bit mode int=
erfaces. This bit is only valid if FSP HeaderRevision is >=3D 7.=0D
- /// Bits 15:3 - Reserved=0D
+ /// Bit 3: FSP Variable Services Support - Set to 1 to indicate FSP ut=
ilizes the FSP Variable Services defined in Section 9.6 to store non-volati=
le data. This bit is only valid if FSP HeaderRevision is >=3D 7.=0D
+ /// Bits 15:4 - Reserved=0D
///=0D
UINT16 ImageAttribute;=0D
///=0D
/// Byte 0x22: Attributes of the FSP Component.=0D
+ /// Bit 0 - Build Type=0D
+ /// 0 - Debug Build=0D
+ /// 1 - Release Build=0D
+ /// Bit 1 - Release Type=0D
+ /// 0 - Test Release=0D
+ /// 1 - Official Release=0D
+ /// Bit 11:2 - Reserved=0D
+ /// Bits 15:12 - Component Type=0D
+ /// 0000 - Reserved=0D
+ /// 0001 - FSP-T=0D
+ /// 0010 - FSP-M=0D
+ /// 0011 - FSP-S=0D
+ /// 0100 - FSP-I (FSP SMM)=0D
+ /// 0101 to 0111 - Reserved=0D
+ /// 1000 - FSP-O=0D
+ /// 1001 to 1111 - Reserved=0D
///=0D
UINT16 ComponentAttribute;=0D
///=0D
diff --git a/IntelFsp2Pkg/Tools/SplitFspBin.py b/IntelFsp2Pkg/Tools/SplitFs=
pBin.py
index 317d9c1fa0..ddabab7d8c 100644
--- a/IntelFsp2Pkg/Tools/SplitFspBin.py
+++ b/IntelFsp2Pkg/Tools/SplitFspBin.py
@@ -492,7 +492,7 @@ class FspImage:
self.FihOffset =3D fihoff=0D
self.Offset =3D offset=0D
self.FvIdxList =3D []=0D
- self.Type =3D "XTMSIXXXXOXXXXXXX"[(fih.ComponentAttribute >> =
12) & 0x0F]=0D
+ self.Type =3D "XTMSIXXXOXXXXXXX"[(fih.ComponentAttribute >> 1=
2) & 0x0F]=0D
self.PatchList =3D patch=0D
self.PatchList.append(fihoff + 0x1C)=0D
=0D
--=20
2.35.0.windows.1

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