-----Original Message-----
From: Duggapu, Chinni B <chinni.b.duggapu@...>
Sent: Tuesday, May 17, 2022 1:07 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@...>; Desimone, Nathaniel L
<nathaniel.l.desimone@...>; Zeng, Star <star.zeng@...>; S,
Ashraf Ali <ashraf.ali.s@...>
Subject: [PATCH v4 2/2] IntelFsp2WrapperPkg: FSP_TEMP_RAM_INIT call
must follow X64 Calling Convention

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3926
Pass Input parameters using RCX.

Cc: Chasel Chiu <chasel.chiu@...>
Cc: Nate DeSimone <nathaniel.l.desimone@...>
Cc: Star Zeng <star.zeng@...>
Cc: Ashraf Ali S <ashraf.ali.s@...>
Signed-off-by: cbduggap <chinni.b.duggapu@...>
---
.../SecFspWrapperPlatformSecLibSample/X64/SecEntry.nasm | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git
a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
/SecEntry.nasm
b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
/SecEntry.nasm
index dbbf63336e..065d80d0e2 100644
---
a/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
/SecEntry.nasm
+++
b/IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/X64
/SecEntry.nasm
@@ -130,6 +130,9 @@ FspHeaderFound:
mov eax, dword [edi + FSP_HEADER_IMAGEBASE_OFFSET]

add eax, dword [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]



+ ; Pass Fsp T Udp pointer as Input parameter

+ mov rcx, ASM_PFX(FsptUpdDataPtr)

+

; Setup the hardcode stack

mov rsp, TempRamInitStack



@@ -167,5 +170,4 @@ FspApiFailed:
align 10h

TempRamInitStack:

DQ TempRamInitDone

- DQ ASM_PFX(FsptUpdDataPtr) ; TempRamInitParams



--
2.36.0.windows.1