Also fix PWM0 on the Raspberry Pi 4, but we can't expose both yet.
Signed-off-by: Mario Bălănică <mariobalanica02@...>
---
Platform/RaspberryPi/AcpiTables/AcpiTables.h | 10 ++-
Platform/RaspberryPi/AcpiTables/Dsdt.asl | 34 ++++++---
Platform/RaspberryPi/AcpiTables/GpuDevs.asl | 78 ++++++++++++++++----
Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h | 13 ++++
Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h | 26 +++----
5 files changed, 122 insertions(+), 39 deletions(-)
diff --git a/Platform/RaspberryPi/AcpiTables/AcpiTables.h b/Platform/RaspberryPi/AcpiTables/AcpiTables.h
index 37e2a6bdf409..05da967803af 100644
--- a/Platform/RaspberryPi/AcpiTables/AcpiTables.h
+++ b/Platform/RaspberryPi/AcpiTables/AcpiTables.h
@@ -24,6 +24,11 @@
CreateDwordField (^BufName, ^MemName._BAS, VarName) \
Add (BCM2836_SOC_REGISTERS, Offset, VarName)
+// Same as above, but without the base address.
+#define MEMORY32SET(BufName, MemName, VarName, Address) \
+ CreateDwordField (^BufName, ^MemName._BAS, VarName) \
+ Store(Address, VarName)
+
#define EFI_ACPI_OEM_ID {'R','P','I','F','D','N'}
#if (RPI_MODEL == 3)
#define EFI_ACPI_OEM_TABLE_ID SIGNATURE_64 ('R','P','I','3',' ',' ',' ',' ')
@@ -113,7 +118,7 @@ typedef struct
//------------------------------------------------------------------------
#if (RPI_MODEL == 3)
#define BCM2836_V3D_BUS_INTERRUPT 0x2A
-#define BCM2836_DMA_INTERRUPT 0x3B
+#define BCM2836_DMA5_INTERRUPT 0x35
#define BCM2836_SPI1_INTERRUPT 0x3D
#define BCM2836_SPI2_INTERRUPT 0x3D
#define BCM2836_HVS_INTERRUPT 0x41
@@ -138,7 +143,8 @@ typedef struct
#define BCM2836_PL011_UART_INTERRUPT 0x59
#elif (RPI_MODEL == 4)
#define BCM2836_V3D_BUS_INTERRUPT 0x2A
-#define BCM2836_DMA_INTERRUPT 0x3B
+#define BCM2836_DMA0_INTERRUPT 0x70
+#define BCM2836_DMA5_INTERRUPT 0x75
#define BCM2836_SPI1_INTERRUPT 0x7D
#define BCM2836_SPI2_INTERRUPT 0x7D
#define BCM2836_HVS_INTERRUPT 0x41
diff --git a/Platform/RaspberryPi/AcpiTables/Dsdt.asl b/Platform/RaspberryPi/AcpiTables/Dsdt.asl
index b594d50bdf8e..fbc0049e6beb 100644
--- a/Platform/RaspberryPi/AcpiTables/Dsdt.asl
+++ b/Platform/RaspberryPi/AcpiTables/Dsdt.asl
@@ -139,15 +139,22 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2)
QWORDMEMORYBUF(14)
QWORDMEMORYBUF(15)
// QWORDMEMORYBUF(16)
+#if (RPI_MODEL == 3)
QWORDMEMORYBUF(17)
QWORDMEMORYBUF(18)
QWORDMEMORYBUF(19)
QWORDMEMORYBUF(20)
+#elif (RPI_MODEL == 4)
QWORDMEMORYBUF(21)
QWORDMEMORYBUF(22)
QWORDMEMORYBUF(23)
QWORDMEMORYBUF(24)
+#endif
QWORDMEMORYBUF(25)
+ QWORDMEMORYBUF(26)
+ QWORDMEMORYBUF(27)
+ QWORDMEMORYBUF(28)
+ QWORDMEMORYBUF(29)
})
// USB
@@ -181,19 +188,28 @@ DefinitionBlock ("Dsdt.aml", "DSDT", 2, "RPIFDN", "RPI", 2)
// QWORDMEMORYSET(16, BCM2836_SPI2_OFFSET, BCM2836_SPI2_LENGTH)
// PWM
- QWORDMEMORYSET(17, BCM2836_PWM_DMA_OFFSET, BCM2836_PWM_DMA_LENGTH)
- QWORDMEMORYSET(18, BCM2836_PWM_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH)
- QWORDBUSMEMORYSET(19, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PWM_BUS_LENGTH)
- QWORDBUSMEMORYSET(20, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, BCM2836_PWM_CTRL_UNCACHED_LENGTH)
- QWORDMEMORYSET(21, BCM2836_PWM_CLK_OFFSET, BCM2836_PWM_CLK_LENGTH)
+#if (RPI_MODEL == 3)
+ QWORDMEMORYSET(17, BCM2836_DMA5_OFFSET, BCM2836_DMA_CHANNEL_LENGTH)
+ QWORDMEMORYSET(18, BCM2836_PWM0_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH)
+ QWORDBUSMEMORYSET(19, BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS, BCM2836_PWM_CTRL_LENGTH)
+ QWORDBUSMEMORYSET(20, BCM2836_DMA_DEVICE_OFFSET, 1)
+#elif (RPI_MODEL == 4)
+ QWORDMEMORYSET(21, BCM2836_DMA0_OFFSET, BCM2836_DMA_CHANNEL_LENGTH)
+ QWORDMEMORYSET(22, BCM2836_PWM1_CTRL_OFFSET, BCM2836_PWM_CTRL_LENGTH)
+ QWORDBUSMEMORYSET(23, BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS, BCM2836_PWM_CTRL_LENGTH)
+ QWORDBUSMEMORYSET(24, BCM2836_DMA_DEVICE_OFFSET, 1)
+#endif
+
+ // PWM Clock Manager Control
+ QWORDMEMORYSET(25, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH)
// UART
- QWORDMEMORYSET(22, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UART_LENGTH)
- QWORDMEMORYSET(23, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART_LENGTH)
+ QWORDMEMORYSET(26, BCM2836_PL011_UART_OFFSET, BCM2836_PL011_UART_LENGTH)
+ QWORDMEMORYSET(27, BCM2836_MINI_UART_OFFSET, BCM2836_MINI_UART_LENGTH)
// SDC
- QWORDMEMORYSET(24, MMCHS1_OFFSET, MMCHS1_LENGTH)
- QWORDMEMORYSET(25, SDHOST_OFFSET, SDHOST_LENGTH)
+ QWORDMEMORYSET(28, MMCHS1_OFFSET, MMCHS1_LENGTH)
+ QWORDMEMORYSET(29, SDHOST_OFFSET, SDHOST_LENGTH)
Return (RBUF)
}
diff --git a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl
index 9750dc25c07c..b499620e089a 100644
--- a/Platform/RaspberryPi/AcpiTables/GpuDevs.asl
+++ b/Platform/RaspberryPi/AcpiTables/GpuDevs.asl
@@ -354,12 +354,20 @@ Device (SPI1)
// }
// }
-// PWM Driver
+// PWM devices
+//
+// TO-DOs (that also require changes in the Windows drivers):
+// - drop bus addresses from _CRS and use _DMA instead
+// - the Clock Manager should probably have its own device definition since it's
+// shared between both controllers
+// - expose both devices on the Raspberry Pi 4
+//
+#if (RPI_MODEL == 3)
Device (PWM0)
{
Name (_HID, "BCM2844")
Name (_CID, "BCM2844")
- Name (_UID, 0)
+ Name (_UID, 0x0)
Name (_CCA, 0x0)
Method (_STA)
{
@@ -367,30 +375,70 @@ Device (PWM0)
}
Name (RBUF, ResourceTemplate ()
{
- // DMA channel 11 control
- MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_DMA_LENGTH, RM01)
+ // DMA channel control
+ MEMORY32FIXED (ReadWrite, 0, BCM2836_DMA_CHANNEL_LENGTH, RM01)
// PWM control
MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM02)
// PWM control bus
- MEMORY32FIXED (ReadWrite, BCM2836_PWM_BUS_BASE_ADDRESS, BCM2836_PWM_BUS_LENGTH, )
- // PWM control uncached
- MEMORY32FIXED (ReadWrite, BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS, BCM2836_PWM_CTRL_UNCACHED_LENGTH, )
+ MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM03)
+ // Uncached base address
+ MEMORY32FIXED (ReadWrite, BCM2836_DMA_DEVICE_OFFSET, 1, )
// PWM clock control
- MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CLK_LENGTH, RM03)
- // Interrupt DMA channel 11
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_DMA_INTERRUPT }
- // DMA channel 11, DREQ 5 for PWM
- FixedDMA (5, 11, Width32Bit, )
+ MEMORY32FIXED (ReadWrite, 0, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH, RM04)
+ // DMA channel interrupt
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_DMA5_INTERRUPT }
+ // DREQ 5, DMA channel 5
+ FixedDMA (5, 5, Width32Bit, )
})
Method (_CRS, 0x0, Serialized)
{
- MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_PWM_DMA_OFFSET)
- MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM_CTRL_OFFSET)
- MEMORY32SETBASE (RBUF, RM03, RB03, BCM2836_PWM_CLK_OFFSET)
+ MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_DMA5_OFFSET)
+ MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM0_CTRL_OFFSET)
+ MEMORY32SET (RBUF, RM03, RB03, BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS)
+ MEMORY32SETBASE (RBUF, RM04, RB04, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET)
Return (^RBUF)
}
}
+#elif (RPI_MODEL == 4)
+Device (PWM1)
+{
+ Name (_HID, "BCM2844")
+ Name (_CID, "BCM2844")
+ Name (_UID, 0x1)
+ Name (_CCA, 0x0)
+ Method (_STA)
+ {
+ Return (0xf)
+ }
+ Name (RBUF, ResourceTemplate ()
+ {
+ // DMA channel control
+ MEMORY32FIXED (ReadWrite, 0, BCM2836_DMA_CHANNEL_LENGTH, RM01)
+ // PWM control
+ MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM02)
+ // PWM control bus
+ MEMORY32FIXED (ReadWrite, 0, BCM2836_PWM_CTRL_LENGTH, RM03)
+ // Uncached base address
+ MEMORY32FIXED (ReadWrite, BCM2836_DMA_DEVICE_OFFSET, 1, )
+ // PWM clock control
+ MEMORY32FIXED (ReadWrite, 0, BCM2836_CM_PERIPHERAL_CLOCK_LENGTH, RM04)
+ // DMA channel interrupt
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { BCM2836_DMA0_INTERRUPT }
+ // DREQ 1, DMA channel 0
+ FixedDMA (1, 0, Width32Bit, )
+ })
+
+ Method (_CRS, 0x0, Serialized)
+ {
+ MEMORY32SETBASE (RBUF, RM01, RB01, BCM2836_DMA0_OFFSET)
+ MEMORY32SETBASE (RBUF, RM02, RB02, BCM2836_PWM1_CTRL_OFFSET)
+ MEMORY32SET (RBUF, RM03, RB03, BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS)
+ MEMORY32SETBASE (RBUF, RM04, RB04, BCM2836_CM_PWM_CLOCK_CTRL_OFFSET)
+ Return (^RBUF)
+ }
+}
+#endif
include ("Uart.asl")
include ("Rhpx.asl")
diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
index a930c64af379..126ee52c5ab2 100644
--- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
+++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836.h
@@ -17,6 +17,11 @@
#define BCM2836_SOC_REGISTERS (FixedPcdGet64 (PcdBcm283xRegistersAddress))
#define BCM2836_SOC_REGISTER_LENGTH 0x02000000
+/*
+ * VC memory view
+ */
+#define BCM2836_SOC_BUS_REGISTERS 0x7E000000
+
/*
* Offset between the CPU's view and the VC's view of system memory.
*/
@@ -53,6 +58,8 @@
#define BCM2836_CM_EMMC_CLOCK_CONTROL 0x01c0
#define BCM2836_CM_EMMC_CLOCK_DIVISOR 0x01c4
+#define BCM2836_CM_PERIPHERAL_CLOCK_LENGTH 0x00000008
+
/* mailbox interface constants */
#define BCM2836_MBOX_OFFSET 0x0000b880
#define BCM2836_MBOX_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_MBOX_OFFSET)
@@ -113,6 +120,12 @@
#define BCM2836_DMA0_OFFSET 0x00007000
#define BCM2836_DMA0_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA0_OFFSET)
+#define BCM2836_DMA1_OFFSET 0x00007100
+#define BCM2836_DMA1_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA1_OFFSET)
+
+#define BCM2836_DMA5_OFFSET 0x00007500
+#define BCM2836_DMA5_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA5_OFFSET)
+
#define BCM2836_DMA15_OFFSET 0x00E05000
#define BCM2836_DMA15_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_DMA15_OFFSET)
diff --git a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h
index ce17724b7c21..8fd1cf66d062 100644
--- a/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h
+++ b/Silicon/Broadcom/Bcm283x/Include/IndustryStandard/Bcm2836Pwm.h
@@ -13,22 +13,22 @@
/* PWM controller constants */
-#define BCM2836_PWM_DMA_OFFSET 0x00007B00
-#define BCM2836_PWM_DMA_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_DMA_OFFSET)
-#define BCM2836_PWM_DMA_LENGTH 0x00000100
+//
+// PWM0
+//
+#define BCM2836_PWM0_CTRL_OFFSET 0x0020C000
+#define BCM2836_PWM0_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM0_CTRL_OFFSET)
+#define BCM2836_PWM0_CTRL_BUS_BASE_ADDRESS (BCM2836_SOC_BUS_REGISTERS + BCM2836_PWM0_CTRL_OFFSET)
-#define BCM2836_PWM_CLK_OFFSET 0x001010A0
-#define BCM2836_PWM_CLK_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_CLK_OFFSET)
-#define BCM2836_PWM_CLK_LENGTH 0x00000008
+//
+// PWM1 (only on BCM2711)
+//
+#define BCM2836_PWM1_CTRL_OFFSET 0x0020C800
+#define BCM2836_PWM1_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM1_CTRL_OFFSET)
+#define BCM2836_PWM1_CTRL_BUS_BASE_ADDRESS (BCM2836_SOC_BUS_REGISTERS + BCM2836_PWM1_CTRL_OFFSET)
-#define BCM2836_PWM_CTRL_OFFSET 0x0020C000
-#define BCM2836_PWM_CTRL_BASE_ADDRESS (BCM2836_SOC_REGISTERS + BCM2836_PWM_CTRL_OFFSET)
#define BCM2836_PWM_CTRL_LENGTH 0x00000028
-#define BCM2836_PWM_BUS_BASE_ADDRESS 0x7E20C000
-#define BCM2836_PWM_BUS_LENGTH 0x00000028
-
-#define BCM2836_PWM_CTRL_UNCACHED_BASE_ADDRESS 0xFF20C000
-#define BCM2836_PWM_CTRL_UNCACHED_LENGTH 0x00000028
+#define BCM2836_CM_PWM_CLOCK_CTRL_OFFSET (BCM2836_CM_OFFSET + BCM2836_CM_PWM_CLOCK_CONTROL)
#endif /* __BCM2836_PWM_H__ */
--
2.29.2.windows.2
