Compliant with BZ: #3665
https://bugzilla.tianocore.org/show_bug.cgi?id=3665

PcdPciMmio(32)64Translation PCD is relocated to MdePkg that leveraged
by both ARM and RISC-V arch. This patch uses the one from MdePkg
instead the one under ArmVirtPkg.

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Leif Lindholm <leif@nuviainc.com>
Cc: Graeme Gregory <graeme@nuviainc.com>
Cc: Radoslaw Biernacki <rad@semihalf.com>
Cc: Daniel Schaefer <daniel.schaefer@hpe.com>
---
Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 4 ++--
.../SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
index 0ad9cc7ce4..176d8fab83 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
@@ -56,12 +56,12 @@

gArmTokenSpaceGuid.PcdPciMmio32Base
gArmTokenSpaceGuid.PcdPciMmio32Size
- gArmTokenSpaceGuid.PcdPciMmio32Translation
+ gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciMmio32Limit

gArmTokenSpaceGuid.PcdPciMmio64Base
gArmTokenSpaceGuid.PcdPciMmio64Size
- gArmTokenSpaceGuid.PcdPciMmio64Translation
+ gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciMmio64Limit

gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c
index 5021b096f7..9739c7500d 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHostBridgeLib.c
@@ -96,7 +96,7 @@ STATIC PCI_ROOT_BRIDGE mRootBridge = {

/* PCI_ROOT_BRIDGE_APERTURE Mem; MMIO aperture below 4GB which can be used by
the root bridge
- (gArmTokenSpaceGuid.PcdPciMmio32Translation as 0x0) */
+ (gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation as 0x0) */
{
FixedPcdGet32 (PcdPciMmio32Base),
FixedPcdGet32 (PcdPciMmio32Base) + FixedPcdGet32 (PcdPciMmio32Size) - 1,
@@ -104,7 +104,7 @@ STATIC PCI_ROOT_BRIDGE mRootBridge = {

/* PCI_ROOT_BRIDGE_APERTURE MemAbove4G; MMIO aperture above 4GB which can be
used by the root bridge.
- (gArmTokenSpaceGuid.PcdPciMmio64Translation as 0x0) */
+ (gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation as 0x0) */
{
FixedPcdGet64 (PcdPciMmio64Base),
FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size) - 1
--
2.17.1