[edk2-platforms][PATCH v3 07/41] IntelSiliconPkg: Add PCH SPI Protocol


Michael Kubacki
 

From: Michael Kubacki <michael.kubacki@microsoft.com>

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3307

These SPI Protocol definitions are intended to serve as the single
definitions for Intel platform and silicon packages.

1. gPchSpiProtocolGuid
2. gPchSmmSpiProtocolGuid

Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>
---
Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h | 301 +++++++++++++=
+++++++
Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec | 5 +
2 files changed, 306 insertions(+)

diff --git a/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h b/Silic=
on/Intel/IntelSiliconPkg/Include/Protocol/Spi.h
new file mode 100644
index 000000000000..c13dc5a5f5f5
--- /dev/null
+++ b/Silicon/Intel/IntelSiliconPkg/Include/Protocol/Spi.h
@@ -0,0 +1,301 @@
+/** @file
+ This file defines the PCH SPI Protocol which implements the
+ Intel(R) PCH SPI Host Controller Compatibility Interface.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+**/
+#ifndef _PCH_SPI_PROTOCOL_H_
+#define _PCH_SPI_PROTOCOL_H_
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gPchSpiProtocolGuid;
+extern EFI_GUID gPchSmmSpiProtocolGuid;
+
+//
+// Forward reference for ANSI C compatibility
+//
+typedef struct _PCH_SPI_PROTOCOL PCH_SPI_PROTOCOL;
+
+//
+// SPI protocol data structures and definitions
+//
+
+/**
+ Flash Region Type
+**/
+typedef enum {
+ FlashRegionDescriptor,
+ FlashRegionBios,
+ FlashRegionMe,
+ FlashRegionGbE,
+ FlashRegionPlatformData,
+ FlashRegionDer,
+ FlashRegionSecondaryBios,
+ FlashRegionuCodePatch,
+ FlashRegionEC,
+ FlashRegionDeviceExpansion2,
+ FlashRegionIE,
+ FlashRegion10Gbe_A,
+ FlashRegion10Gbe_B,
+ FlashRegion13,
+ FlashRegion14,
+ FlashRegion15,
+ FlashRegionAll,
+ FlashRegionMax
+} FLASH_REGION_TYPE;
+//
+// Protocol member functions
+//
+
+/**
+ Read data from the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] FlashRegionType The Flash Region type for flash cycle =
which is listed in the Descriptor.
+ @param[in] Address The Flash Linear Address must fall wit=
hin a region for which BIOS has access permissions.
+ @param[in] ByteCount Number of bytes in the data portion of=
the SPI cycle.
+ @param[out] Buffer The Pointer to caller-allocated buffer=
containing the dada received.
+ It is the caller's responsibility to m=
ake sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid=
.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormall=
y.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN FLASH_REGION_TYPE FlashRegionType,
+ IN UINT32 Address,
+ IN UINT32 ByteCount,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Write data to the flash part. Remark: Erase may be needed before write=
to the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] FlashRegionType The Flash Region type for flash cycle =
which is listed in the Descriptor.
+ @param[in] Address The Flash Linear Address must fall wit=
hin a region for which BIOS has access permissions.
+ @param[in] ByteCount Number of bytes in the data portion of=
the SPI cycle.
+ @param[in] Buffer Pointer to caller-allocated buffer con=
taining the data sent during the SPI cycle.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid=
.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormall=
y.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_WRITE) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN FLASH_REGION_TYPE FlashRegionType,
+ IN UINT32 Address,
+ IN UINT32 ByteCount,
+ IN UINT8 *Buffer
+ );
+
+/**
+ Erase some area on the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] FlashRegionType The Flash Region type for flash cycle =
which is listed in the Descriptor.
+ @param[in] Address The Flash Linear Address must fall wit=
hin a region for which BIOS has access permissions.
+ @param[in] ByteCount Number of bytes in the data portion of=
the SPI cycle.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid=
.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormall=
y.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_ERASE) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN FLASH_REGION_TYPE FlashRegionType,
+ IN UINT32 Address,
+ IN UINT32 ByteCount
+ );
+
+/**
+ Read SFDP data from the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] ComponentNumber The Componen Number for chip select
+ @param[in] Address The starting byte address for SFDP dat=
a read.
+ @param[in] ByteCount Number of bytes in SFDP data portion o=
f the SPI cycle
+ @param[out] SfdpData The Pointer to caller-allocated buffer=
containing the SFDP data received
+ It is the caller's responsibility to m=
ake sure Buffer is large enough for the total number of bytes read
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid=
.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormall=
y.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ_SFDP) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT8 ComponentNumber,
+ IN UINT32 Address,
+ IN UINT32 ByteCount,
+ OUT UINT8 *SfdpData
+ );
+
+/**
+ Read Jedec Id from the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] ComponentNumber The Componen Number for chip select
+ @param[in] ByteCount Number of bytes in JedecId data portio=
n of the SPI cycle, the data size is 3 typically
+ @param[out] JedecId The Pointer to caller-allocated buffer=
containing JEDEC ID received
+ It is the caller's responsibility to m=
ake sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid=
.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormall=
y.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ_JEDEC_ID) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT8 ComponentNumber,
+ IN UINT32 ByteCount,
+ OUT UINT8 *JedecId
+ );
+
+/**
+ Write the status register in the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] ByteCount Number of bytes in Status data portion=
of the SPI cycle, the data size is 1 typically
+ @param[in] StatusValue The Pointer to caller-allocated buffer=
containing the value of Status register writing
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid=
.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormall=
y.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_WRITE_STATUS) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT32 ByteCount,
+ IN UINT8 *StatusValue
+ );
+
+/**
+ Read status register in the flash part.
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] ByteCount Number of bytes in Status data portion=
of the SPI cycle, the data size is 1 typically
+ @param[out] StatusValue The Pointer to caller-allocated buffer=
containing the value of Status register received.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid=
.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormall=
y.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_FLASH_READ_STATUS) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT32 ByteCount,
+ OUT UINT8 *StatusValue
+ );
+
+/**
+ Get the SPI region base and size, based on the enum type
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] FlashRegionType The Flash Region type for for the base=
address which is listed in the Descriptor.
+ @param[out] BaseAddress The Flash Linear Address for the Regio=
n 'n' Base
+ @param[out] RegionSize The size for the Region 'n'
+
+ @retval EFI_SUCCESS Read success
+ @retval EFI_INVALID_PARAMETER Invalid region type given
+ @retval EFI_DEVICE_ERROR The region is not used
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_GET_REGION_ADDRESS) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN FLASH_REGION_TYPE FlashRegionType,
+ OUT UINT32 *BaseAddress,
+ OUT UINT32 *RegionSize
+ );
+
+/**
+ Read PCH Soft Strap Values
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] SoftStrapAddr PCH Soft Strap address offset from FPS=
BA.
+ @param[in] ByteCount Number of bytes in SoftStrap data port=
ion of the SPI cycle
+ @param[out] SoftStrapValue The Pointer to caller-allocated buffer=
containing PCH Soft Strap Value.
+ If the value of ByteCount is 0, the da=
ta type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH=
Soft Strap Length
+ It is the caller's responsibility to m=
ake sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid=
.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormall=
y.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_READ_PCH_SOFTSTRAP) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT32 SoftStrapAddr,
+ IN UINT32 ByteCount,
+ OUT VOID *SoftStrapValue
+ );
+
+/**
+ Read CPU Soft Strap Values
+
+ @param[in] This Pointer to the PCH_SPI_PROTOCOL instan=
ce.
+ @param[in] SoftStrapAddr CPU Soft Strap address offset from FCP=
USBA.
+ @param[in] ByteCount Number of bytes in SoftStrap data port=
ion of the SPI cycle.
+ @param[out] SoftStrapValue The Pointer to caller-allocated buffer=
containing CPU Soft Strap Value.
+ If the value of ByteCount is 0, the da=
ta type of SoftStrapValue should be UINT16 and SoftStrapValue will be PCH=
Soft Strap Length
+ It is the caller's responsibility to m=
ake sure Buffer is large enough for the total number of bytes read.
+
+ @retval EFI_SUCCESS Command succeed.
+ @retval EFI_INVALID_PARAMETER The parameters specified are not valid=
.
+ @retval EFI_DEVICE_ERROR Device error, command aborts abnormall=
y.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *PCH_SPI_READ_CPU_SOFTSTRAP) (
+ IN PCH_SPI_PROTOCOL *This,
+ IN UINT32 SoftStrapAddr,
+ IN UINT32 ByteCount,
+ OUT VOID *SoftStrapValue
+ );
+
+/**
+ These protocols/PPI allows a platform module to perform SPI operations=
through the
+ Intel PCH SPI Host Controller Interface.
+**/
+struct _PCH_SPI_PROTOCOL {
+ /**
+ This member specifies the revision of this structure. This field is =
used to
+ indicate backwards compatible changes to the protocol.
+ **/
+ UINT8 Revision;
+ PCH_SPI_FLASH_READ FlashRead; ///< Read data f=
rom the flash part.
+ PCH_SPI_FLASH_WRITE FlashWrite; ///< Write data =
to the flash part. Remark: Erase may be needed before write to the flash =
part.
+ PCH_SPI_FLASH_ERASE FlashErase; ///< Erase some =
area on the flash part.
+ PCH_SPI_FLASH_READ_SFDP FlashReadSfdp; ///< Read SFDP d=
ata from the flash part.
+ PCH_SPI_FLASH_READ_JEDEC_ID FlashReadJedecId; ///< Read Jedec =
Id from the flash part.
+ PCH_SPI_FLASH_WRITE_STATUS FlashWriteStatus; ///< Write the s=
tatus register in the flash part.
+ PCH_SPI_FLASH_READ_STATUS FlashReadStatus; ///< Read status=
register in the flash part.
+ PCH_SPI_GET_REGION_ADDRESS GetRegionAddress; ///< Get the SPI=
region base and size
+ PCH_SPI_READ_PCH_SOFTSTRAP ReadPchSoftStrap; ///< Read PCH So=
ft Strap Values
+ PCH_SPI_READ_CPU_SOFTSTRAP ReadCpuSoftStrap; ///< Read CPU So=
ft Strap Values
+};
+
+/**
+ PCH SPI PPI/PROTOCOL revision number
+
+ Revision 1: Initial version
+**/
+#define PCH_SPI_SERVICES_REVISION 1
+
+#endif
diff --git a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec b/Silicon/=
Intel/IntelSiliconPkg/IntelSiliconPkg.dec
index 70f030e3a295..5c2c9cfbcaab 100644
--- a/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
+++ b/Silicon/Intel/IntelSiliconPkg/IntelSiliconPkg.dec
@@ -78,6 +78,11 @@ [Ppis]
gEdkiiVTdNullRootEntryTableGuid =3D { 0x3de0593f, 0x6e3e, 0x4542, { 0x=
a1, 0xcb, 0xcb, 0xb2, 0xdb, 0xeb, 0xd8, 0xff } }
=20
[Protocols]
+ ## Protocols that provide services for the Intel(R) PCH SPI Host Contr=
oller Compatibility Interface
+ # Include/Protocol/Spi.h
+ gPchSpiProtocolGuid =3D {0xc7d289, 0x1347, 0x4de0, {0xbf, 0x42, 0xe,=
0x26, 0x9d, 0xe, 0xf3, 0x4a}}
+ gPchSmmSpiProtocolGuid =3D {0x56521f06, 0xa62, 0x4822, {0x99, 0x63, 0x=
df, 0x1, 0x9d, 0x72, 0xc7, 0xe1}}
+
gEdkiiPlatformVTdPolicyProtocolGuid =3D { 0x3d17e448, 0x466, 0x4e20, {=
0x99, 0x9f, 0xb2, 0xe1, 0x34, 0x88, 0xee, 0x22 }}
=20
## Protocol for device security policy.
--=20
2.28.0.windows.1

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