REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3451

Update SmBusSendByte() to write value to Command Register instead of
Host Data registers.

Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
---
.../Pch/Library/BaseSmbusLib/BaseSmbusLib.c | 24 +++++++++++++------
1 file changed, 17 insertions(+), 7 deletions(-)

diff --git a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
index 5d09e18613..68dc698aaf 100644
--- a/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
+++ b/Silicon/Intel/KabylakeSiliconPkg/Pch/Library/BaseSmbusLib/BaseSmbusLib.c
@@ -201,14 +201,24 @@ InternalSmBusNonBlock (
HostControl |= B_PCH_SMBUS_PEC_EN;
}
//
- // Set Host Commond Register.
+ // We do not need Data Register for SendByte Command
//
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
- //
- // Write value to Host Data 0 and Host Data 1 Registers.
- //
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value);
- IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >> 8));
+ if ((HostControl == V_PCH_SMBUS_SMB_CMD_BYTE) && ((SmBusAddress & BIT0) == B_PCH_SMBUS_WRITE)) {
+ //
+ // Set Host Command Register.
+ //
+ IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8)Value);
+ } else {
+ //
+ // Set Host Command Register.
+ //
+ IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HCMD, (UINT8) SMBUS_LIB_COMMAND (SmBusAddress));
+ //
+ // Write value to Host Data 0 and Host Data 1 Registers.
+ //
+ IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD0, (UINT8) Value);
+ IoWrite8 (IoPortBaseAddress + R_PCH_SMBUS_HD1, (UINT8) (Value >> 8));
+ }
//
// Set Auxiliary Control Regiester.
//
--
2.31.1.windows.1