Re: [PATCH v2] MinPlatformPkg: Add PcdMicrocodeOffsetInFv


Chiu, Chasel
 

Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

-----Original Message-----
From: Ni, Ray <ray.ni@intel.com>
Sent: Thursday, April 8, 2021 9:43 PM
To: devel@edk2.groups.io
Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
<nathaniel.l.desimone@intel.com>; Liming Gao <gaoliming@byosoft.com.cn>;
Dong, Eric <eric.dong@intel.com>
Subject: [PATCH v2] MinPlatformPkg: Add PcdMicrocodeOffsetInFv

Add PcdMicrocodeOffsetInFv in MinPlatformPkg.dec and update
SecFspWrapperPlatformSecLib library to use the microcode location PCDs
defined in MinPlatformPkg.

Signed-off-by: Ray Ni <ray.ni@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
---
.../SecFspWrapperPlatformSecLib.inf | 8 ++++----
.../SecFspWrapperPlatformSecLib/SecRamInitData.c | 6 +++---
Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec | 10 +++++++++-
3 files changed, 16 insertions(+), 8 deletions(-)

diff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatform
SecLib/SecFspWrapperPlatformSecLib.inf
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatform
SecLib/SecFspWrapperPlatformSecLib.inf
index 4f3fa9fa34..2e0d67eae4 100644
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatform
SecLib/SecFspWrapperPlatformSecLib.inf
+++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat
+++ formSecLib/SecFspWrapperPlatformSecLib.inf
@@ -1,7 +1,7 @@
## @file # Provide FSP wrapper platform sec related function. #-# Copyright (c)
2017 - 2019, Intel Corporation. All rights reserved.<BR>+# Copyright (c) 2017 -
2021, Intel Corporation. All rights reserved.<BR> # # SPDX-License-Identifier:
BSD-2-Clause-Patent #@@ -88,9 +88,9 @@
gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable ##
CONSUMES [FixedPcd]-
gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress ##
CONSUMES-
gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize ##
CONSUMES- gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset
## CONSUMES+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase
## CONSUMES+ gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize
## CONSUMES+ gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv
## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress
## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize
## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress
## CONSUMESdiff --git
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatform
SecLib/SecRamInitData.c
b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatform
SecLib/SecRamInitData.c
index b356327b4c..355d1e6509 100644
---
a/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlatform
SecLib/SecRamInitData.c
+++ b/Platform/Intel/MinPlatformPkg/FspWrapper/Library/SecFspWrapperPlat
+++ formSecLib/SecRamInitData.c
@@ -1,7 +1,7 @@
/** @file Provide TempRamInitParams data. -Copyright (c) 2017, Intel
Corporation. All rights reserved.<BR>+Copyright (c) 2017 - 2021, Intel
Corporation. All rights reserved.<BR> SPDX-License-Identifier: BSD-2-Clause-
Patent **/@@ -24,8 +24,8 @@ GLOBAL_REMOVE_IF_UNREFERENCED CONST
FSPT_UPD_CORE_DATA FsptUpdDataPtr = {
} }, {- ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) +
FixedPcdGet32 (PcdFlashMicrocodeOffset)),- ((UINT32)FixedPcdGet64
(PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32
(PcdFlashMicrocodeOffset)),+ FixedPcdGet32 (PcdFlashFvMicrocodeBase) +
FixedPcdGet32 (PcdMicrocodeOffsetInFv),+ FixedPcdGet32
(PcdFlashFvMicrocodeSize) - FixedPcdGet32 (PcdMicrocodeOffsetInFv), 0,
// Set CodeRegionBase as 0, so that caching will be 4GB-(CodeRegionSize >
LLCSize ? LLCSize : CodeRegionSize) will be used. FixedPcdGet32
(PcdFlashCodeCacheSize), { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x00, 0x00,diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index 2b246cf0ac..28d2b1965e 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -6,7 +6,7 @@
# INF files to generate AutoGen.c and AutoGen.h files # for the build
infrastructure. #-# Copyright (c) 2017 - 2020, Intel Corporation. All rights
reserved.<BR>+# Copyright (c) 2017 - 2021, Intel Corporation. All rights
reserved.<BR> # # SPDX-License-Identifier: BSD-2-Clause-Patent #@@ -162,10
+162,18 @@

gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT
32|0x10000001
gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10
000002 + ## Indicates the MMIO base address of the microcode FV in flash.
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT
32|0x30000004++ ## Indicates the size of the microcode FV in flash.
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT
32|0x30000005++ ## Indicates the offset of the microcode FV relative to the
beginning of flash.
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UI
NT32|0x30000006 + ## Indicates the offset of the actual microcode content
relative to the beginning of the microcode FV.+
gMinPlatformPkgTokenSpaceGuid.PcdMicrocodeOffsetInFv|0x90|UINT32|0x30
000007+
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UIN
T32|0x20000004
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UIN
T32|0x20000005
gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UI
NT32|0x20000006--
2.27.0.windows.1

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