[PATCH v2 1/1] MdePkg/Cpuid.h: Change and add some macro definitions.


Jason Lou
 

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D3105

Change and add some macro definitions about
CPUID_HYBRID_INFORMATION Leaf(1Ah).

Signed-off-by: Jason Lou <yun.lou@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
---
UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c | 2 +-
MdePkg/Include/Register/Intel/Cpuid.h | 17 +++++++++++++----
2 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c b/UefiCpu=
Pkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
index 6b87be261acf..d1f9830c91e7 100644
--- a/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
+++ b/UefiCpuPkg/Library/CpuCacheInfoLib/CpuCacheInfoLib.c
@@ -175,7 +175,7 @@ CpuCacheInfoCollectCoreAndCacheData (
//=0D
Context->ProcessorInfo[ProcessorIndex].CoreType =3D 0;=0D
if (CpuidMaxInput >=3D CPUID_HYBRID_INFORMATION) {=0D
- AsmCpuidEx (CPUID_HYBRID_INFORMATION, CPUID_HYBRID_INFORMATION_SUB_LEA=
F, &NativeModelIdAndCoreTypeEax.Uint32, NULL, NULL, NULL);=0D
+ AsmCpuidEx (CPUID_HYBRID_INFORMATION, CPUID_HYBRID_INFORMATION_MAIN_LE=
AF, &NativeModelIdAndCoreTypeEax.Uint32, NULL, NULL, NULL);=0D
Context->ProcessorInfo[ProcessorIndex].CoreType =3D (UINT8) NativeMode=
lIdAndCoreTypeEax.Bits.CoreType;=0D
}=0D
=0D
diff --git a/MdePkg/Include/Register/Intel/Cpuid.h b/MdePkg/Include/Registe=
r/Intel/Cpuid.h
index dd1b64a1e50b..a670ab436c37 100644
--- a/MdePkg/Include/Register/Intel/Cpuid.h
+++ b/MdePkg/Include/Register/Intel/Cpuid.h
@@ -3601,7 +3601,7 @@ typedef union {
CPUID Hybrid Information Enumeration Leaf=0D
=0D
@param EAX CPUID_HYBRID_INFORMATION (0x1A)=0D
- @param ECX CPUID_HYBRID_INFORMATION_SUB_LEAF (0x00).=0D
+ @param ECX CPUID_HYBRID_INFORMATION_MAIN_LEAF (0x00).=0D
=0D
@retval EAX Enumerates the native model ID and core type described=0D
by the type CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX=0D
@@ -3615,7 +3615,7 @@ typedef union {
=0D
AsmCpuidEx (=0D
CPUID_HYBRID_INFORMATION,=0D
- CPUID_HYBRID_INFORMATION_SUB_LEAF,=0D
+ CPUID_HYBRID_INFORMATION_MAIN_LEAF,=0D
&Eax, NULL, NULL, NULL=0D
);=0D
@endcode=0D
@@ -3626,11 +3626,11 @@ typedef union {
///=0D
/// CPUID Hybrid Information Enumeration sub-leaf=0D
///=0D
-#define CPUID_HYBRID_INFORMATION_SUB_LEAF 0x=
00=0D
+#define CPUID_HYBRID_INFORMATION_MAIN_LEAF 0x=
00=0D
=0D
/**=0D
CPUID Hybrid Information EAX for CPUID leaf #CPUID_HYBRID_INFORMATION,=0D
- sub-leaf #CPUID_HYBRID_INFORMATION_SUB_LEAF.=0D
+ sub-leaf #CPUID_HYBRID_INFORMATION_MAIN_LEAF.=0D
**/=0D
typedef union {=0D
///=0D
@@ -3657,6 +3657,15 @@ typedef union {
UINT32 Uint32;=0D
} CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX;=0D
=0D
+///=0D
+/// @{ Define value for CPUID_NATIVE_MODEL_ID_AND_CORE_TYPE_EAX.CoreType=0D
+///=0D
+#define CPUID_CORE_TYPE_INTEL_ATOM 0x=
20=0D
+#define CPUID_CORE_TYPE_INTEL_CORE 0x=
40=0D
+///=0D
+/// @}=0D
+///=0D
+=0D
=0D
/**=0D
CPUID V2 Extended Topology Enumeration Leaf=0D
--=20
2.28.0.windows.1

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