[edk2-staging/RISC-V-V2 PATCH v2 11/29] MdePkg/BaseCpuLib: RISC-V Base CPU library implementation.


Abner Chang
 

Implement RISC-V CPU related functions in BaseCpuLib.

Signed-off-by: Abner Chang <abner.chang@...>
---
MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 6 +++++-
MdePkg/Library/BaseCpuLib/BaseCpuLib.uni | 5 +++--
MdePkg/Library/BaseCpuLib/RiscV/Cpu.S | 19 +++++++++++++++++++
3 files changed, 27 insertions(+), 3 deletions(-)
create mode 100644 MdePkg/Library/BaseCpuLib/RiscV/Cpu.S

diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
index a7cb381..a95d8a0 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
@@ -7,6 +7,7 @@
# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+# Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
#
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
@@ -24,7 +25,7 @@


#
-# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64
+# VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64
#

[Sources.IA32]
@@ -59,6 +60,9 @@
AArch64/CpuFlushTlb.asm | MSFT
AArch64/CpuSleep.asm | MSFT

+[Sources.RISCV64]
+ RiscV/Cpu.S
+
[Packages]
MdePkg/MdePkg.dec

diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
index fc95cda..85d56ce 100644
--- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
+++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.uni
@@ -1,12 +1,13 @@
// /** @file
// Instance of CPU Library for various architecture.
//
-// CPU Library implemented using ASM functions for IA-32 and X64,
+// CPU Library implemented using ASM functions for IA-32, X64 and RISCV64,
// PAL CALLs for IPF, and empty functions for EBC.
//
// Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
// Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
// Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
+// Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
//
// SPDX-License-Identifier: BSD-2-Clause-Patent
//
@@ -15,5 +16,5 @@

#string STR_MODULE_ABSTRACT #language en-US "Instance of CPU Library for various architectures"

-#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32 and X64, PAL CALLs for IPF, and empty functions for EBC."
+#string STR_MODULE_DESCRIPTION #language en-US "CPU Library implemented using ASM functions for IA-32, X64 and RISCV64, PAL CALLs for IPF, and empty functions for EBC."

diff --git a/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S
new file mode 100644
index 0000000..703b1e8
--- /dev/null
+++ b/MdePkg/Library/BaseCpuLib/RiscV/Cpu.S
@@ -0,0 +1,19 @@
+//------------------------------------------------------------------------------
+//
+// CpuSleep for RISC-V
+//
+// Copyright (c) 2016 - 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+//------------------------------------------------------------------------------
+.data
+.align 3
+.section .text
+
+.global ASM_PFX(_CpuSleep)
+
+ASM_PFX(_CpuSleep):
+ wfi
+ ret
+
+
--
2.7.4

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