[edk2-staging/RISC-V-V2 PATCH v2 03/29] RiscVPkg/opensbi: EDK2 RISC-V OpenSBI support


Abner Chang
 

Add EDK2 RISC-V OpenSBI header files and opensbi-HOWTO.txt for users to build RISC-V platform with RISC-V OpenSBI library.

Signed-off-by: Abner Chang <abner.chang@...>
---
RiscVPkg/Include/sbi/SbiFirmwareContext.h | 38 ++++++++++++
RiscVPkg/Include/sbi/sbi.h | 96 +++++++++++++++++++++++++++++++
RiscVPkg/Include/sbi/sbi_bits.h | 17 ++++++
RiscVPkg/Include/sbi/sbi_types.h | 18 ++++++
4 files changed, 169 insertions(+)
create mode 100644 RiscVPkg/Include/sbi/SbiFirmwareContext.h
create mode 100644 RiscVPkg/Include/sbi/sbi.h
create mode 100644 RiscVPkg/Include/sbi/sbi_bits.h
create mode 100644 RiscVPkg/Include/sbi/sbi_types.h

diff --git a/RiscVPkg/Include/sbi/SbiFirmwareContext.h b/RiscVPkg/Include/sbi/SbiFirmwareContext.h
new file mode 100644
index 0000000..498faf4
--- /dev/null
+++ b/RiscVPkg/Include/sbi/SbiFirmwareContext.h
@@ -0,0 +1,38 @@
+/** @file
+ RISC-V OpesbSBI Platform Firmware context definition
+
+ Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _SBI_FIRMWARE_CONTEXT_H_
+#define _SBI_FIRMWARE_CONTEXT_H_
+
+#include <RiscV.h>
+
+#define RISC_V_MAX_HART_SUPPORTED 16
+
+//
+// keep the structure member in 64-bit alignment.
+//
+#pragma pack(push)
+#pragma pack(8)
+
+typedef struct {
+ UINT64 IsaExtensionSupported; // The ISA extension this core supported.
+ RISCV_UINT128 MachineVendorId; // Machine vendor ID
+ RISCV_UINT128 MachineArchId; // Machine Architecture ID
+ RISCV_UINT128 MachineImplId; // Machine Implementation ID
+} EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC;
+
+#define FIRMWARE_CONTEXT_HART_SPECIFIC_SIZE (64 * 7)
+
+typedef struct {
+ VOID *PeiServiceTable; // PEI Service table
+ EFI_RISCV_FIRMWARE_CONTEXT_HART_SPECIFIC *HartSpecific[RISC_V_MAX_HART_SUPPORTED];
+} EFI_RISCV_OPENSBI_FIRMWARE_CONTEXT;
+
+#pragma pack(pop)
+#endif
+
diff --git a/RiscVPkg/Include/sbi/sbi.h b/RiscVPkg/Include/sbi/sbi.h
new file mode 100644
index 0000000..89d5016
--- /dev/null
+++ b/RiscVPkg/Include/sbi/sbi.h
@@ -0,0 +1,96 @@
+/** @file
+ SBI inline function calls.
+
+ Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef _SBI_H_
+#define _SBI_H_
+
+#include <sbi/sbi_types.h> // Reference to header file wrapper
+#include <include/sbi/riscv_asm.h> // Reference to header file in opensbi
+
+#define SBI_SET_TIMER 0
+#define SBI_CONSOLE_PUTCHAR 1
+#define SBI_CONSOLE_GETCHAR 2
+#define SBI_CLEAR_IPI 3
+#define SBI_SEND_IPI 4
+#define SBI_REMOTE_FENCE_I 5
+#define SBI_REMOTE_SFENCE_VMA 6
+#define SBI_REMOTE_SFENCE_VMA_ASID 7
+#define SBI_SHUTDOWN 8
+
+#define SBI_CALL(which, arg0, arg1, arg2) ({ \
+ register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \
+ register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \
+ register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \
+ register uintptr_t a7 asm ("a7") = (uintptr_t)(which); \
+ asm volatile ("ecall" \
+ : "+r" (a0) \
+ : "r" (a1), "r" (a2), "r" (a7) \
+ : "memory"); \
+ a0; \
+})
+
+#define SBI_CALL_0(which) SBI_CALL(which, 0, 0, 0)
+#define SBI_CALL_1(which, arg0) SBI_CALL(which, arg0, 0, 0)
+#define SBI_CALL_2(which, arg0, arg1) SBI_CALL(which, arg0, arg1, 0)
+
+static inline void sbi_console_putchar(int ch)
+{
+ SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch);
+}
+
+static inline int sbi_console_getchar(void)
+{
+ return SBI_CALL_0(SBI_CONSOLE_GETCHAR);
+}
+
+static inline void sbi_set_timer(uint64_t stime_value)
+{
+#if __riscv_xlen == 32
+ SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32);
+#else
+ SBI_CALL_1(SBI_SET_TIMER, stime_value);
+#endif
+}
+
+static inline void sbi_shutdown(void)
+{
+ SBI_CALL_0(SBI_SHUTDOWN);
+}
+
+static inline void sbi_clear_ipi(void)
+{
+ SBI_CALL_0(SBI_CLEAR_IPI);
+}
+
+static inline void sbi_send_ipi(const unsigned long *hart_mask)
+{
+ SBI_CALL_1(SBI_SEND_IPI, hart_mask);
+}
+
+static inline void sbi_remote_fence_i(const unsigned long *hart_mask)
+{
+ SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask);
+}
+
+static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size)
+{
+ SBI_CALL_1(SBI_REMOTE_SFENCE_VMA, hart_mask);
+}
+
+static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
+ unsigned long start,
+ unsigned long size,
+ unsigned long asid)
+{
+ SBI_CALL_1(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask);
+}
+
+#endif
diff --git a/RiscVPkg/Include/sbi/sbi_bits.h b/RiscVPkg/Include/sbi/sbi_bits.h
new file mode 100644
index 0000000..1e6bda3
--- /dev/null
+++ b/RiscVPkg/Include/sbi/sbi_bits.h
@@ -0,0 +1,17 @@
+/** @file
+ RISC-V OpesbSBI header file reference.
+
+ Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _EDK2_SBI_BITS_H_
+#define _EDK2_SBI_BITS_H_
+
+#undef MAX
+#undef MIN
+
+#include "include/sbi/sbi_bits.h" // Reference to header file in opensbi
+
+#endif
diff --git a/RiscVPkg/Include/sbi/sbi_types.h b/RiscVPkg/Include/sbi/sbi_types.h
new file mode 100644
index 0000000..d7ff227
--- /dev/null
+++ b/RiscVPkg/Include/sbi/sbi_types.h
@@ -0,0 +1,18 @@
+/** @file
+ RISC-V OpesbSBI header file reference.
+
+ Copyright (c) 2019, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef _EDK2_SBI_TYPES_H_
+#define _EDK2_SBI_TYPES_H_
+
+#undef TRUE
+#undef FALSE
+#undef NULL
+
+#include "opensbi/include/sbi/sbi_types.h" // Reference to header file in opensbi
+
+#endif
--
2.7.4

Join devel@edk2.groups.io to automatically receive all group messages.